From: John Jacques <john.jacq...@lsi.com> Signed-off-by: John Jacques <john.jacq...@lsi.com> --- arch/arm/mach-axxia/clock.c | 64 +++++++++++++++++++++++++++++++++++++++++ drivers/tty/serial/amba-pl011.c | 4 +-- 2 files changed, 66 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-axxia/clock.c b/arch/arm/mach-axxia/clock.c index 619ba5d..27ace6f 100644 --- a/arch/arm/mach-axxia/clock.c +++ b/arch/arm/mach-axxia/clock.c @@ -25,6 +25,7 @@ clkdev_add(cl); \ } while (0) +#ifdef CONFIG_ARCH_AXXIA_SIM void __init axxia_init_clocks(void) @@ -77,3 +78,66 @@ axxia_init_clocks(void) /* PL180 MMCI */ clk_register_clkdev(clk, NULL, "mmci"); } + +#else + +/* + ------------------------------------------------------------------------------- + axxia_init_clocks + + Clock setup for Emulation/ASIC systems. +*/ + +void __init +axxia_init_clocks(void) +{ + struct clk *clk; + int i; + + /* APB clock dummy */ + clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, + CLK_IS_ROOT, AXXIA_SYS_CLOCK/2); + clk_register_clkdev(clk, "apb_pclk", NULL); + + /* CPU core clock (1400MHz) from CPU_PLL */ + clk = clk_register_fixed_rate(NULL, "clk_cpu", NULL, + CLK_IS_ROOT, AXXIA_CPU_CLOCK); + + /* APB and System AXI clock from CPU_PLL */ + clk = clk_register_fixed_rate(NULL, "clk_pclk", NULL, + CLK_IS_ROOT, AXXIA_CPU_CLOCK/9); + + /* DDR3 (interface 1) clock from SMEM1_PLL */ + clk = clk_register_fixed_rate(NULL, "clk_smem1_2x", NULL, + CLK_IS_ROOT, AXXIA_DDR_CLOCK); + + /* AXIS slow peripheral clock from SMEM1_PLL. */ + clk = clk_register_fixed_rate(NULL, "clk_per", NULL, + CLK_IS_ROOT, 2000000); + /* PL011 UART0 */ + clk_register_clkdev(clk, NULL, "2010080000.uart"); + /* PL011 UART1 */ + clk_register_clkdev(clk, NULL, "2010081000.uart"); + /* PL011 UART2 */ + clk_register_clkdev(clk, NULL, "2010082000.uart"); + /* PL011 UART3 */ + clk_register_clkdev(clk, NULL, "2010083000.uart"); + /* PL022 SSP */ + clk_register_clkdev(clk, NULL, "ssp"); + + /* Timers 1MHz clock */ + clk = clk_register_fixed_rate(NULL, "clk_1mhz", NULL, + CLK_IS_ROOT, 1000000); + /* SP804 timers */ + clk_register_clkdev(clk, NULL, "sp804"); + for (i = 0; i < 8; i++) + clk_register_clkdev(clk, NULL, "axxia-timer%d", i); + + /* Dummy MMC clk */ + clk = clk_register_fixed_rate(NULL, "clk_mmci", NULL, + CLK_IS_ROOT, 25000000); + /* PL180 MMCI */ + clk_register_clkdev(clk, NULL, "mmci"); +} + +#endif diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c index abe91eb..aa46383 100644 --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c @@ -1378,7 +1378,7 @@ static void pl010_put_poll_char(struct uart_port *port, #endif /* CONFIG_CONSOLE_POLL */ -static int pl011_startup(struct uart_port *port) +/*ZZZ static*/ int pl011_startup(struct uart_port *port) { struct uart_amba_port *uap = (struct uart_amba_port *)port; unsigned int cr; @@ -1667,7 +1667,7 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios, quot -= 2; } /* Set baud rate */ -#if 0 +#if 1 writew(quot & 0x3f, port->membase + UART011_FBRD); writew(quot >> 6, port->membase + UART011_IBRD); #else -- 1.8.4.3 _______________________________________________ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto