* Eric W. Biederman <[EMAIL PROTECTED]> [040601 08:05]:
> Looking the large memory mapped I/O resources all have 64bit BARs. So
> I am just going to modify the LinuxBIOS resource allocator to put
> 64bit BARs on x86-64 boxes at least above the top of memory.
>
> There are a couple of short term h
Le ven 28/05/2004 Ã 18:25, Nathanael Noblet a Ãcrit :
> On Friday, May 28, 2004, at 08:52 AM, Mathieu Deschamps wrote:
> > For the time being, i'am at writing doc and well
> > this is a needed step, first it helps me understand in the whole,
> > second i've been ordered to do so.
> >
> > I would gl
Stefan Reinauer <[EMAIL PROTECTED]> writes:
> * Eric W. Biederman <[EMAIL PROTECTED]> [040601 08:05]:
> > Looking the large memory mapped I/O resources all have 64bit BARs. So
> > I am just going to modify the LinuxBIOS resource allocator to put
> > 64bit BARs on x86-64 boxes at least above the t
* Eric W. Biederman <[EMAIL PROTECTED]> [040601 09:53]:
> Essentially. Although the pci devices don't vanish you likely can't use
> them because some of their BARS have values that 32bit kernels can't
> cope with. lspci should let you see that though. A 32bit kernel
> with PAE enabled could cod
Stefan Reinauer <[EMAIL PROTECTED]> writes:
> * Eric W. Biederman <[EMAIL PROTECTED]> [040601 09:53]:
> > Essentially. Although the pci devices don't vanish you likely can't use
> > them because some of their BARS have values that 32bit kernels can't
> > cope with. lspci should let you see that
Hello,
I got something something i cant get rid of.
In the src/lib directory, it holds memory allocations
and relatives progs. Why are they redefined ?
I mean couldn't we use standard's definitions ?
I've seen there are debug dumps mechanisms but
surely as in standard's def.?
Could you enlight
On Fri, 28 May 2004, Joshua Wise wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> I read the FAQ looking for information on chipsets supported in LinuxBIOS, and
> it pointed me towards the status page, however I can only find information
> about mainboards on that page. Am I looking
On 1 Jun 2004, Eric W. Biederman wrote:
> There are a couple of short term hacks that I can do with relocating
> memory but on the Opteron the more memory I add the more problems
> I run into. And moving BARS above 4G looks like the right term
> fix.
>
> Any objections?
How are we going to cove
just FYI, making BARS live above the 32-bit limit will break every single
linux cluster here at LANL, and will also disable Plan 9.
With BARS under the 32-bit limit, you can boot anything. With BARS above
that limit, you immediately limit what you can boot.
I think what really ought to happen i
Original Message
Subject: Re: Linuxbios and Linspire laptop
Date: Tue, 01 Jun 2004 10:10:43 -0500
From: Bari Ari <[EMAIL PROTECTED]>
To: Jan Macek <[EMAIL PROTECTED]>
CC: Richard Stallman <[EMAIL PROTECTED]>
References: <[EMAIL PROTECTED]>
<[EMAIL PROTECTED]> <[EMAIL PROTECTED]>
ron minnich wrote:
On Fri, 28 May 2004, Joshua Wise wrote:
I read the FAQ looking for information on chipsets supported in LinuxBIOS, and
it pointed me towards the status page, however I can only find information
about mainboards on that page. Am I looking in the wrong place? For
reference, I'm
* Bari Ari <[EMAIL PROTECTED]> [040601 17:12]:
> You may have to care about power management, SystemBIOS reflashing and
> the lid etc. or those features may not work depending on how they did
> the hardware design. Like I have said before there is really no standard
> for this.
Power management an
Hi,
one thing that is generically missing in LinuxBIOS' ACPI implementation
is the detailed system description table (DSDT The part telling whether
there is a lid and how detect whether it is open or closed)
The DSDT is written in ASL which is compiled to AML bytecode using an
ASL compiler (ie.
Stefan Reinauer wrote:
* Bari Ari <[EMAIL PROTECTED]> [040601 17:12]:
You may have to care about power management, SystemBIOS reflashing and
the lid etc. or those features may not work depending on how they did
the hardware design. Like I have said before there is really no standard
for this.
Powe
* Bari Ari <[EMAIL PROTECTED]> [040601 17:30]:
> That's if they got ACPI right in their hardware design. Laptop hardware
> designers use the keyboard micro to solve lots of issues since these
> micros have lots of GPIO pins along with timers and other function
> blocks that are easily programmed
ron minnich <[EMAIL PROTECTED]> writes:
> just FYI, making BARS live above the 32-bit limit will break every single
> linux cluster here at LANL, and will also disable Plan 9.
Only for the hardware where the BARs move.
> With BARS under the 32-bit limit, you can boot anything. With BARS above
Stefan Reinauer wrote:
While LinuxBIOS' goal is to let Linux do it, I guarantee that either
these ACPI tables are put in LinuxBIOS or the features won't be
available in Linux for the next decade or so.
The offer still stands:
I'd really like to pick a laptop with a chipset with plenty of life left
Mathieu Deschamps <[EMAIL PROTECTED]> writes:
> Hello,
>
> I got something something i cant get rid of.
> In the src/lib directory, it holds memory allocations
> and relatives progs. Why are they redefined ?
> I mean couldn't we use standard's definitions ?
> I've seen there are debug dumps mec
Stefan Reinauer wrote:
Hi,
one thing that is generically missing in LinuxBIOS' ACPI implementation
is the detailed system description table (DSDT The part telling whether
there is a lid and how detect whether it is open or closed)
The DSDT is written in ASL which is compiled to AML bytecode using
Eric,
There is something called Memory lifting or memory remapping for Opteron.
For example if 2G for one Opteron and two ways system.
Then the CPU 0 will use [0,2G), and CPU 1 will use [4G, 6G).
If the RAM for CPU is above 4G, then We must lost 1/2G for MMIO range, the
reason is Opteron only ha
Hi everybody,
I perused through the documentation, but as I am
really no specialist, I couldn't tell if Linuxbios
would work with my motherboard, nor the way to put the
whole thing up and running in the eventuality it would
-is there any step-by-step howto for dummies like I ?
The reason I ask is
YhLu <[EMAIL PROTECTED]> writes:
> Eric,
>
> There is something called Memory lifting or memory remapping for Opteron.
> For example if 2G for one Opteron and two ways system.
>
> Then the CPU 0 will use [0,2G), and CPU 1 will use [4G, 6G).
>
> If the RAM for CPU is above 4G, then We must lost
Then in LinuxBIOS We can access the memory in 64 bit mode directly. And
maybe do the memory check and test. Memory problem is a big problem in
system integration.
Some time 8 ways system, every cpu has 4 dimm, total memay will be
4G*4*8=128G.
Regards
YH
-邮件原件-
发件人: [EMAIL PROTECTED] [ma
Stefan Reinauer <[EMAIL PROTECTED]> writes:
> * Eric W. Biederman <[EMAIL PROTECTED]> [040529 05:29]:
> > Stefan Reinauer <[EMAIL PROTECTED]> writes:
> > > indeed true. But for x86 hardware, putting all of the x86 emulator in
> > > rom is less elegant than vm86 stuff, even though I have no clue ab
word from someone who knows that acpi tables have many errors. Windows
drivers work around the bugs in acpi tables. Linux follows the spec
closely, hence the problems people see with linux+acpi.
ron
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lindows/linspire never got back to me re a laptop port.
no interest at their end.
ron
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or you can translate the acpi tables to Something Else (e.g. e-expressions
-- it works) and use that instead.
acpi is a big problem, partly due to the binary nature and partly because
it is so broken on so many platforms.
ron
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ron minnich wrote:
lindows/linspire never got back to me re a laptop port.
no interest at their end.
The Linspire laptop http://www.sub300.com/port.htm pretty much an Epia
with a keyboard controller. Not very glamorous but if it has a Renesas
keyboard super I/O controller I might be interested
On Tue, 1 Jun 2004, Ben Johnson wrote:
> :00:00.0 Host bridge: VIA Technologies, Inc.
> VT82C693A/694x [Apollo PRO133x] (rev c4)
I don't believe we support this one.
ron
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On 1 Jun 2004, Eric W. Biederman wrote:
> ron minnich <[EMAIL PROTECTED]> writes:
>
> > just FYI, making BARS live above the 32-bit limit will break every single
> > linux cluster here at LANL, and will also disable Plan 9.
>
> Only for the hardware where the BARs move.
guess I missed somethi
ron minnich wrote:
acpi is a big problem, partly due to the binary nature and partly because
it is so broken on so many platforms.
ron
Speaking of ACPI and problems, which are commented on in this article,
is this Intel announcement of open sourcing the BIOS something new?
http://news.com.co
Here's the official Intel statement:
http://www.intel.com/pressroom/archive/releases/20040601corp_a.htm
-Bari
Steve Gehlbach wrote:
ron minnich wrote:
acpi is a big problem, partly due to the binary nature and partly
because it is so broken on so many platforms.
ron
Speaking of ACPI and proble
On Tue, 1 Jun 2004, Steve Gehlbach wrote:
> Speaking of ACPI and problems, which are commented on in this article,
> is this Intel announcement of open sourcing the BIOS something new?
>
> http://news.com.com/Intel+to+open+code+for+booting+up+PCs%2C+servers/2100-7337_3-5223860.html?tag=nefd.top
On Tue, 1 Jun 2004, Bari Ari wrote:
> Here's the official Intel statement:
>
> http://www.intel.com/pressroom/archive/releases/20040601corp_a.htm
gee, no mention of linuxbios :-)
ron
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Some good news.
In OHCI, bulk transfer works well.
Status: it can read sector 0 and sector 68, after that it will reboot the
system.
Regards
YH
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ron minnich <[EMAIL PROTECTED]> writes:
> On 1 Jun 2004, Eric W. Biederman wrote:
>
> > ron minnich <[EMAIL PROTECTED]> writes:
> >
> > > just FYI, making BARS live above the 32-bit limit will break every single
> > > linux cluster here at LANL, and will also disable Plan 9.
> >
> > Only for th
Steve Gehlbach <[EMAIL PROTECTED]> writes:
> ron minnich wrote:
>
> > acpi is a big problem, partly due to the binary nature and partly because it
> > is so broken on so many platforms.
> >
> >ron
> >
>
> Speaking of ACPI and problems, which are commented on in this article, is this
> Intel anno
Stefan Reinauer <[EMAIL PROTECTED]> writes:
> Hi,
>
> one thing that is generically missing in LinuxBIOS' ACPI implementation
> is the detailed system description table (DSDT The part telling whether
> there is a lid and how detect whether it is open or closed)
>
> The DSDT is written in ASL wh
ron minnich <[EMAIL PROTECTED]> writes:
> Worked fine.
The alpha port worked but it is not something I savor repeating,
there were too many real limitations.
There are some things that I find strongly architecturally questionable
about Tiano, in the context of Intel hardware. Unfortunately neit
OHCI usb boot ok now.
But it is some slow, only 173KB/S,
Full speed should be 12Mbps/8 = 1500KB/s
Regards
YH
Mounted fat
Image checksum: 47da
Loading Linux version 2.6.5 ([EMAIL PROTECTED]) #11 SMP Mon May 10 14:58:17
PDT 2004...
segment 1 addr:0x0001 file:0x543c mem:0x0001a764 p
Hello from Gregg C Levine
An article in last months issue of ECN discusses the problems and
circumstances regarding the USB port. Specifically the use of the port
in embedded systems. At the end the editor of the magazine, who also
happened to be the article's author, asked for any messages from
pe
YhLu <[EMAIL PROTECTED]> writes:
> Then in LinuxBIOS We can access the memory in 64 bit mode directly.
We already do, on the Opteron.
> And
> maybe do the memory check and test. Memory problem is a big problem in
> system integration.
Unless you spend days at it you cannot do a good memory che
YhLu <[EMAIL PROTECTED]> writes:
> OHCI usb boot ok now.
>
> But it is some slow, only 173KB/S,
>
> Full speed should be 12Mbps/8 = 1500KB/s
Congratulations.
Eric
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<[EMAIL PROTECTED]> writes:
> I'm sure if someone has thought of doing this before, but I haven't found
> mention of it anywhere.
>
>
> Has any work been done toward the goal of "Hibernation"? I'm writing of the
> type that would use a separate partition equal to ram + swap space to store the
>
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