On Tue, Jan 18, 2005 at 10:47:38PM -0800, ramesh bios wrote:
> I noticed you mentioned reading the nsc reference
> drivers to get further understanding. Are these
> available somewhere?
NSC offered the BLDT, BootLoader Development Toolkit, without an
agreement of exclusivity and without licensing
Quoting ebiederman@lnxi.com:
[EMAIL PROTECTED] writes:
Hi Bari,
I have the plain old VIA EPIA (800/5000) working a good 80 % of the time.
Not sure if my problems are buggy northbridge setup or buggy
motherboard - it
generates some spurious serial at power on, and sometimes hangs reading the
smbus
(Note the new mail address, I'm not sure if the hack.org address still
reaches me).
ramesh bios <[EMAIL PROTECTED]> writes:
> Christer, I'm having trouble with my gx1 board. The
> ramtest fails and I see an explicit difference in what
> the normal bios sets MC_BANK_CFG to and what the
> raminit a
* YhLu <[EMAIL PROTECTED]> [050119 02:35]:
> i wonder what the different between
> offs = ( pci_read_config16(dev, pos + PCI_CAP_FLAGS) & (1<<10)) ?
> PCI_HT_SLAVE1_OFFS : PCI_HT_SLAVE0_OFFS;
>
> and
>
> offs = ( (pci_read_config16(dev, pos + PCI_CAP_FLAGS) >> 10) & 1) ?
> PCI_HT_SLAVE1_OFFS :
for our tuturoials we found the EPIAs with linuxbios to boot 100% of the
time, and this was several dozen of them.
ron
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*Sigh*
When Linux has IOAPICs and Local Apics configured via an ACPI MADT
it will not read the mptable at all. It will reference mptable
information though and not find any bus.
Only way out seems to add a DSDT als well. Or whatever table it wants
for that.
It is really broken.
Stefan
_
Quoting "Ronald G. Minnich" :
for our tuturoials we found the EPIAs with linuxbios to boot 100% of the
time, and this was several dozen of them.
Hmmm, guess this means I have a problem here
Was that V1 or V2 ? I don't remember having problems with V1 code.
What version of gcc etc did you use/ar
On Wed, 19 Jan 2005 [EMAIL PROTECTED] wrote:
> Hmmm, guess this means I have a problem here
> Was that V1 or V2 ? I don't remember having problems with V1 code.
Always V2.
> What version of gcc etc did you use/are you using ?
whatever is on suse 9.1 ...
gcc version 3.3.3 (SuSE Linux)
G
Mainboard: EPIA 800.
Building LB appears to go well, using these steps (my Options.lb and
Config.lb are listed at the end of this note):
- cd /targets
- ./buildtarget via/epia
- cd via/epia/epia
- make
The build appears to go without a hitch. At that point I write
target
probably because the cmos checksum is wrong. You need to use cmos_util
(from LNXI ftp site) to set up the cmos with good params and checksum.
ron
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I'm trying to setup my /cpu/intel/socket_PGA370 directory. What cpu
model should I use?
--
Richard A. Smith
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Ok so slowly I'm trying to move to V2.
Step 1 was to just try and get some serial action going.
I added my CPU and superIO and setup my mainboard directory with a
simple config file.
I've got a traceback on buildtarget though. So aparently I'm not
filling out everything that needs to be fille
I'm starting up the learning curve
Whats the mapping between the various CPU models in the intel directory and
marketing cpu names as I know them like Pentium III, P3 celeron, Pentuim 4, etc.
I don't completely grok the fallback and normal stuff. I know the theory but
not practice. I know
On Wed, 2005-01-19 at 20:08 -0700, Ronald G. Minnich wrote:
> probably because the cmos checksum is wrong. You need to use cmos_util
> (from LNXI ftp site) to set up the cmos with good params and checksum.
Ron, thanks for that pointer, I had not found mention of cmos_util in
the docs I co
> probably because the cmos checksum is wrong. You need to use cmos_util
> (from LNXI ftp site) to set up the cmos with good params and checksum.
>the docs I could find. My cmos is now fixed up, and I'm getting in to
>my normal image.
H... Our board dosent have CMOS. Well dosen't have any r
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