what's other SPD about your DIMM? Brand model
That bit means x4 DIMM.
YH
-Original Message-
From: Stefan Reinauer [mailto:[EMAIL PROTECTED]
Sent: Sunday, January 23, 2005 2:48 PM
To: linuxbios@clustermatic.org
Cc: [EMAIL PROTECTED]
Subject: error in k8 ram setup
Hi,
Ollie,
It seems that there some allocate resource for vga...stuff, and main focus
is to fix the mem io to some range and enable the io for vga.
For the first one, I suggest you to create one driver for the VGA device,
and it could override the read_resource of pci_read_resource to return fixed
] On Behalf Of Yinghai Lu
Sent: Sunday, December 12, 2004 5:45 PM
To: 'Stefan Reinauer'; [EMAIL PROTECTED]
Subject: RE: collapsing devices.
Actually for cpu0 link1, in the auto.c stage, incoherent.c only need to
handle bus 0, because ht device only at bus 0 (8131 and 8111).
For cpu1 link2
Actually for cpu0 link1, in the auto.c stage, incoherent.c only need to
handle bus 0, because ht device only at bus 0 (8131 and 8111).
For cpu1 link2, in the auto.c stage, incoherent device only need to handle
to bus 4, because we put the device on bus 4 according to setting in 0xe4 of
PCI_dev.
You need to add
uses CONFIG_CONSOLE_BTEXT
default CONFIG_CONSOLE_BTEXT=1
dir /drivers/ati/ragexl
after that you can get ouput in Linuxbios after vga
init.
You also need to enable the btext in
Etherboot. You should use Etherboot 5.2.6.
it includes filo and btext console.
Please try this:
1. Comment out inconherent init in auto.c
2. disable hard_reset in northbridge.c
So let the ht code in hardwaremain stage to check you ht connection.
YH
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of Stefan Reinauer
Sent: Saturday,
The D0 is released last week. And Normal BIOS support it already.
Thanks for your great job in raminit.c of K8 and others, and I add several
lines to reflect the new mapping of memory bank.
Regards
Yinghai Lu
-Original Message-
From: Eric W. Biederman [mailto:[EMAIL PROTECTED
You can enable debug in filo. Also add some printf in ide_disk.c
YH
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of Luc Belliveau
Sent: Saturday, December 04, 2004 9:32 AM
To: Ronald G. Minnich
Cc: [EMAIL PROTECTED]
Subject: Re: epia problem/Epia status
Are you going to post the patch? Then we can check that for you.
YH
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of zhu shi song
Sent: Saturday, December 04, 2004 9:40 AM
To: Ronald G. Minnich
Cc: [EMAIL PROTECTED]
Subject: Re: about
What is your HT topology?
Is there any cross link between (CPU0 and CPU2) or (CPU1 and CPU2)
You may try to disable i2c stuff in the amd8111 dir.
The code works well with S4882 and S4880.
YH
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of Stefan
enable_flash_ich4 and enable_flash_e7500 is the same. You may remove
enable_flash_e7500.
It should use SB name and model...
Regards
YH
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After increase the ROM_IMAGE_SIZE beyond 64K, Do you need to change
DXIP_ROM_SIZE?
Regards
YH
-Original Message-
From: Eric W. Biederman [mailto:[EMAIL PROTECTED] On Behalf Of Eric W.
Biederman
Sent: Sunday, October 31, 2004 10:06 AM
To: Yinghai Lu
Cc: 'LinuxBIOS'; 'Ronald G. Minnich
1. Using ROMCC to do propresser will help the size reduction?
2. what is usage for MOVNTI? It is for GDB
3. How to use GDB to debug LinuxBIOS? Is it only for linuxbios_ram?
4. You will use llshell for crt0.s or auto.c debug?
5. Current romcc only take constant parameters for non inline
I'm not really a fan, I am still more productive with printf debugging.
Yes, also post code to port 80 is useful before the console is setup.
Regards
YH
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Make bin/r8169.zelf
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On
Behalf Of Sagiv Yefet
Sent: Wednesday, October 20, 2004
1:55 AM
To: [EMAIL PROTECTED]
Subject: building Image with
RTL8169 NIC
Hello,
I am trying to build IMAGE for Tyan 2850 with RTL8169 NIC.
Done.
-Original Message-
From: Stefan Reinauer [mailto:[EMAIL PROTECTED]
Sent: Wednesday, October 20, 2004 5:58 AM
To: YhLu
Cc: [EMAIL PROTECTED]; Li-Ta Lo; 'Ronald G. Minnich'; 'LinuxBIOS'
Subject: Re: FYI: Merge in progress...
* YhLu [EMAIL PROTECTED] [041020 07:13]:
Just check in
To use PIC in you configuration, you need program 8111 0x56 about int
routing
/* initialize PCI interupts - these assignments
depend
on the PCB routing of PINTA-D
PINTA = IRQ5
PINTB = IRQ9
So chip tree is merged into device tree.
I'm eager to convert my MB to use that.
Is there any problem for different inherent links in second K8?
Regards
YH
-Original Message-
From: Eric W. Biederman [mailto:[EMAIL PROTECTED] On Behalf Of Eric W.
Biederman
Sent: Saturday, October 16,
Great, I will test that Monday. The code can be complied for s2885 and
s2895.
Regards
Yinghai Lu
-Original Message-
From: Eric W. Biederman [mailto:[EMAIL PROTECTED] On Behalf Of Eric W.
Biederman
Sent: Saturday, October 16, 2004 1:06 PM
To: Yinghai Lu
Cc: 'Ronald G. Minnich
If there is another device in CPU link0. how to change the Config.lb?
Also after buildtarget, make failed.
Regards
YH
chip northbridge/amd/amdk8
print HI MOM!\n
device pnp cf8.0 on # cf8 config
print HI MOM!\n
device
Adding Lindenhurst support?
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
Sent: Thursday, October 14, 2004 12:22 PM
To: LinuxBIOS
Subject: FYI: Merge in progress...
Ron and I are in the middle of a major merge. So the CVS tree is likely to
be in flux
for a bit.
Good, for SMP support, Add an entry in mptable?
YH
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Are you using the last patch?
What's your USB controller model and etc?
Regards
YH
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of elife
elife
Sent: Monday, September 06, 2004 7:50 PM
To: [EMAIL PROTECTED]
Cc: [EMAIL PROTECTED]
Subject:
I remember that some time ago, Miller met the problem with the use FILO and
FILO in Etherboot to boot elf made by mkelfImage 2.5from Kernel and
Init.
The kernel said that can not find the init.
Yesterday I met the same problem under following configuration:
Kernel: 2.6.8.1 compiled under
Original USB bootloader is in freebios/src/util/baremetal but it only
support UHCI.
If you want OHCI support, you need to check out FILO in Etherboot.
https://sourceforge.net/tracker/?func=detailaid=943300group_id=4233atid=3
04233
Regards
YH
-Original
James,
It seems the E7501 in V1 is done by you, When can you move that to V2? I
mean translate.
I hope to change that to support 875. The AMD K8 northbridge is too
different to intel MCH.
Regards
YH
--
: Steven James [mailto:[EMAIL PROTECTED]
: Saturday, June 05, 2004 11:13 AM
: ron
Eric,
Maybe someone add some build instruction for Etherboot for LinuxBIOS would
solve the payload building problem.
Regards
YH
--
: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] Eric W. Biederman
: 200468 1:04
: LinuxBIOS
: Bootloaders and LinuxBIOS
As the freebiosv1 tree grew and
There is bug in Etherboot in old version.
So use
make bin/tg3.zelf
--
: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] Ignacio Verona
: 2004515 0:46
: [EMAIL PROTECTED]
: Re: : Etherboot version
Sorry, I forgot to mention that I did also uncomment the line -DLINUXBIOS
...
but then
Does it work now?
If it works with raw device, after merge it into filo, it should use file system FAT
etc.
Regards
YH
--
: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Steven James
: 200458 5:18
: Gregg C Levine
: [EMAIL PROTECTED]
: RE: Is possible Linux on flash memory?
Greetings,
8.
Sometimes, if you not enable PCI master, the device can not work properly in
Linux.
But Eric/Ron didn't enable that in PCI main loop, because some devices don't
need that.
Regards
YH
--
: Stefan Reinauer [mailto:[EMAIL PROTECTED]
: 2004424 16:39
: ron minnich
: YhLu; Hendricks
Also, do these two files belong in the ATI driver directory?
ati/ragexl/fb.h
ati/ragexl/fbcon.h
Can they go somewhere generic? Let's try to reuse as
much of the code as possible.
I suggest We move these files to common place after we add fb/btext support
to other onboard display chip.
I will double check if current kernel need that for every onboard device.
YH
--
: Eric W. Biederman [mailto:[EMAIL PROTECTED] Eric W. Biederman
: 2004425 11:47
: Yinghai Lu
: 'Stefan Reinauer'; 'ron minnich'; 'Hendricks David W.'; 'Li-Ta Lo';
'LinuxBIOS'
: Re: ATI rage xl.init
Yinghai
of hard code. How can I enable tg3-filo.zelf?
Regards
YH.
--
: Eric W. Biederman [mailto:[EMAIL PROTECTED] Eric W. Biederman
: 200443 20:33
: Greg Watson
: Yinghai Lu; 'SONE Takeshi'; [EMAIL PROTECTED]
: Re: g-e$: FILO 0.4 [PMX:#]
Greg Watson [EMAIL PROTECTED] writes:
Yeah sorry, I kind
. Biederman [mailto:[EMAIL PROTECTED] Eric W. Biederman
: 200443 20:33
: Greg Watson
: Yinghai Lu; 'SONE Takeshi'; [EMAIL PROTECTED]
: Re: g-e$: FILO 0.4 [PMX:#]
Greg Watson [EMAIL PROTECTED] writes:
Yeah sorry, I kind of did that by stealth. Ron and I get lots of requests
from
people wanting
of
LinuxBIOS.
It is more better if filo support boot loader (lilo) in HD.
Regards
Yinghai Lu
--
: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] Eric W. Biederman
: 200443 13:02
: SONE Takeshi
: [EMAIL PROTECTED]
: Re: FILO 0.4
SONE Takeshi [EMAIL PROTECTED] writes:
I just released FILO
???
Regards
YH
--
: Greg Watson [mailto:[EMAIL PROTECTED]
: 200443 17:29
: Yinghai Lu
: 'SONE Takeshi'; 'Eric W. Biederman'; [EMAIL PROTECTED]
: Re: : FILO 0.4 [PMX:#]
Yeah sorry, I kind of did that by stealth. Ron and I get lots of
requests from people wanting to use LB but who don't know
I'm in trip, otherwise I would add some output for that function.
If the quadrics card can work with hdama, then need to look at the boot log
at that.
YH
--
: ron minnich [mailto:[EMAIL PROTECTED]
: 200434 21:48
: Yinghai Lu
: 'YhLu'@mailproxy3.lanl.gov; [EMAIL PROTECTED]; LinuxBIOS
Ron,
I have verified the myerinet card with s2882 in LinuxBIOS. It works well.
Eric,
I wonder if round function in pci_device.c cause the bus prefmem region
calculation problem.
Also according to suggestion from quadrics and amd, it seems that BIOS and
kernel need to be patched to allow the
Ron,
I have verified the myerinet card with s2882 in LinuxBIOS. It works well.
Eric,
I wonder if round function in pci_device.c cause the bus prefmem region
calculation problem.
Also according to suggestion from quadrics and amd, it seems that BIOS and
kernel need to be patched to allow the
the
appropriate driver. I do admit I have not tested 5.2 yet. But
I don't see why anything would have broken.
Regards
Yinghai Lu
01:09.00 [14E4/16A7]
[tg3-5703X]The PCI BIOS has not enabled this device!
Updating PCI command 0002-0007. pci_bus 01 pci_device_fn 48
Capability: 7
the second CPU. Need
to change to 0x4000 as the old config tool did.
4. You need to remove make.base.lb, since the function has been replaced
by the above Config.lb. the rule control make linuxbios.rom.
Regards
Yinghai Lu
--
: ron minnich [mailto:[EMAIL PROTECTED]
: 2003725 14:44
: YhLu
: Re
Please refer the program cut.
static void setup_coherent_ht_domain(void)
{
static const unsigned int register_values[] = {
PCI_ADDR(0, 0x18, 0, 0x40), 0xfff0f0f0, 0x00050101,
PCI_ADDR(0, 0x18, 0, 0x44), 0xfff0f0f0, 0x00010404,
PCI_ADDR(0, 0x18, 0, 0x5c),
the E1000 driver support RELOCATION yet?
Your snippet is for RELOCATION or not?
Regards
Yinghai Lu
--
: Eric W. Biederman [mailto:[EMAIL PROTECTED] Eric W. Biederman
: 2003614 9:23
: YhLu
: ron minnich; [EMAIL PROTECTED]; Etherboot Developers
: Re: : High-End Desktop Support
YhLu [EMAIL
Eric,
But it works for 5.0.8 and 5.0.9. and I have tried it on RH 8 and RH 9.
1. strip e1000.elf : 92 bytes
2. strip -R comment e1000.elf : 92 bytes.
3. strip -R note e1000.elf : 92 bytes.
4. strip -R comment -R note e1000.elf : 92 bytes.
Anyway I will use zelf format.
Regards
Yinghai Lu
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