I'm interested in having this but there is only epia. Can someone outline
the steps involved in bringing V2 up on epia-m? I might tackle it if it
looks to be something I can handle. However last time I checked (yesterday)
I couldn't even build the v2 epia though.
Don't let my interest stop anyone
On Mon, 17 Nov 2003, Dave Ashley wrote:
Configuring PART mainboard, path via/epia
Trying to find one of EQ on line 20:
default ROM_SIZE 256*1024
^
fixed, our fault, please cvs update.
ron
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dave.root% ./buildtarget via/epia
build_dir=via/epia/epia
No linuxbios config script found. Rebuilding it..
Input Grammar: /ram/freebios2/util/newconfig/config.g
Output File: via/epia/epia/config.py
Configuring TARGET epia
Will place Makefile, crt0.S, etc. in via/epia/epia
Configuring ROMIMAGE
Ron Minnich wrote:
fixed, our fault, please cvs update.
This reminds me of the Simpson's episode where they give homer the
correct number to call for emergencies--912.
When I cvs update nothing changes. I'm using the common pondscum cvs server
as described in this document:
On Mon, 17 Nov 2003, Stefan Reinauer wrote:
What is the procedure for the elite cvs server that the royalty use?
Looks like Sourceforge is getting worse again.. Check
http://snapshots.linuxbios.org/
I just mailed Dave the file for now.
Everyone, the change in the new config language is
On 1 Oct 2003, Eric W. Biederman wrote:
Right. However I think we can start setting the precedent
that onboard video is handled via open source code. Plug in
video cards are an entirely different problem.
We can set this precedent, and we can try to cleave to it as best we can.
But the
Andrew, you should be able to build a working linuxbios image for EPIA by:
cd targets
./buildtarget via/epia
etc.
If you can try to figure out why the IRQ table is not working, that would
help. I'm stuck. It's the same table as on V1, it checks out when copied
to ram, but Linux is just unhappy
ron minnich [EMAIL PROTECTED] writes:
On 1 Oct 2003, Eric W. Biederman wrote:
Adam Agnew has pointed me at a frame buffer driver for the ATI Rage XL
that should be capable of initializing the card without bios support. If
that works we have an even better solution.
That's been my hope
OK, the first SPD work is in. Ram size is now set from SPD.
The next line of attack are the MA registers.
The code is walking a tight line between code space size and register
allocation; see
northbridge/via/vt8601/raminit.c
for some details. These old pentiums are tight on registers!
That
I just tested the node with different memory dimms of different size and
they're fine.
We're going to be glad we made it to V2, and that we finally did SPD for
this platform.
ron
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OK, I'm done for a while. This thing is working well enough, I have some
other things to do, and I think it is an ok example (criticism is welcome
and appreciated, as long as it comes with suggestions for how to improve
things).
I did put some timing test and control in raminit.c, and it
Any plan on moving other to V2?
Intel chipset?
Serverworks chipset?
Sis chipset?
Other??
Regards
YH
--
: ron minnich [mailto:[EMAIL PROTECTED]
: 2003102 16:37
: [EMAIL PROTECTED]
: V2 VIA EPIA
OK, I'm done for a while. This thing is working well enough, I have some
other things
ron minnich [EMAIL PROTECTED] writes:
OK, the first SPD work is in. Ram size is now set from SPD.
The next line of attack are the MA registers.
The code is walking a tight line between code space size and register
allocation; see
northbridge/via/vt8601/raminit.c
for some details.
On Thu, 2 Oct 2003, YhLu wrote:
Any plan on moving other to V2?
Intel chipset?
Serverworks chipset?
Sis chipset?
Other??
Yes. I did this port in part to encourage people to look at doing other
ports.
ron
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On 2 Oct 2003, Eric W. Biederman wrote:
I see. Any chance that could be linux-kernel style indented?
Right now the indentation is not consistent.
sure, indentation is one of those things that I never worry about one way
or another, due to the indent wars. I switch projects too often to get
ron minnich [EMAIL PROTECTED] writes:
OK, for VGA, here we go again.
Here is my plan.
I will combine vgabios + idt into one file, put it in pc80, make it a
standard device, have it turn itself on with the standard static
configuration techniques, and we'll have vga.
The understanding
Oh, I can see what is going to happen to buildrom now that Ron has
discovered it... :-)
Greg
At 11:44 PM -0600 30/9/03, ron minnich wrote:
Changes:
new epia target for 512k: targets/via/epia/Config.512kflash.lb
epia defaults to 256k flash
buildtarget now takes either a directory, and uses
OK, I just loaded from flash. Next step is to fix the PIRQ, then look at
SPD and memory setup.
The fix, for now, is this in auto.c
static void
enable_mainboard_devices(void) {
device_t dev;
/* dev 0 for southbridge */
dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0);
if (dev ==
Thanks for all of your efforts, you seem to be making quick progress. I would
like to try v2 out next week.
Is there any documentation on the V2 build procedure?
I know I sound like an idiot but what does the acronym SPD stand for?
Cheers,
Randall
OK, I've committed code that turns on shadow dram in F segment, so PIRQ
will work; also committed what should be working SMBUS code in
vt8231_early_smbus.c; now the fun begins. I could use advice on:
- what SMBUS bytes we need to care about
- what we should program the north with using those
At the end of the compilation, I get this.
gcc -nostdlib -nostartfiles -static -o linuxbios -T ldscript.ld crt0.o
nm -n linuxbios | sort linuxbios.map
objcopy -O binary linuxbios linuxbios.strip
gcc -o buildrom /home/randall/src/linuxbios/freebios2/util/buildrom/buildrom.c
./buildrom
On Tue September 30 2003 8:52 pm, Randall H. Craig wrote:
tg3--ide-disk.zelf was never built. Is this missing:
from the buildrom output, tg3--ide-disk.zelf is supposed to be the payload.
Any ideas?
I am guessing that this is an etherboot image. What is the pci.ids for the
ethernet device?
Randall H. Craig wrote:
I know I sound like an idiot but what does the acronym SPD stand for?
serial presence detect (SPD)
You can read about it here:
http://www.intel.com/technology/memory/pc133sdram/spec/spdsd12b.htm
http://www.simmtester.com/page/news/showpubnews.asp?num=101
Bari
On Tue, 30 Sep 2003, Randall H. Craig wrote:
At the end of the compilation, I get this.
gcc -nostdlib -nostartfiles -static -o linuxbios -T ldscript.ld crt0.o
nm -n linuxbios | sort linuxbios.map
objcopy -O binary linuxbios linuxbios.strip
gcc -o buildrom
On Tue, 30 Sep 2003, Bari Ari wrote:
Randall H. Craig wrote:
I know I sound like an idiot but what does the acronym SPD stand for?
serial presence detect (SPD)
You can read about it here:
http://www.intel.com/technology/memory/pc133sdram/spec/spdsd12b.htm
Hi Ron,
I'm able to build and run LinuxBIOS on EPIA with some treaking on Config.lb.
However, it fails to jump to payload(etherboot). I suspect LinuxBIOS is
jumping to a wrong location. Is it possible to set ZKERNEL_START in v2?
BTW, ROM_SIZE for default setup should be 262144 instead of 512k,
On Wed, 1 Oct 2003, Andrew Ip wrote:
I'm able to build and run LinuxBIOS on EPIA with some treaking on Config.lb.
send me the tweaks, although they should not have been needed.
However, it fails to jump to payload(etherboot). I suspect LinuxBIOS is
jumping to a wrong location. Is it
Hi Ron,
Are you able to use etherboot as payload?
ZKERNEL_START is not really needed any more. I don't think. Am I wrong?
Is it changed to CONFIG_ROM_STREAM_START?
send me the tweaks, although they should not have been needed.
It is just the size. I can commit it now. We can say LinuxBIOS
Changes:
new epia target for 512k: targets/via/epia/Config.512kflash.lb
epia defaults to 256k flash
buildtarget now takes either a directory, and uses directory/Config.lb, or
takes a file
e.g.
buildtarget via/epia will use via/epia/Config.lb, and
buildtarget via/epia/Config.512kflash.lb
don't commit! I fixed that for you already.
ron
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OK, for VGA, here we go again.
I just found out that a well-known linuxbios company ships their boards in
some cases with the old bios in it because the field engineers want
vga.
Here is my plan.
I will combine vgabios + idt into one file, put it in pc80, make it a
standard device,
On Wed, 1 Oct 2003, Andrew Ip wrote:
ZKERNEL_START is not really needed any more. I don't think. Am I wrong?
Is it changed to CONFIG_ROM_STREAM_START?
Think so. Those names are terrible (we need to fix them) but I think
that's it.
yes. You may need to get the latest cvs ... I have a few
OK, I am now almost at the limit of my understanding :-)
I need to set up the device_operations for the 8601. Here is the mainboard
config that is relevant.
northbridge via/vt8601 vt8601
pci 0:0.0
pci 0:1.0
southbridge via/vt8231 vt8231
pci 0:11.0
Filling in the blanks ...
First all functions of a device save function 0 get this error:
PCI: 00:11.1 missing read_resources
seems like a bug.
So there looks like a problem for functions other than 0.
Bridges don't have a path that is named:
@�: bus
I really think that if you are working on EPIA-*, you should make the cut
to V2. I need the help. The port is going to be a much better job, and we
won't have to keep fighting hacks in assembly code.
Things that need looking at right now:
- vt8231 early spd code
- pci bus set up
- northbridge
comes up with POST 10. That's it.
But hey, I didn't expect more yet ... this is a start :-)
ron
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here is what I get:
0
LinuxBIOS-1.1.4.0Fallback Fri Sep 26 16:04:07 MDT 2003 starting...
SMBus controller enabled
vt8601 init starting
0800 is the north
vt8601 done
LinuxBIOS-1.1.4.0Fallback Fri Sep 26 16:04:07 MDT 2003
OK, here is where I am.
Here is the start of the key function
in src/northbridge/via/vt8601/raminit.c
static void sdram_set_registers(const struct mem_controller *ctrl) {
static const uint16_t raminit_ma_reg_table[] = {
/* Values for MA type register to try */
0x, 0x8088, 0xe0ee,
Closer. I'm getting through all of the 8601 setup. But the values are
bogus:
Good VIA!
00: 06 11 01 06 06 00 90 a2 05 00 00 06 00 40 00 00
10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
I think I've got the last kinks out on 8601; we'll find out monday.
ron
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