YhLu [EMAIL PROTECTED] writes:
Eric,
Do you plan use CONFIG_SMP to substitute SMP?
Yes. One of the details that has been problematic is that
our CONFIG defines are not explicitly marked as such. So in the freebios2
tree I am trying to get things a little more uniform.
Eric
YhLu [EMAIL PROTECTED] writes:
Eric,
After update raminit.c now MB can boot into linuxbios.
The s2880 has six memory slot: 4 for CPU0 ,and 2 for CPU 1.
I can only init 4 for CPU0. I have tried:
#cp raminit.c raminit1.c
and rename all function in the raminit1.c to x_1
copy
YhLu [EMAIL PROTECTED] writes:
I remember there is one type error on arch/i386/lib/pci_ops.c.
Change one *val -- value
Thanks. I rarely compile the spew messages in, so I didn't notice.
Eric
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ron minnich [EMAIL PROTECTED] writes:
what is pci_def.h BTW? I can't build now.
??? What is the error.
pci_def.h is a factor of pci.h . I slit it out so I t could be used
by the romcc compiled code as well as in the normal pci.h. It just
allows me to avoid duplicate definitions.
Eric
YhLu [EMAIL PROTECTED] writes:
Stefan,
I swap the
PCI_ADDR(0, 0x18, 0, 0x6C), 0xff8c, 0x0070, //1C
The 4th line. It can go through setup_coherent_ht_domain.
But seems then both CPU all works. Please refer the attached.
Congratulations.
I refuse to put any more hard
On 24 Jun 2003, Eric W. Biederman wrote:
Yes. It has been in the repository in src/include/device/pci_def.h
for a month now. At least according to CVS.
gag. It came down to my machine here at work and not my x24.
OK, more fun.
ron
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Eric,
The RAM on CPU1's northbridge can go through now. I mistype several 0x19 to
0x18.
I have enabled the SMP support in Config file.
option CONFIG_SMP=1
option MAX_CPUS=2
option SMP=1
As for the missing functions.
I have copied secondCPU.S and udelay related files to the freebios2.
The
FYI, Greg Watson has improved the config tool, I am integrating the
changes, and almost have an image built for Arima HDAMA.
Hope to test tomorrow, if I can fix this last nagging problem ...
ron
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Eric,
Do you plan use CONFIG_SMP to substitute SMP?
Regards
Yinghai Lu
--
: YhLu
: 2003624 16:37
: '[EMAIL PROTECTED]'
: ron minnich; Stefan Reinauer; [EMAIL PROTECTED]
: re: coherent hypertransport enumeration on opteron
Eric,
The RAM on CPU1's northbridge can go through now. I
: : coherent hypertransport enumeration on opteron
what is pci_def.h BTW? I can't build now.
ron
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On Mon, 23 Jun 2003, YhLu wrote:
How about your new build script progress?
greg is making huge improvements and I think we will release this or next
week for comments.
ron
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