Dear LinuxBIOS readers!
This is the automated build check service of LinuxBIOS.
The developer stepan checked in revision 2355 to
the LinuxBIOS source repository and caused the following
changes:
Change Log:
Geode LX: this patch adds configuration/status/self-test MSR definitionsfor L2
cache
Dear LinuxBIOS readers!
This is the automated build check service of LinuxBIOS.
The developer noodles checked in revision 2357 to
the LinuxBIOS source repository and caused the following
changes:
Change Log:
Allow setting of serial port speed in EPIA-M config file.
Build Log:
Compilation of
Indrek Kruusa wrote:
This patch adds L2 cache initialization for Geode LX CPU.
Signed-off-by: Indrek Kruusa [EMAIL PROTECTED]
Please don't commit this one!
Cache sould be initialized right after shadowing linuxBIOS and before
northbridge/CPU bugs/chipset/VSA etc.
I will prepare the new
* Indrek Kruusa [EMAIL PROTECTED] [060802 18:38]:
Indrek Kruusa wrote:
This patch adds L2 cache initialization for Geode LX CPU.
Signed-off-by: Indrek Kruusa [EMAIL PROTECTED]
Please don't commit this one!
Cache sould be initialized right after shadowing linuxBIOS and before
Stefan Reinauer wrote:
* Indrek Kruusa [EMAIL PROTECTED] [060802 18:38]:
Indrek Kruusa wrote:
This patch adds L2 cache initialization for Geode LX CPU.
Signed-off-by: Indrek Kruusa [EMAIL PROTECTED]
Please don't commit this one!
Cache sould be initialized right after
On Sat, 2006-07-29 at 12:53 -0500, Richard Smith wrote:
You are in luck. I've actually got booting code for my ASUS P2b. Both
My main question is: The W83977TF has support under v1, but not v2 -
any tips on porting from one to the other?
I've done this already. I'll push the code
Changelog:
* src/cpu/amd/model_lx/model_lx_init.c
L2 cache initialization removed (moved to northbridge.c)
* src/include/cpu/amd/lxdef.h
more checked values
* src/northbridge/amd/lx/northbridge.c
L2 cache initialization added
cpubug() commented out
*
Changelog:
* src/mainboard/artecgroup/dbe61/Config.lb
irqmap changes
* src/mainboard/artecgroup/dbe61/irq_tables.c
tentative changes to irq table (currently not in use)
* src/mainboard/artecgroup/dbe61/mainboard.c
irq assigned manually to NIC
*
I'm on vacation, but have a plan for this, can we wait one week?
thanks
ron
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Indrek Kruusa wrote:
I'v sent some patches directly to Ronald but he is lost somewere.
I will prepare new patches as there are more changes. This will not fix
the build though - we need to separate GX2 and CS5536 (latter includes
defs from CPU). Then we can connect CS5536 to Geode LX too.
This took a little longer than I expected due to my son's fourth
No rush we got lots of time.
These probes are byte-for-byte identical with what the p2b target
LinuxBIOSv2 outputs when I flash it and start up my system.
Well thats a positive sign. I don't know for a _fact_ that the asus
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