Just went to look at this for reference, and noticed the whitespace in
the device section was a mess. Attached patch fixes that. No actual code
changes, just fix the whitespace so it's legible.
Signed-off-by: Corey Osgood [EMAIL PROTECTED]
Index: Config.lb
Quoting Corey Osgood [EMAIL PROTECTED]:
Intel i810/i82801aa/b support should be on its way soon, I hope the
folks that were asking about it are still subscribed. i815 will follow
soon after. minicom.cap attached, I've still got a few quirks to work
out (like finishing the south bridge and a
i'm currently implementing raminit functions for the ALi M1621
(Aladdin-Pro II) chipset. They should be working without any SPD data at
least for the detection of the RAM type and size(s). In general i think
that size and type detection is the same on most chipsets (if not all)
especially if
* popkonserve [EMAIL PROTECTED] [070517 12:52]:
i'm currently implementing raminit functions for the ALi M1621
(Aladdin-Pro II) chipset.
great!
They should be working without any SPD data at least for the detection
of the RAM type and size(s). In general i think that size and type
Author: uwe
Date: 2007-05-17 13:20:18 +0200 (Thu, 17 May 2007)
New Revision: 2672
Modified:
trunk/LinuxBIOSv2/src/mainboard/intel/xe7501devkit/Config.lb
Log:
Whitespace fixes (trivial).
Signed-off-by: Corey Osgood [EMAIL PROTECTED]
Signed-off-by: Uwe Hermann [EMAIL PROTECTED]
Acked-by: Uwe
On Thu, May 17, 2007 at 02:26:36AM -0400, Corey Osgood wrote:
Just went to look at this for reference, and noticed the whitespace in
the device section was a mess. Attached patch fixes that. No actual code
changes, just fix the whitespace so it's legible.
Signed-off-by: Corey Osgood [EMAIL
On Tue, May 15, 2007 at 11:01:48PM -0400, Corey Osgood wrote:
spd_read_byte() is the correct name, so it should stay IMO. Is there a
reason why all/most boards define this as a wrapper for smbus_read_byte()?
Could this be something else than smbus_read_byte() for some board?
If no,
On Wed, May 16, 2007 at 04:43:11AM -0400, [EMAIL PROTECTED] wrote:
I think this is a great idea! But, should there be one for SDRAM and
one for DDR maybe??
Nope, I think all should go into one spd.c file, and ideally the
functions should handle SDRAM/DDR/whatever correctly (some already do to
Hi Holger!
On Thu, May 17, 2007 at 12:52:26PM +0200, popkonserve wrote:
i'm currently implementing raminit functions for the ALi M1621
(Aladdin-Pro II) chipset. They should be working without any SPD data at
least for the detection of the RAM type and size(s). In general i think
that size
On Wed, May 16, 2007 at 09:17:12AM +0100, Luis Correia wrote:
Add copywrite notice to Options.lb, this fully closes issue #53
Oops, sorry, I meant targets/iei/nova4899r/Config.lb, not Options.lb.
Please send a patch for that file only.
Thanks, Uwe.
--
http://www.hermann-uwe.de |
On Tue, May 15, 2007 at 10:58:59AM +0100, Luis Correia wrote:
const struct irq_routing_table intel_irq_routing_table = {
^
I'm not so sure about this. Does the name matter at all? Grepping
through the code, I see that almost all boards use the
Dear LinuxBIOS readers!
This is the automated build check service of LinuxBIOS.
The developer uwe checked in revision 2672 to
the LinuxBIOS source repository and caused the following
changes:
Change Log:
Whitespace fixes (trivial).
Signed-off-by: Corey Osgood [EMAIL PROTECTED]
Signed-off-by:
detection is the same on most chipsets (if not all) especially if it
comes to EDO/FPM detection.
Can't SPD data just be used to do that?
there is no SPD for EDO/FPM rams so testing would be the only way to
determine size and type (and chipsets have special functions to do
that). even if there
Hello,
I'm porting linuxbios to a plataform similar to msm800sel board (same
processor, companion e superio) and I'm in doubt about burning flash memory.
After compiling the code the generated elf format linuxbios.rom file can be
used to burn the memory or there's another step to convert
Hi Corey,
here are a few more comments on the file/patch:
On Tue, May 15, 2007 at 04:24:26PM -0400, Corey Osgood wrote:
Index: raminit.c
===
--- raminit.c (Revision 2671)
+++ raminit.c (Arbeitskopie)
@@ -68,75 +69,19 @@
/*
Sam Brightman wrote:
Hi guys,
I've reached acceptance that I'm never gonna have time to play with
this, and so have some spare hardware that I'm hoping may be of use. It
consists of 2 Asus P2B 440BX boards (with 400/450MHz PIIs, removable
BIOS) and a PII 266MHz with board unknown (it's in
On Thu, May 17, 2007 at 09:32:45AM -0300, Otávio Alcântara wrote:
I'm porting linuxbios to a plataform similar to msm800sel board (same
processor, companion e superio) and I'm in doubt about burning flash memory.
After compiling the code the generated elf format linuxbios.rom file can be
Hi!
Uwe, it is all the same to me.
Forget the patch then.
Luis Correia
On 5/17/07, Uwe Hermann [EMAIL PROTECTED] wrote:
On Tue, May 15, 2007 at 10:58:59AM +0100, Luis Correia wrote:
const struct irq_routing_table intel_irq_routing_table = {
^
I'm
Hi,
I own a commell lv-671 board and want to install a linuxbios, because of
supporting serial console.
I successfully made a qemu bios and it works as aspected
From the source I see, that the i82801db and i855pm is supported.
Is the i855pm compatible to i855GME ?
Or does anybody have
Add copywrite notice to Options.lb, this fully closes issue #53
Signed-off-by: Luis Correia [EMAIL PROTECTED]
---
01-copywrite.patch
Description: Binary data
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Any unauthorized disclosure, copying, distribution or reliance on
the contents of this information is strictly prohibited and may
constitute a violation of law.
Quoting Dieter Bloms [EMAIL PROTECTED]:
Hi,
I own a commell lv-671 board and want to install a linuxbios, because of
supporting serial console.
I successfully made a qemu bios and it works as aspected
From the source I see, that the i82801db and i855pm is supported.
Is the i855pm
Hi Joe,
thank you for the quick answer.
On Thu, May 17, [EMAIL PROTECTED] wrote:
As far as the i855pm compatible to i855GME, should be compatable.
lspci give me lines like this, so I think it is compatible:
00:00.1 System peripheral: Intel Corporation 82852/82855 GM/GME/PM/GMV
Intel
Quoting Dieter Bloms [EMAIL PROTECTED]:
Hi Joe,
thank you for the quick answer.
On Thu, May 17, [EMAIL PROTECTED] wrote:
As far as the i855pm compatible to i855GME, should be compatable.
lspci give me lines like this, so I think it is compatible:
00:00.1 System peripheral: Intel
* [EMAIL PROTECTED] [EMAIL PROTECTED] [070517 17:08]:
From the source I see, that the i82801db and i855pm is supported.
Is the i855pm compatible to i855GME ?
It should be, but according to Ron, the i855 was never supported and
working. It was checked in but it would not survive ram init. Has
Author: uwe
Date: 2007-05-17 18:00:30 +0200 (Thu, 17 May 2007)
New Revision: 2673
Modified:
trunk/LinuxBIOSv2/targets/iei/nova4899r/Config.lb
Log:
Add missing license header (closes #53).
Signed-off-by: Luis Correia [EMAIL PROTECTED]
Signed-off-by: Uwe Hermann [EMAIL PROTECTED]
Acked-by: Uwe
On Thu, May 17, 2007 at 03:27:01PM +0100, Luis Correia wrote:
Signed-off-by: Luis Correia [EMAIL PROTECTED]
Committed in r2673 (with minor syntax correction), thanks.
Uwe.
--
http://www.hermann-uwe.de | http://www.holsham-traders.de
http://www.crazy-hacks.org |
Hi,
On Tue, May 15, 2007 at 04:10:33PM -0400, Ning (Michael) Qu wrote:
We just got the tyan s2912 mainboard and we plan to build a LinuxBIOS
for it soon. I know there is a huge patch for s2912 which was not
merged into LinuxBIOS in Mar. How about the status of that patch or
how about the
On Tue, May 15, 2007 at 06:10:53PM -0400, Jeremy Jackson wrote:
Yes I saw ticket #7 after I sent that. Based on a hint that Uniflash
works, I punk'd the GPIO enable for this MSI MS-6337, and now it works!
Uniflash was working, but doesn't support SST49LF016C
dev=pci_dev_find(0x8086,
Dear LinuxBIOS readers!
This is the automated build check service of LinuxBIOS.
The developer uwe checked in revision 2673 to
the LinuxBIOS source repository and caused the following
changes:
Change Log:
Add missing license header (closes #53).
Signed-off-by: Luis Correia [EMAIL PROTECTED]
Hi, Yinghai,
Thanks very much for your reply! I will try the SVN first in these
days and update my status on this list.
On 5/17/07, yhlu [EMAIL PROTECTED] wrote:
Ning,
Try the code in SVN tree, and if it doesn't work, try the tar ball I
sent to this list.
YH
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linuxbios mailing list
Ning,
Try the code in SVN tree, and if it doesn't work, try the tar ball I
sent to this list.
YH
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linuxbios mailing list
linuxbios@linuxbios.org
http://www.linuxbios.org/mailman/listinfo/linuxbios
Hi
I realized some guys on this list were talking about porting ASUS A8N-SLI.
I started porting LinuxBIOS to ASUS A8N-E [1]. The boards seem to share some
similarities so maybe my code is of any use for A8N-SLI port.
At the moment I'am able to fully boot an open SuSE 10.0 using the standard
On Wed, 2007-05-16 at 11:49 -0700, yhlu wrote:
PCI slot one has all
four interrupts working.
What doesn't work yet is:
1) PCI slots 2-4
-there doesn't seem to be any interrupts generated. slot 2 and 4 can do
ifconfig up, but don't transmit or receive any packets. slot 3 refuses
to
On Thu, May 17, 2007 at 07:30:41PM +0200, Philipp Degler wrote:
I realized some guys on this list were talking about porting ASUS A8N-SLI.
I started porting LinuxBIOS to ASUS A8N-E [1]. The boards seem to share some
similarities so maybe my code is of any use for A8N-SLI port.
At the
On Thursday 10 May 2007 16:43, Corey Osgood wrote:
[something about LinuxBIOSv3]
Is there a public repository for LinuxBIOSv3?
Juergen
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* Juergen Beisert [EMAIL PROTECTED] [070517 20:21]:
Is there a public repository for LinuxBIOSv3?
Yes, there is:
svn co svn://linuxbios.org/repository/LinuxBIOSv3
Best wishes,
Stefan
--
coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
Tel.: +49 761 7668825 • Fax: +49 761
It's specific to this one motherboard.
I'm not sure how signed-off-by works, I got the info (not actual code
tho because it's Pascal) from Uniflash.
Jeremy
On Thu, 2007-05-17 at 18:06 +0200, Uwe Hermann wrote:
On Tue, May 15, 2007 at 06:10:53PM -0400, Jeremy Jackson wrote:
Yes I saw ticket
Uwe Hermann wrote:
Hi Corey,
here are a few more comments on the file/patch:
On Tue, May 15, 2007 at 04:24:26PM -0400, Corey Osgood wrote:
Index: raminit.c
===
--- raminit.c(Revision 2671)
+++ raminit.c
On Thu, May 17, 2007 at 02:42:27PM -0400, Jeremy Jackson wrote:
It's specific to this one motherboard.
Then it should be a board_enable function in flashrom, right?
I'm not sure how signed-off-by works,
See the wiki: http://linuxbios.org/Development_Guidelines
I got the info (not actual
On Thu, May 17, 2007 at 03:48:45PM -0400, Corey Osgood wrote:
Nope, please use spd_read_byte() everywhere.
spd_read_byte was removed to try an use a few less registers,
Rather use macros then, but both those functions should probably be
inline because they are so simple.
+ for(i = 0; i
--- Stefan Reinauer [EMAIL PROTECTED] wrote:
* Juergen Beisert [EMAIL PROTECTED] [070517 20:21]:
Is there a public repository for LinuxBIOSv3?
Yes, there is:
svn co svn://linuxbios.org/repository/LinuxBIOSv3
However, LinuxBIOSv3 doesn't show up in trac:
* Vlad [EMAIL PROTECTED] [070517 22:05]:
--- Stefan Reinauer [EMAIL PROTECTED] wrote:
* Juergen Beisert [EMAIL PROTECTED] [070517 20:21]:
Is there a public repository for LinuxBIOSv3?
Yes, there is:
svn co svn://linuxbios.org/repository/LinuxBIOSv3
However, LinuxBIOSv3
* Peter Stuge [EMAIL PROTECTED] [070517 21:50]:
I got the info (not actual code tho because it's Pascal) from
Uniflash.
If Uniflash is GPL then there's no problem adding the code to LB, but
the code origin should be documented.
Since uniflash is written in Pascal, you can only look at how
I am going to LinuxTag with Stefan and Carsten from Forth e.V.
I'm planning on havng a friend make a flyer or two about LB for the
expo and for later use too. They'll be part of the LB press kit as
well.
Which logos should we have on there?
* Manhole Tux
does anyone remember who made him and
+ device pci 1d.0 off end # USB (might not work, Southbridge code
needs looking at)device pci 1d.1 off end # USB (not populated)
is it me or is there a newline missing here ?
- Original Message -
From: Uwe Hermann [EMAIL PROTECTED]
To: LinuxBIOS Mailing List
Hi Everyone,
I recently purchased a VIA Epia MII 12000 with the intentions of using
LinuxBIOS but I am having a slight problem using a 4mb bios. According to
VIA this board does indeed support a 4mb flash
(http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=202).
I also
On Thu, May 17, 2007 at 10:21:43PM -0400, [EMAIL PROTECTED] wrote:
./flashrom
[..]
OK, only ENABLING flash write, but NOT FLASHING.
As you can see, flashrom thinks this is only a 512KB chip.
Flash chip size is measured in bits, 4Mbit=512kbyte.
You have the correct chip for the board. The
On Thu, May 17, 2007 at 10:21:43PM -0400, [EMAIL PROTECTED] wrote:
I also purchased a 4mb SST39SF040 bios chip which according to the manual
is in fact 4mb (http://www.sst.com/downloads/datasheet/S71147.pdf).
[...]
Flash part is SST39SF040 (512 KB)
[...]
As you can see, flashrom thinks this
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