Ward Vandewege wrote:
> On Sat, Dec 08, 2007 at 01:26:30PM -0500, Richard Smith wrote:
>> Doesn't seem to work for me.
>>
>> The -fno-stack-protector checking isn't working.
>
> Yep, known bug that needs fixing.
>
>> After hacking the
>> ne
Doesn't seem to work for me.
The -fno-stack-protector checking isn't working. After hacking the
necessary makefiles to have -fno-stack-protector I get:
gcc -m32 -nostdlib -nostartfiles -static -o linuxbios -T ldscript.ld crt0.o
/usr/bin/ld: section .id [ef64 -> ef7f] over
Carl-Daniel Hailfinger wrote:
>> fancontrol and cool'n'quite and the powerdown is missing without acpi.
>> i think there is just no acpi code in the lb part for the m57sli4
>>
>>
flashrom isn't working when lb is booted.
>>> Only on the newer boards i suppose?
>>>
>> only
[EMAIL PROTECTED] wrote:
> Carl-Daniel, I didn't say our datasheetd differ.. What I have said is that I
> did physical measurements on my motherboard and what I have measured didn't
> match at all the pin-out into the datasheet!! (see my previous posts..)
> Maybe this is only a minor hardware is
Uwe Hermann wrote:
> Sure, but how is the "boot from USB" functionality implemented? Forth
> code? C code? Can we port it to LinuxBIOS/FILO/GRUB somehow?
Its all forth. There are some forth/C hackers on the list. They could
certainly look at the code and how its done. The setup is starting t
Carl-Daniel Hailfinger wrote:
>> If so I only need that for the initial boot. After that I can issue
>> SPI read commands directly to the device.
>
> Which is a little bit slow/inefficient. I suspect that using a USB
> storage device (together with early USB initialization) will give you
> bette
I've had a couple of questions on what I'm doing and if this multi-TB
server is a commercial product... So I'm posting the response to the list.
I'm still working hard at OLPC. My @laptop.org address isn't on the
linuxbios list.
The fileserver project is personal.
- I've got a large amount o
Carl-Daniel Hailfinger wrote:
> For SPI flash size, the limitation is not how much the chipset can
> support, but how much the SPI translation feature in the IT8716F can
> support.
Are you talking about LCP reads -> SPI reads translation?
If so I only need that for the initial boot. After that
Richard Smith wrote:
> Is this an SPI part? Pretty much all recent SPI parts have block protect
Never mind. If I had read the entire thread first I would have know the
answer.
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Carl-Daniel Hailfinger wrote:
>
> OK, then we probably have either partial chip protection (by setting
> some bits in the chip) or partial mapping.
>
Is this an SPI part? Pretty much all recent SPI parts have block protect
bits in the status register. The "blocks" are usually some fraction of
Uwe Hermann wrote:
> functions in lib/spd.c and some 440BX-specific stuff in the resp. raminit.c.
> Will post soon.
>
> 82371EB southbridge which the 440BX boards use. I'll finish up that one
> first an post it after a few tests.
Great. I'll have reason to do some linuxbios hacking soon. I pur
Al Boldi wrote:
> I may be able to help out here. I have a GigaByte i440bx board with a
> dual-bios. There are two physical non-socketed chips, but the fallback logic
> is software conntrolled.
Oh. I don't care about bricking. My boards have sockets and unbricking
things is my specialty. I
Uwe Hermann wrote:
>> Maybe I'll take a Sunday afternoon and try to boot the code one of them on
>> the IMS boards I have.
>
> That would be great. If you stick one DIMM in slot 0 it should boot
> right away (yes, this will be fixed to support all combinations), just use
> either of the 440BX ta
Uwe Hermann wrote:
> On Wed, Nov 28, 2007 at 01:15:01AM +0700, Darmawan Salihun wrote:
>> I'm not sure if there is somekind of /dev/cmos in Linux. But
>> IIRC, there is a project that working on such a thing. I
>> just don't know where exactly it is.
/dev/nvram
dd if=/dev/nvram of=nvram.img bs=1
Stefan Reinauer wrote:
> * Uwe Hermann <[EMAIL PROTECTED]> [070524 20:55]:
>> I tend to agree, but I'd like to hear the opinion of Richard (CC'd).
>>
One drawback Ive discovered of gmail is that it will filter out
duplicates so a cc: and a subscription to the list means that I only get
one copy
Carl-Daniel Hailfinger wrote:
>
> How do we deal with fan control, then? Most recent mainboards use
> SMM for fan control. Once you forbid SMM, you have to trust the OS
> to perform fan control correctly, which will fail if the machine
> crashes or locks up.
Fans are mechanical and will always f
Jordan Crouse wrote:
> Also, remember that the whole process was made easier by the fact that
> OFW+OLPC is a very specialized platform - it just isn't intended to
> change - so much so that we can hard code PCI BAR assignments and sizes.
> Its a bit more difficult to implement this sort of proces
ron minnich wrote:
> So, that's what matters. In 10 or 15 years, the BIOS landscape will be
> unrecognizable, as will (I hope) the OS landscape. But, we can hope
> that it will be open source, not closed source, that wins.
True words of wisdom. I'll respond to the questions privately.
--
Richa
Stefan Reinauer wrote:
>>> Maybe it won't get shipped, but that doesn't mean it won't get used.
>>> OLPC-users/-developers can flash any firmware they like, correct?
>> Yes. After you request and receive a developer key.
>
> Where/how can this be done?
Currently not necessary because the securit
Bari Ari wrote:
> C vs Forth.
>
> Does anyone know if this was the main reason for the switch from
> LinuxBIOS to OFW? What were the other issues involved and why did OFW
> seem to be a better fit for OLPC? Were there any other politics involved
> (logic vs feelings, corporate, personal agendas
Jordan Crouse wrote:
> I have no problem at all with somebody porting V3 to work on the OLPC -
> I hope they do it for every Geode platform they can get their hands on.
> But perpetrating iffy code that will never be used in production for a board
> that will never *be* in production to me is sill
Uwe Hermann wrote:
> Maybe it won't get shipped, but that doesn't mean it won't get used.
> OLPC-users/-developers can flash any firmware they like, correct?
Yes. After you request and receive a developer key.
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Carl-Daniel Hailfinger wrote:
> On 02.05.2007 19:50, ron minnich wrote:
>> I am debating removing OLPC from tree; comments?
>
> Please don't. I still hope we can offer LinuxBIOS as an alternative
> for shipped machines.
Yes. Please don't. The OLPC will have a long life and just because we
use
Quux wrote:
> Myles Watson schrieb:
>> The Register is reporting that OLPC is going to produce a version that boots
>> windows. Does anyone know how they are planning to do it? Are they still
>> going to use LinuxBIOS? Will it affect the Google Summer of Code project?
>>
>> http://www.theregis
Bari Ari wrote:
> The Java client currently only supports the logic analyzer.
>
> uClinux is up and running on the MicroBlaze with support for the serial
> port and Ethernet. The MicroBlaze needs to tied to the logic analyzer
> and some apps and VHDL need to be written to support memory emulati
Bari Ari wrote:
> This is what I started working on with the PLAICE project
> http://flash-plaice.wikispaces.com. Looks like about the same features
> only we add a logic analyzer to the mix for under $200.
Cool. If I buy one is it ready or do you still have stuff to finish?
--
Richard A. Sm
I just got back from an extended stay in Asia and while I was there was
introduced to a nifty little device for SPI flash chips. When the mfgs
all switch to SPI it may actually be much easier to deal with non-socket
flashes.
http://www.dediprog.com/product.php?UID=12
$275 US gets you a progra
James E. Bradley wrote:
>>> I recently purchased a Tyan S2882 motherboard so that I could play with
> main/grub/builtin.o:builtins.c:(.text+0x1db7): more undefined references
> to `__stack_chk_fail' follow
> make: *** [filo] Error 1
>
> I've attempted the compile with gcc 4.1.2 (Ubuntu 4.1.2-0ub
Anton wrote:
> P.S. Flash chip is *infamous* SST25LF080A :-)
Ah, flashrom of course does not support SPI chips.
>>> Yep. Solutions / ideas?
>> olpcflash should work.
>
> He-he. SST and Winbond are there :)
olpcflash will not work. olpcflash does very specific things that are
Uwe Hermann wrote:
>> least it worked for the Bitworks IMS board. If you pull V1 to test then
>> I recommend that you use older gcc's and tweak the makefile to use them.
>> I think you may need to use gcc-2.95 or gcc 3.3
>
> Do you think that makes a difference? I used gcc 4.1.2. I had to fix
ron minnich wrote:
Yeah.. Thats the problem. V1 code worked great but something in the
port to C in V2 is jacked up.
>>> Are you sure v1 works? Uwe seems to have suggested that it doesn't.
>> I'm not sure. I recently tested another 440BX board using the v1 code
>> (Tyan S1846). It got
Oscar Molin wrote:
> that was a post by Richard Smith, not Ron. my bad
> I've just started trying to understand this stuff and I read a post
> by Ron from 2004 where he had two boards working well apparently, he
> didn't mention any memory issues.
Yeah.. Thats
Stefan Reinauer wrote:
>> Another thing is something that a friend of mine says yesterday: why
>> instead of removing the chip, take and desolder only the vcc pin, put
>> a micro-switch on it, solder another chip on top of the existing and
>> do the same with its vcc pin, so with two micro-switche
Ward Vandewege wrote:
>
> Yes, right here:
>
> http://www.loet.de/images/ideflasherSchematic.gif
Of course its never that simple. The problem with just adding a 3.3V
regulator in line to the flash sockets is that the 8255 outputs are
still 5V. So you either need to add some 3.3V buffers wit
Carl-Daniel Hailfinger wrote:
>>> Yeah, sorry, my bad :( I was referring to LPC (PLCC32). I don't know
>>> anything
>>> about SPI.
>> O'k. Does anyone common w/ SPI flashing / BIOS Saviour tools out there?
>
> Easiest would be to desolder the CE# "chip enable" pin, connect it to
> high level, at
Ward Vandewege wrote:
> Suggestions on how to build/where to find such a voltage regulator? The
> manual isn't very helpful in that respect - at least as far as I can make
> out. Would adding a resistor to the +5V line be sufficient?
Digikey or mouser will have lots of 3 pin linear regulators in
Quux wrote:
> Ward Vandewege schrieb:
>> A proper programmer would be useful, but only if it can be used with free
>> software. There's also this rom-emulator:
>>
>> http://www.tech-tools.com/er3.htm
>>
>> Richard Smith told me that the dos-based cli
Carl-Daniel Hailfinger wrote:
>
> You could instead build your own BIOS saviour with a soldering iron,
> two chips and a switch. More compatible, larger sizes, still available.
I could. However, I don't want to. I rather want to purchase up a lot
of the remaining stock before they are all gon
Ooops. forgot to cc: the list.
Ward Vandewege wrote:
>> E.U. Does anybody know of a U.S. vendor that has stock remaining (I
>> know, they're not manufactured anymore)?
>
> Funny you should mention that. I just ordered 2 this morning from
that place
> in Sweden - and it's more like $45 de
Ed Swierk wrote:
>
> I used flashrom several months ago to read the vendor's BIOS. I did
> not actually compare it against the one posted on their web site, but
> I thought the contents looked plausible when I went grepping through
> it for strings.
>
> I can give it another try when I get my han
anitha boyapati wrote:
>
> Can somebody help me out? I work with cygwin -NT 5.1.gcc version is 3.4.4.
> Thnks in advance.
>
There isn't any support for building under cygwin so you are sort of on
your own. I suspect that buildtarget didn't generate a proper config
file or makefile. Do you
Segher Boessenkool wrote:
> Does LinuxBIOS build with -ffreestanding? If you don't, that's
> a bug for you too -- if you do, and that option does not disable
> SSP, that's a GCC bug -- either a mainline GCC one, or one in
> FC6, depending on how they enable it by default.
We do not (at least as
Segher Boessenkool wrote:
> You don't have to detect when it's active; you can just always
> disable it -- well that is, you first have to check if your GCC
> version supports it at all, it will bail on the command line flag
> otherwise.
Thats what I meant. You have to know when to use the disab
ron minnich wrote:
> The background is that ubuntu and, perhaps, fc6, set some options on
> the gcc pass that make no sense on a bios build. This is a guess. The
> result is a non-working linuxbios on those machines. It is believed
> the issue is some sort of stack protection flag that gets set.
But its not getting very good marks...
I wasn't aware that it requires OFW to be resident during the kernel
boot to handle the devtree. So it looks like its usefulness for
linuxbios is minimal.
The good side is that it appears that a x86 implementation unified with
the sparc and powerpc code
Segher Boessenkool wrote:
>> Let me know when the discussion starts, I don't generally read LKML
>> but would like to add words of support if possible.
>
> Even better -- just cross-post to here.
We want the patch to get reviewed by jon corbet first and then it will
probably get submitted by so
For those of you not on the OLPC devel list...
We have the unified device tree code for all arch's close to ready. Its
in /proc for now but I think it will be moved into /sys in the next week
or 2.
Look for it in an olpc kernel in the near future.
I think this will help us out in linuxbios qu
Forgot to copy the list:
Uwe Hermann wrote:
> Interesting. How does that work and on which level. (hardware?
> software?).
Both. There is a latch that controls the write line to the SPI flash
chip. After looking in a special place for updates it will clear that
latch and it can only be set aga
Stefan Reinauer wrote:
> * Richard Smith <[EMAIL PROTECTED]> [061207 14:28]:
>> I think for a demo you want to show LaB (Linux as Bootloader, where
>> linux is in the ROM) and boot linux directly to a shell prompt, as fast
>> as you can make it. Thats a short, powerfu
Carl-Daniel Hailfinger wrote:
> * BIOS bugs can be fixed even if upstream is not ready/cooperating
> (not that I would want to suggest that upstream was uncooperative)
>
You mean upstream from OLPC here right? Without a developer key a user
will not be able to reflash the BIOS.
--
Richard A
Peter Stuge wrote:
> * Mention OLPC. (But what are the important points?)
Flexibility. OLPC would have had a _much_ more difficult time getting
things done if it was not using LinuxBIOS. We have had to do some
pretty custom work under the hood.
Size is another big issue. It interesting to no
Stefan Reinauer wrote:
> * Richard Smith <[EMAIL PROTECTED]> [061130 08:17]:
>> I've also stopped receiving a copy of my posts which is why I thought
>> they never made it.
>
> can you send me a message id from one such message?
>
Sure. My Test message is on
Segher Boessenkool wrote:
> That's what I thought -- turns out, the mail server is
> just awfully slow (and getting worse -- it has a delay
> of about 3:20 on your message, it was 2:25 when I first
> investigated). Looks like a spamfilter gone crazy or
> something similar.
I've also stopped rece
For some reasons none of the last batch of messages with linubios in the
cc: showed up. This is a direct test.
Sorry for the noise.
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Tom Sylla wrote:
>
> We want the plugin card's option ROM to be run, and the "on-board"
> controller should not be used. What is the correct way to achive what
> we want? Basically, a way to hide the ATI controller would be
> sufficient.
Tom,
Search the archives for eaglelion and MB1030. There
Jon Dufresne wrote:
> I am really at a loss of what to do next. I am having a hard time
> debugging this, mostly because I don't exactly know what I need to do
> in the first place.
>
> Any tips for getting ram to work correctly?
As Ron said, Without docs you have a very hard road ahead.
The fo
Simon Labrecque wrote:
> I'm sorry but I don't understand your reply. Too late for what exactly?
Simon,
What he is trying to describe is that to use a PCI serial port card you
fist have to enumerate the PCI bus and assign resources. Thats done
after RAM + a bunch more is functional. So it doesn'
Uwe Hermann wrote:
> Both, partly. I don't want to do further cut'n'paste programming,
> there's enough of that in the tree already. I started mostly from
> scratch and tried to properly document the code. Some parts I'll reuse from
> the E7501
Rock on. \m/ You the man. Go Uwe Go!
> I guess, an
Tom Sylla wrote:
>> I'm just a bit curious - are there settings/registers in northbridges
>> which can seriously brick a mainboard and/or RAM (physically) if abused
>> properly?
>
> There is nothing you can do from software to physically harm SDR, DDR,
> or DDR2 devices.
100% agree with Tom. I
Kurt André Selbach wrote:
> uhc_init: uhc_init setting framelist to: 1decb9f0
> uhc_start: Starting UHCI
> dump_uhci: HCI at 1800
> uhc_init: Found UHCI at 1820
> uhc_reset: Resetting UHCI"
>
> The computer now "hangs" no boot nothing.
>
> Using the filo from ehterboot, it get's to the "Linu
Dave Crossland wrote:
>> Intel graphics drivers are not free. The are just more free than AIT and
>> Nvidia.
>
> http://intellinuxgraphics.org/license.html says its all "GPL and
> additional rights" and "X.org MIT license". Whats not free about this?
>
Sorry bad choice of words on my part.. I m
Dave Crossland wrote:
> What are the chances for Intel boards, since Intel are the only
Very low...
> graphics card vendor with Free drivers at the moment?
>
Intel graphics drivers are not free. The are just more free than AIT and
Nvidia.
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Kurt Andre' Selbach wrote:
> The issue is the linuxbios.rom file is allready 256kb, Where would i
> change the size of this built "rom file" and what should i set it to:
Try this:
Snap your video bios image to 64KiB with dd
option ROM_SIZE=(256-64)*1024
option FALLBACK_SIZE=128*1024
romimage "
ron minnich wrote:
> I was only mentioning this board as a reference source.
For reference I think the bitworks/ims is probably better.
Fundamentally they are the same but I remember doing a lot of tweaking.
Been a while though so its hazy..
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linu
Al Boldi wrote:
>> The issue is V2. The V1 stuff is just for reference on porting to V2.
>
> So what's V1 missing that only V2 has?
Our help. V1 is dead and unsupported.
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Corey wrote:
> If I understand the layout of the repository correctly, this should
> work ->
> http://www.openbios.org/viewvc/trunk/LinuxBIOSv1/src/mainboard/digitallogic/smartcore-p3.tar.gz?view=tar
> . I will have a 440bx-baseed board of my own, some generic gateway model, in
> a few hours, but
Here's a novel idea:
How about we ask the original author Adam Sulmicki <[EMAIL PROTECTED]>
what he thinks needs to be done to boot XP?
I believe he still reads the list but I've cc'ed him just in case.
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Stefan Reinauer wrote:
>> there for code and what exactly needs to be implemented. I still have
>> the 440zx mobo (bios mod never worked out), and in the morning I
>> should be able to get a 440bx, one that hopefully has a removable bios
>> chip.
Yeah! A developer to the rescue. Go! man Go!
>>
Stefan Reinauer wrote:
> * ron minnich <[EMAIL PROTECTED]> [061107 16:53]:
>> Challenge to the list: find that port patch Richard mentioned. I have to go
>> to
>> a meeting. If someone can find it, I'll check it out and commit it.
>
> The full source is here (sent around by YhLu)
> LinuxBIOSv2/u
ron minnich wrote:
The link btw.
http://www.linuxbios.org/pipermail/linuxbios/2006-July/015051.html
> you just made the case for Trak :-)
I don't deny that some sort of patch management is not useful and
necessary even. I just don't like _having_ to do all things Trac as its
not near as easy a
ron minnich wrote:
> anybody built it lately? I forget how it all goes together.
Check the archives.. A patch was sent about 4 months ago that ports it
to V2..
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Johan Rydberg wrote:
>> For this simulator to be done, a whole lot of understanding of the
>> hardware components is required, maybe including their errata. Adding
>> support for a new component for such a simulator _might_ be more work
>> than writing a bios for the same chipset.
>
> Yeah. I di
Stefan Reinauer wrote:
>> there for code and what exactly needs to be implemented. I still have
>> the 440zx mobo (bios mod never worked out), and in the morning I
>> should be able to get a 440bx, one that hopefully has a removable bios
>> chip.
Yeah! A developer to the rescue.
>> Also, as fa
Stefan Reinauer wrote:
> * Li Haiqiang <[EMAIL PROTECTED]> [061106 05:45]:
>> I write the 'ls -xxx' results to the PCI config registers.
>> Can it work?
>
> As a first step this is worth a try, yes.
>
> But you need to find out which are relevant, and the order plays a big
> role. Grab yourse
Li Haiqiang wrote:
> What does debug code 0xf9 mean?
> It stopped here.
Li,
The 440bx is NOT COMPLETE. It will NOT function. It is BROKEN. The
port is not finished. Its does not enable RAM.
Hopefully, one of those translates correctly. Do you understand?
To make it work you need to add a l
>> From: Li Haiqiang <[EMAIL PROTECTED]>
>> Date: 6 november 2006 2:39:39 GMT+01:00
>> To: Segher Boessenkool <[EMAIL PROTECTED]>
>> Subject: Re: [LinuxBIOS] Hello, I have a problem to put the
>> linuxbios on my mainboard ms6163.
>>
>> Yes, I have only one memory module.
Li, See my mail earlier
Stefan Reinauer wrote:
> The search function is not worse than searching the mailing list..
Its on organizational thing rather than a brute force search function thing.
>> Finding/implementing some sort of trac<->mailing list gateway would be
>> ideal.
>
> Ok. So what should the gateway look
Stefan Reinauer wrote:
> Patch management on the mailing list just does not work. It never will.
>
The Linux Kernel guys seem to think otherwise.
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Segher Boessenkool wrote:
> LinuxBIOS is really low-volume but it already almost takes me longer
> to keep up with the patch flow than it takes for Linux.
>
>
> Don't take this as a flame, I just need a working working
> environment :-)
OLPC uses trac as well and I'm going to have to side wit
Uwe Hermann wrote:
>> This has been done. It's now i82371eb.
>
> Why not 82371eb (that's the official name AFAIK)? Is there some
> requirement that directories have to start with a letter?
Its a C thing. You can't start a variable with a number. That allows
you to match the directory name to
Thinking about this some more, whats needed is a lot of grunt work that
doesn't necessarily have to be done by the same person who fixes the ram
init code.
Here's TODO from my past emails..
> 1. I named both the northbridge and the southbridge i440bx. While I
> don't think it s a huge problem.
Stefan Reinauer wrote:
> * Richard Smith <[EMAIL PROTECTED]> [061031 17:54]:
>> You can essentially drop this one. I started on it to work on the OLPC
>> (is a geode) but found out it had a cs5535 rather than a cs5536. It
>> would be marked RED.
>
> I d
Chris Ziomkowski wrote:
> Second, the mainboards all come with an 8 Mbit BIOS flash. Will this be
> enough to boot Linux directly? There is no IDE capability on these
> boards, so the only disk options are USB or SATA. I don't need video
> support. There will only be a serial console.
Missed t
Uwe Hermann wrote:
> A few more boards are left... any hints?
>
> On Wed, Oct 25, 2006 at 07:50:32PM +0200, Uwe Hermann wrote:
>> there are a few boards left which don't yet have a status entry?here:
>> http://www.linuxbios.org/Supported_Motherboards
>>
>> Advantech SOM GX DB533-C
You can ess
Chris Ziomkowski wrote:
>
> Any comments would be appreciated. Am I getting in over my head? Do you
> think linuxbios is stable enough to consider for a commercial product?
Stability is a matter of reference. On chipsets/mainboards that have a
bit of time under their belt they are very stabl
> > list? That could be the first step for getting it approved.
> > That way you know its abuild clean before you review it.
>
> Are you suggesting a development and a stable tree?
No.
> Is this better than running abuild locally? (besides potential tool
> chain issues)
Because on my laptop (wh
LinuxBIOS information wrote:
> Build Log:
> Configuration of dell:s1850 has ben broken
> Configuration of intel:jarrell has ben broken
> Configuration of supermicro:x6dai_g has ben broken
> Configuration of supermicro:x6dhe_g has ben broken
> Configuration of supermicro:x6dhe_g2 has ben broken
> C
On 10/24/06, Ed Swierk <[EMAIL PROTECTED]> wrote:
> On 10/24/06, yhlu <[EMAIL PROTECTED]> wrote:
> > You will lose the revision history to the dir and files.
>
> That's true if the patch were applied as is. I will split it into a
> patch plus a sequence of svn move operations so that revision histo
Ed Swierk wrote:
> The third one goes whole-hog and replaces every remaining instance of
> "stream" with "payload" in code, filenames and directory names. The
> diff is pretty huge due to the file renaming.
I've been saying we should do this for years... But never got traction.
+1 by me. I've
Uwe Hermann wrote:
> You can work around this with a small trick. Just do an 'svn add foo.c'
> or 'svn rm foo.c'?(possible even without svn commit permissions).
> The 'svn diff' will then include the removed/added file in the patch.
Noted.. That probably needs to be added somewhere in the develop
>
> Please everyone let me know if you have more information on any "?" entries
> on the http://www.linuxbios.org/Supported_Motherboards page (or update the
> wiki directly).
>
Excellent work.. Consider adding a color legend? Red and green are
pretty obviousto the lay reader but yellow may not be
On 10/23/06, Stefan Reinauer <[EMAIL PROTECTED]> wrote:
> * ron minnich <[EMAIL PROTECTED]> [061023 02:29]:
> > so, for my benefit, what does the process look like.
> >
> > I make a change. I do this:
> > svn diff
> > and mail it to the list, with a signed-off-by: on it, and then what?
>
> Then peo
> I think the error is something different. I can mount my USB key that I
> formatted ext2, but when I try /dev/hda1 instead of /dev/sda1, it says
> Unknown error 6, which is "no such device or address".
>
Forgive if you have done this already Just trying to cover all the
simple fixes first. Ha
On 10/13/06, Myles Watson <[EMAIL PROTECTED]> wrote:
> >> I can't mount my IDE hard drive, even though I can see it in the /proc
> >> filesystem. I'm trying mount -t ext3 /dev/hda1 /hdd.
>
> >/dev/hda[?] don't exist in the simple filesystem. Did you add the
> >devices to devices.txt?
> Yes I did
> I can't mount my IDE hard drive, even though I can see it in the /proc
> filesystem. I'm trying mount –t ext3 /dev/hda1 /hdd.
>
/dev/hda[?] dont exist in the simple filesystem. Did you add the
devices to devices.txt?
> When I do an lspci, all the IRQs are routed to IRQ 0. I don't know if this
I've had a request for the slides from AMD on thier LinuxBIOS roadmap.
Said person is designing an Opteron Rev F platform and is interested
in using LinuxBIOS.
Any luck on getting the documentation and permission in order so we
can post them up on the website.
--
Richard A. Smith
--
linuxbios
> I don't see a problem with "v2 or later". Everybody who doesn't like to
> use GPLv3 (when it's released) can just chose to use v2. That's
> perfectly legal.
>
Actually I don't think we have a choice.
LWN.net just ran an article on the busybox GPLv2 GPLv3 issue which has
caused a fork of busybox
>Richard: Is GPLv2 or later fine? Are you the copyright owner or maybe
> a company you work for?
GPLv2 or later is fine for me. That said however, very little of
that som_gx533 and p2b code was created by me. The som stuff is a
copy of the Rumba board and the p2b is a copy of the ims st
>I have a semi related question. I see that the OLPC project uses
> buildroot to create a root filesystem. I've done the same for a few
> projects. I'm wondering though, how they convert the filesystem to a
> disk image. I went over the docs on the wiki and used google, and I
> don't know how t
I think this is a timely article since we where just discussing this.
http://www.linux.com/article.pl?sid=06/09/29/164207
Executive Summary:
A buch of GPL code ended up getting distributed in binary only. Over
a bunch of smally ports the license files ended up getting dropped.
Key point of the
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