On Fri, 2008-11-28 at 11:54 +0100, Leon Woestenberg wrote:
I found out that re-programming the end point FPGA again *just* after
*uboot* read it, and before Linux kernel has started, makes the end
point appear properly.
Either u-boot leaves the end point in bad state, or the root complex
On Fri, 2008-11-28 at 13:50 +0100, Leon Woestenberg wrote:
Hello,
AMCC PPC460EX canyonlands board with an FPGA PCIe end point:
u-boot sees the end point, but Linux does not:
U-Boot 1.3.3-00249-ga524e11 (Jun 30 2008 - 16:05:51)
CPU: AMCC PowerPC 460EX Rev. A at 800 MHz (PLB=200,
Hi all,
I am told that after some discussion it has been decided that there is
really no longer any need for a separate linuxppc-embedded mailing list.
So I will do the following shortly:
remove the [EMAIL PROTECTED] mailinglist (the archives
will still be available).
redirect
On Saturday 29 November 2008 06:41:53 Wolfram Sang wrote:
Hello Laurent,
After switching to the powerpc architecture and Jochen Friedrich's
driver, I've experienced erratic transfer timeouts. Quite frequent at
first (2.6.26), the problems disappeared on the road to 2.6.27 and have
now
Trent Piepho wrote:
Seems like it should keep the clock registers at what u-boot set them too.
Or we could have U-Boot put the i2c clock frequency into the I2C node, and let
the driver program the hardware again. That would keep the ugliness in U-Boot.
--
Timur Tabi
Linux kernel developer at
On Nov 30, 2008, at 10:53 PM, Benjamin Herrenschmidt wrote:
On PowerPC 4xx or other non cache coherent platforms, we lost the
appropriate cache flushing in dma_map_sg() when merging the 32
and 64-bit DMA code.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
Acked-by: Becky Bruce
This function is alike to the simple of_get_gpio(), but accepts new
argument: flags. This new function will be used by the drivers that
need to retrieve additional GPIO information, such as active-low flag.
Also, the patch changes default (simple) .xlate routine to warn about
bogus ( 2)
On Fri, Nov 28, 2008 at 03:04:04PM +0100, Hommel, Thomas (GE EntSol,
Intelligent Platforms) wrote:
Hi all,
I'm currently developing a driver and want to make use of the DMA
offload engine. Data has to be transferred from memory to a device on
the local bus and vice versa.
At a first look,
On Fri, 28 Nov 2008, Ingo Molnar wrote:
* Steven Rostedt [EMAIL PROTECTED] wrote:
On Wed, 26 Nov 2008, Steven Rostedt wrote:
Paul,
This patch series addresses the issues you brought up as well as
adds some more enhancements and fixes. This series is added on
top of the
Hello all,
On Mon, Dec 1, 2008 at 9:12 AM, Benjamin Herrenschmidt
[EMAIL PROTECTED] wrote:
On Fri, 2008-11-28 at 13:50 +0100, Leon Woestenberg wrote:
AMCC PPC460EX canyonlands board with an FPGA PCIe end point:
u-boot sees the end point, but Linux does not:
U-Boot 1.3.3-00249-ga524e11 (Jun
Timur Tabi wrote:
Trent Piepho wrote:
Seems like it should keep the clock registers at what u-boot set them too.
Or we could have U-Boot put the i2c clock frequency into the I2C node, and let
the driver program the hardware again. That would keep the ugliness in U-Boot.
On Monday 01 December 2008, Leon Woestenberg wrote:
Now, if I re-program the end-point FPGA during the u-boot boot
time-out, Linux will recognize the end-point.
It's possible that either the reset in between goes bonkers or something
else causes your FPGA to stop responding. It looks
André Schwarz wrote:
Wouldn't it be easier to omit frequency re-programming at all ?
Maybe configurable for non U-Boot users ...
Well, the real problem is that Linux is ignoring what the boot loader has done.
This is bad, regardless as to which boot loader you're using.
The question is, do
Removed unused branch labels
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
---
arch/powerpc/kernel/head_fsl_booke.S |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/head_fsl_booke.S
b/arch/powerpc/kernel/head_fsl_booke.S
index 8942d7a..2b57605 100644
Hi,
I think there may be a plausible issue here. If not, maybe I'll get
an education :)
cpu_callin_map is used during secondary CPU bootstrap to notify the
waiting CPU that the new CPU is coming up. __cpu_up clears
cpu_callin_map[cpu] and then polls the same location, waiting for
On Mon, 2008-12-01 at 15:30 -0600, Nathan Lynch wrote:
Hi,
I think there may be a plausible issue here. If not, maybe I'll get
an education :)
cpu_callin_map is used during secondary CPU bootstrap to notify the
waiting CPU that the new CPU is coming up. __cpu_up clears
On Mon, 1 Dec 2008, Andr? Schwarz wrote:
Timur Tabi wrote:
Trent Piepho wrote:
Seems like it should keep the clock registers at what u-boot set them
too.
Or we could have U-Boot put the i2c clock frequency into the I2C node, and
let
the driver program the hardware again.
From: Julia Lawall [EMAIL PROTECTED]
As noted by Akinobu Mita in patch b1fceac2b9e04d278316b2faddf276015fc06e3b,
alloc_bootmem and related functions never return NULL and always return a
zeroed region of memory. Thus a NULL test or memset after calls to these
functions is unnecessary.
This was
On Mon, 1 Dec 2008, Scott Wood wrote:
Trent Piepho wrote:
U-boot could pass in bus-frequency to let software know the speed of the
I2C bus from Linux. Seems like a standard property for bus nodes.
clock-frequency is standard, though it should probably be the input frequency
rather than
Trent Piepho wrote:
For a bus device like an i2c controller, you really have two clocks. The
input clock the controller runs from and the speed it runs the bus at. One
could say that one clock is for the device node and the other clock is for
the device's sub-nodes.
We could add a property
On Wed, Nov 26, 2008 at 10:19 AM, Hollis Blanchard [EMAIL PROTECTED] wrote:
Ensure that total memory size is page-aligned, because otherwise
mark_bootmem() gets upset.
This error case was triggered by using 64 KiB pages in the kernel while
arch/powerpc/boot/4xx.c arbitrarily reduced the
On Thu, Nov 27, 2008 at 5:44 PM, Ilya Yanok [EMAIL PROTECTED] wrote:
This patch adds support for page sizes bigger than 4K (16K/64K) on
PPC 44x.
PGDIR table is much smaller than page in case of 16K/64K pages (512
and 32 bytes resp.) so we allocate PGDIR with kzalloc() instead of
Trent Piepho wrote:
The Linux code could use current-speed to know if it should program the
registers. I.e., if current-speed is present and non-zero, then leave the
frequency registers alone. Otherwise u-boot or whatever might not have
programmed the I2C controller and the driver can do what
On Mon, Dec 01, 2008 at 05:06:03PM -0600, Hollis Blanchard wrote:
On Thu, Nov 27, 2008 at 5:44 PM, Ilya Yanok [EMAIL PROTECTED] wrote:
This patch adds support for page sizes bigger than 4K (16K/64K) on
PPC 44x.
PGDIR table is much smaller than page in case of 16K/64K pages (512
and 32 bytes
Laurent Pinchart [EMAIL PROTECTED] wrote:
Transmission timeout after one second. The first TX buffer descriptor status
hasn't been modified by the CPM. The CPM state dump shows that processing of
...
This sounds very similar to a problem I have seen on MPC8247 and
MPC8248.
It could be a
I wrote:
Our production equipment is using Linux 2.6 with the out-of-tree
i2c-algo-8260.c by Dan Malek and Brad Parker.
Oops, I meant to say Linux 2.4.20 (MontaVista).
-=] Mike [=-
___
Linuxppc-dev mailing list
From: Madhulika Madishetty [EMAIL PROTECTED]
This patch contains the initial framework for AMCC Redwood board.
Signed-off-by: Madhulika Madishetty [EMAIL PROTECTED], Tirumala Reddy
Marri [EMAIL PROTECTED],
Feng Kan [EMAIL PROTECTED], Vidhyananth Venkatasamy [EMAIL PROTECTED],
Preetesh Parekh
On Mon, 2008-12-01 at 17:06 -0600, Hollis Blanchard wrote:
Ben, you had some comments on the previous version of this patch. Have
those been addressed to your satisfaction? If so, could you please
queue this for 2.6.29?
From the description, they have, however I haven't had a chance to look
This is a rework of the previously posted set of patches.
Patch 1 is the user level patch to add the SPU events to the user
OProfile tool.
Patch 2 is a kernel patch to do code clean up and restructuring to make
it easier to add the new SPU event profiling support. This patch makes
no
This patch adds the SPU event profiling support for the IBM Cell
processor to the list of available events. The opcontrol script
patches include a test to see if there is a new cell specific file
in the kernel oprofile file system. If the file exists, then the
kernel supports SPU event
This patch restructures and cleans up the code a bit to make it
easier to add new functionality later. The patch makes no
functional changes to the existing code.
Signed-off-by: Carl Love [EMAIL PROTECTED]
Index: Cell_kernel_11_10_2008/arch/powerpc/oprofile/op_model_cell.c
This patch adds the SPU event based profiling funcitonality for the
IBM Cell processor. Previously, the CELL OProfile kernel code supported
PPU event, PPU cycle profiling and SPU cycle profiling. The addition of
SPU event profiling allows the users to identify where in their SPU code
various
(replying to myself again)
I wrote:
But the key difference is that we see a persistent failure, while the
erratum only mentions a problem with the next transaction.
I think the timeout recovery code is not adequate for these CPM errors,
and that is why a transient error becomes a persistent
On Mon, Dec 01, 2008 at 03:37:15PM -0800, [EMAIL PROTECTED] wrote:
From: Madhulika Madishetty [EMAIL PROTECTED]
This patch contains the initial framework for AMCC Redwood board.
Signed-off-by: Madhulika Madishetty [EMAIL PROTECTED], Tirumala Reddy
Marri [EMAIL PROTECTED],
Feng Kan [EMAIL
Added 85xx specifc smp_ops structure. We use ePAPR style boot release
and the MPIC for IPIs at this point.
Additionally added routines for secondary cpu entry and initializtion.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
Signed-off-by: Trent Piepho [EMAIL PROTECTED]
Signed-off-by: Kumar Gala
On Dec 1, 2008, at 12:01 AM, Benjamin Herrenschmidt wrote:
We were missing the CPU_FTR_NOEXECUTE bit in our cputable for all
these processors. The result is that update_mmu_cache() would flush
the cache for all pages mapped to userspace which is totally
unnecessary on those processors since we
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