Ben, Christian,
On Thu, 7 Jan 2010 17:17:38 +0100, Jean Delvare wrote:
On Wed, 6 Jan 2010 19:41:05 -0800 (PST), Christian Kujau wrote:
Hi Jean,
On Wed, 6 Jan 2010 at 17:37, Jean Delvare wrote:
I think that sysfs files creation should be moved to the end of
probe_thermostat() and
On Fri, 2010-01-29 at 12:23 +1100, Benjamin Herrenschmidt wrote:
On machine that don't have SMT, I would like to avoid calling
arch_scale_smt_power() at all if possible (in addition to not compiling
it in if SMT is not enabled in .config).
Now, I must say I'm utterly confused by how the
Hi,
On a powerpc system running linux, when I see cat /proc/cpuinfo, I
find the value of timebase. Can somebody suggest on what is that, and
how is it used?
Regards,
Ajay.
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On a powerpc system running linux, when I see cat /proc/cpuinfo, I
find the value of timebase. Can somebody suggest on what is that, and
how is it used?
It is the frequency (in Hz) of the clock that increments the Time Base
Register (TBR).
After reading TBR (or calculating a difference
On Thu, Jan 28, 2010 at 05:20:55PM -0600, Joel Schopp wrote:
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
Really 2, 3, or 4? When you have 4 idle threads out of 4, performance
becomes
On 28 January 2010 18:04, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
On Wed, 2010-01-27 at 12:43 -0600, lei...@linux.vnet.ibm.com wrote:
Currently pci_dev can be null when EEH is in action. This patch
just assure that we pci_dev is not NULL before calling pci_dev_put.
Like all
On Thu, Jan 28, 2010 at 02:25:39PM +0100, Wolfgang Grandegger wrote:
From: Wolfgang Grandegger w...@denx.de
__devinit[data] has not yet been used for all initialization functions
and data. To avoid truncating lines, the struct mpc_i2c_match_data has
been renamed to mpc_i2c_data, which is
On Thu, Jan 28, 2010 at 02:25:40PM +0100, Wolfgang Grandegger wrote:
From: Wolfgang Grandegger w...@denx.de
The setclock initialization functions have been renamed to setup
because I2C interrupts must be enabled for the MPC512x. This requires
to handle fsl,preserve-clocking in a slighly
Gabriel Paubert wrote:
On Thu, Jan 28, 2010 at 05:20:55PM -0600, Joel Schopp wrote:
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
Really 2, 3, or 4? When you have 4 idle threads
On Thu, Jan 28, 2010 at 02:25:41PM +0100, Wolfgang Grandegger wrote:
From: Wolfgang Grandegger w...@denx.de
This patch adds the MPC5121 to the list of supported devices,
enhances the doc of the clock-frequency property and removes
the obsolete cell-index property from the example nodes.
That said, I'm still not entirely convinced I like this usage of
cpupower, its supposed to be a normalization scale for load-balancing,
not a placement hook.
Even if you do a placement hook you'll need to address it in the load
balancing as well. Consider a single 4 thread SMT core with 4
Benjamin Herrenschmidt wrote:
On Thu, 2010-01-28 at 17:24 -0600, Joel Schopp wrote:
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
This patch implements arch_scale_smt_power to
Ben, what about applying this patch of mine, as Christian reported it
fixed his oops?
Sure. I never quite know with i2c which ones you will apply directly and
which ones you want to go through my tree :-)
Hopefully they should still be referened on patchwork, I'll dig there
and pick them up.
On Thu, 28 Jan 2010 09:52:41 +0100
Joakim Tjernlund joakim.tjernl...@transmode.se wrote:
Commit 6846ee5ca68d81e6baccf0d56221d7a00c1be18b made the
new optimized inflate only available on arch's that
define CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS. This
will again enable the optimization for all
From: Corey Minyard cminy...@mvista.com
The maple platform failed to load because it's firmware could not take a
link address of 0x400. A new platform type with a link address of
0x40 had to be created for the maple.
Signed-off-by: Corey Minyard cminy...@mvista.com
---
Without this
From: Corey Minyard cminy...@mvista.com
The MPSC drivers that use DMA need to set coherent_dma_mask to allow
dma_alloc_xxx routines to work properly. Also, the mpsc serial driver
needed to set pi-port.dev to register properly. With these fixes,
the MPSC drivers seem to work again.
On Fri, 29 Jan 2010 at 09:18, Jean Delvare wrote:
Christian, did you ever test this second patch of mine? If you did,
what was the outcome?
Sorry, I must've missed that 2nd patch of yours. I'll test this now and
report back.
Thanks,
Christian.
--
BOFH excuse #112:
The monitor is plugged
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