Re: Endian/__BYTE_ORDER question

2010-02-12 Thread Joakim Tjernlund
ge...@sonytel.be wrote on 2010/02/12 11:33:02: On Fri, 12 Feb 2010, Joakim Tjernlund wrote: Wolfgang Denk w...@denx.de wrote on 2010/02/11 22:39:00: Dear Joakim Tjernlund, In message OF918AA866.3ED427EB-ONC12576C7.005CBEE4-C12576C7. 005cf...@transmode.se you wrote: I have

Re: Endian/__BYTE_ORDER question

2010-02-12 Thread Geert Uytterhoeven
On Fri, 12 Feb 2010, Joakim Tjernlund wrote: Wolfgang Denk w...@denx.de wrote on 2010/02/11 22:39:00: Dear Joakim Tjernlund, In message OF918AA866.3ED427EB-ONC12576C7.005CBEE4-C12576C7. 005cf...@transmode.se you wrote: I have no idea how it is actually done in the kernel code...

Please pull 'next' branch of 4xx tree

2010-02-12 Thread Josh Boyer
Hi Ben, Some updates for various boards from Stefan. I don't have anything else at the moment, so I thought I'd get this rolled into your tree now. josh The following changes since commit b919ee827e048826786fd7e889a2b04f63382fe6: Anton Blanchard (1): powerpc: Only print clockevent

[PATCH v3 1/7] PCI: split up pci_read_bridge_bases()

2010-02-12 Thread Bjorn Helgaas
No functional change; this breaks up pci_read_bridge_bases() into separate pieces for the I/O, memory, and prefetchable memory windows, similar to how Yinghai recently split up pci_setup_bridge() in 68e84ff3bdc. Signed-off-by: Bjorn Helgaas bjorn.helg...@hp.com --- drivers/pci/probe.c | 54

[PATCH v3 3/7] PCI: replace bus resource table with a list

2010-02-12 Thread Bjorn Helgaas
Previously we used a table of size PCI_BUS_NUM_RESOURCES for resources forwarded to a bus by its upstream bridge. We've increased this size several times when the table overflowed. But there's no good limit on the number of resources for a bus because host bridges can forward any number of

[PATCH v3 7/7] PCI: reference bridge window resources explicitly

2010-02-12 Thread Bjorn Helgaas
No functional change; just be more explicit about this mapping for bridge resources: bridge-res[PCI_BRIDGE_RESOURCES+0]: I/O window (or CB I/O 0 window) bridge-res[PCI_BRIDGE_RESOURCES+1]: mem window (or CB I/O 1 window) bridge-res[PCI_BRIDGE_RESOURCES+2]: pref mem window (or CB mem 0

[PATCH v3 2/7] PCI: read bridge windows before filling in subtractive decode resources

2010-02-12 Thread Bjorn Helgaas
No functional change; this fills in the bus subtractive decode resources after reading the bridge window information rather than before. Also, print out the subtractive decode resources as we already do for the positive decode windows. Signed-off-by: Bjorn Helgaas bjorn.helg...@hp.com ---

[PATCH v3 6/7] PCI: break out primary/secondary/subordinate for readability

2010-02-12 Thread Bjorn Helgaas
No functional change; just add names for the primary/secondary/subordinate bus numbers read from config space rather than repeatedly masking/shifting. Signed-off-by: Bjorn Helgaas bjorn.helg...@hp.com --- drivers/pci/probe.c | 24 ++-- 1 files changed, 14 insertions(+),

[PATCH v3 0/7] PCI: try pci=use_crs again

2010-02-12 Thread Bjorn Helgaas
Historically, Linux has assumed a single PCI host bridge, with that bridge claiming all the address space left after RAM and legacy devices are taken out. If the system contains multiple host bridges, we can no longer operate under that assumption. We have to know what parts of the address space

[PATCH v3 4/7] x86/PCI: use host bridge _CRS info by default on 2008 and newer machines

2010-02-12 Thread Bjorn Helgaas
The main benefit of using ACPI host bridge window information is that we can do better resource allocation in systems with multiple host bridges, e.g., http://bugzilla.kernel.org/show_bug.cgi?id=14183 Sometimes we need _CRS information even if we only have one host bridge, e.g.,

[PATCH] RapidIO: add support for mapping outbound memory

2010-02-12 Thread Micha Nelissen
Signed-off-by: Micha Nelissen micha.nelis...@prodrive.nl --- arch/powerpc/sysdev/fsl_rio.c | 175 - drivers/rapidio/rio-scan.c|3 +- drivers/rapidio/rio.c | 121 - include/linux/rio.h | 20 -