On Thu, 2010-12-09 at 17:20 -0800, Mark Pearson wrote:
Magical - thank you very very much. The patch fixes the problem
Really appreciate the quick response - and I would never have found that
in a million years.
No worries.
Looks like someone should send 78e2e68a2b to the stable crew. FSL
Scott,
do you think this issue also applies to MPC8377 ?
I'm in the middle of a small redesign for series production and would
like not to miss a thing.
We have Nand, Nor and MRAM connected to LBC.
Since RFS is running from NAND and we use the MRAM as a non-volatile
SRAM I'd like to avoid
Andre Schwarz andre.schw...@matrix-vision.de wrote on 2010/12/10 09:47:10:
Scott,
do you think this issue also applies to MPC8377 ?
Probably, I think this is so for all eLBC controllers.
I'm in the middle of a small redesign for series production and would
like not to miss a thing.
We
There are some differences of register offset and definition between
pci and pcie error management registers. While, some other pci/pcie
error management registers are nearly the same.
To merge pci and pcie edac code into one, it is easier to use ccsr_pci
structure than the hardcoded define. So
Add pcie error interrupt edac support for mpc85xx and p4080.
mpc85xx uses the legacy interrupt report mechanism - the error
interrupts are reported directly to mpic. While, p4080 attaches
most of error interrupts to interrupt 0. And report error interrupt
to mpic via interrupt 0. This patch can
Currently, of_platform_bus_probe() completely skips nodes which do not
explicitly match the 'matches' table passed in. Or, if the root node
matches, then it registers all the children unconditionally. However,
there are situations, such as registering devices from the root node,
when it is
Scott Wood scottw...@freescale.com wrote on 2010/12/08 23:25:59:
On Wed, 8 Dec 2010 17:02:45 -0500
Mark Mason ma...@postdiluvian.org wrote:
I don't think that using a software NAND controller instead of the LBC
FCM mode is all that bad. Again, I haven't actually done it, so check
the
On Thu, Dec 09, 2010 at 09:54:01AM +0530, Rupjyoti Sarmah wrote:
A few error path issues, plus one leak in the good case. I'll wait to
see if there are any more comments for a couple of days.
+static int __init ppc460ex_canyonlands_fixup(void)
+{
+ u8 __iomem *bcsr ;
+ void __iomem
Hello all,
Are you sure that you want to have the chrdev registration here (the
following code)?
It was commented out in my lastest attempts after reading Michael's
explainations.
Such stuff typically goes into the probe() function. The modules's
init() just registers the driver.
Hi all,
on my MPC8321E with linux-2.6.36 I get this netdev watchdog warning NETDEV
WATCHDOG: eth0 (of:ucc_geth): transmit queue 0 timed out if the link mode is
half-duplex.
The warning is caused, because all Tx BDs are full and packet transmission is
stopped with netif_stop_queue() in
On Fri, 10 Dec 2010 13:39:01 +0100
Joakim Tjernlund joakim.tjernl...@transmode.se wrote:
Scott Wood scottw...@freescale.com wrote on 2010/12/08 23:25:59:
On Wed, 8 Dec 2010 17:02:45 -0500
Mark Mason ma...@postdiluvian.org wrote:
I don't think that using a software NAND controller
Add setting links between rio_dev objects into the discovery process.
This needed to report device connections on agent (non-host) processors
that perform RIO discovery. Originally, these links have been introduced
for enumerating host only to support error management.
Signed-off-by: Alexandre
Add new sysfs attributes.
1. Routing information required to to reach the RIO device:
destid - device destination ID (real for for endpoint, route for switch)
hopcount - hopcount for maintenance requests (switches only)
2. device linking information:
lprev - name of device that precedes the
The following four patches are follow-up to two RapidIO patches
that are in the -mm tree now.
Alexandre Bounine (4):
RapidIO: Add definitions of Component Tag fields
RapidIO: Add device object linking into discovery
RapidIO: Use Component Tag for unified switch identification
RapidIO: Add
Add definition of the unique device identifier field in the component tag.
RIO_CTAG_UDEVID does not take all 32 bits of the component tag value to
allow future extensions to the component tag use.
Selected size of the RIO_CTAG_UDEVID field (17 bits) is sufficient to
accommodate
maximum number of
Change the way how switchid value is set. Local counter variable does not
provide unified way to identify switch devices in a system with multiple
processors. Using local counter leads to the situation when the same RIO
switch has different switch ID for each processor. Replacing local counter
Add new sRIO switch device IDs and enable a basic support for them.
Signed-off-by: Alexandre Bounine alexandre.boun...@idt.com
Cc: Kumar Gala ga...@kernel.crashing.org
Cc: Matt Porter mpor...@kernel.crashing.org
Cc: Li Yang le...@freescale.com
Cc: Thomas Moll thomas.m...@sysgo.com
Cc: Micha
On Thu, Dec 09, 2010 at 08:52:45AM -0800, Tirumala Marri wrote:
On Thu, Dec 9, 2010 at 5:24 AM, Sergei Shtylyov sshtyl...@mvista.com wrote:
Hello.
On 09-12-2010 3:32, tma...@apm.com wrote:
From: Tirumala Marritma...@apm.com
Enable gadget support
Signed-off-by: Tirumala R
On Wed, Dec 08, 2010 at 04:32:02PM -0800, tma...@apm.com wrote:
From: Tirumala Marri tma...@apm.com
Add Synopsys Design Ware core register definitions.
Signed-off-by: Tirumala R Marritma...@apm.com
Minor nit for future patches, you need a space after your name and
before the '' character.
On Wed, Dec 08, 2010 at 04:28:59PM -0800, tma...@apm.com wrote:
From: Tirumala Marri tma...@apm.com
v6:
1. Replaced register definitions and bit fields with macros.
2. Replace printks with dev_dbg or dev_err functions.
3. Cleanup some assignments.
4. Remove chip specific selections in
On Fri, 10 Dec 2010 15:38:14 -0500
Alexandre Bounine alexandre.boun...@idt.com wrote:
The following four patches are follow-up to two RapidIO patches
that are in the -mm tree now.
Alexandre Bounine (4):
RapidIO: Add definitions of Component Tag fields
RapidIO: Add device object linking
On Fri, 10 Dec 2010 15:38:18 -0500
Alexandre Bounine alexandre.boun...@idt.com wrote:
Add new sysfs attributes.
One would like to see documentation updates along with sysfs API
updates. But one fears that this entire interface wasn't documented
anyway :(
Please at least fully describe the
On 09.12.2010 [11:09:20 -0800], Nishanth Aravamudan wrote:
On 26.10.2010 [20:35:17 -0700], Nishanth Aravamudan wrote:
If firmware allows us to map all of a partition's memory for DMA on a
particular bridge, create a 1:1 mapping of that memory. Add hooks for
dealing with hotplug events.
Signed-off-by: Heiko Schocher h...@denx.de
cc: Wolfram Sang w.s...@pengutronix.de
cc: linuxppc-dev@lists.ozlabs.org
---
- based against 2.6.37-rc4
- I did the following steps to generate this patch:
make mpc5200_defconfig
make savedefconfig
cp ./defconfig
add to mpc5200_defconfig:
CONFIG_SENSORS_LM80=m
CONFIG_RTC_DRV_DS1374=m
as this is used by the charon board.
Signed-off-by: Heiko Schocher h...@denx.de
cc: Wolfram Sang w.s...@pengutronix.de
cc: linuxppc-dev@lists.ozlabs.org
---
- based against 2.6.37-rc4
- add binding to OF, compatible name smi,sm501
- add read/write functions for using this driver
also on powerpc plattforms
- add commandline options:
sm501.fb_mode:
Specify resolution as xresxyres[-bpp][@refresh]
sm501.bpp:
Specify bit-per-pixel if not specified mode
- Add support
Signed-off-by: Heiko Schocher h...@denx.de
cc: linux-fb...@vger.kernel.org
cc: devicetree-disc...@ozlabs.org
cc: Ben Dooks b...@simtec.co.uk
cc: Vincent Sanders vi...@simtec.co.uk
cc: Samuel Ortiz sa...@linux.intel.com
cc: linux-ker...@vger.kernel.org
---
- based against 2.6.37-rc4
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