On Mon, Feb 14, 2011 at 11:07:15AM -0700, Grant Likely wrote:
> > This patch converts powerpc over to the new irq_data based irq_chip
> > functions, as was done earlier for ARM and some other architectures.
> >
> > struct irq_data is described here:
> >
> >
> > http://git.kernel.org/?p=linu
On Mon, Feb 14, 2011 at 08:53:21AM -, David Laight wrote:
>
> > > Sorry, I don't understand that. I think u32 is always 32bit
> > > 4byte on all archs. Right?
> >
> > Yes.
> >
> > Use an unsigned long if you want to hold a pointer correctly on all
> > arches.
>
> Although that is true for
On 02/13/2011 01:24 PM, Linus Walleij wrote:
>> > 3. Userspace interfaces for accessing the mailboxes. A
>> > '/dev/mailbox1', '/dev/mailbox2', etc... mapping, for example.
> What kind of business does userspace have with directly using
> mailboxes? Enlighten me so I get it... in our
On Mon, Feb 14, 2011 at 12:03:59PM +0200, Ohad Ben-Cohen wrote:
> On Mon, Feb 14, 2011 at 12:01 PM, Jamie Iles wrote:
> > On Fri, Feb 11, 2011 at 03:19:51PM -0600, Meador Inge wrote:
> >> 1. Hardware specific bits somewhere under '.../arch/*'. Drivers
> >> for the MPIC message register
В Mon, 14 Feb 2011 08:53:21 -
"David Laight" пишет:
>
> > > Sorry, I don't understand that. I think u32 is always 32bit
> > > 4byte on all archs. Right?
> >
> > Yes.
> >
> > Use an unsigned long if you want to hold a pointer correctly on all
> > arches.
>
> Although that is true for man
On Mon, 2011-02-14 at 19:25 +0900, FUJITA Tomonori wrote:
> This is the third version of tcm ibmvscsis driver. You can find the
> first version at:
>
> http://marc.info/?t=12973408564&r=1&w=2
>
> The changes are:
> v3:
> - fix task attribute (convert MSG_* to TASK_ATTR_*)
> v2:
> - send VIOSR
This is the third version of tcm ibmvscsis driver. You can find the
first version at:
http://marc.info/?t=12973408564&r=1&w=2
The changes are:
v3:
- fix task attribute (convert MSG_* to TASK_ATTR_*)
v2:
- send VIOSRP_MAD_NOT_SUPPORTED for unknown mad type requests.
- fix inquiry typo
- sends
On Mon, Feb 14, 2011 at 12:01 PM, Jamie Iles wrote:
> On Fri, Feb 11, 2011 at 03:19:51PM -0600, Meador Inge wrote:
>> 1. Hardware specific bits somewhere under '.../arch/*'. Drivers
>> for the MPIC message registers on Power and OMAP4 mailboxes, for
>> example.
>> 2. A highe
On Fri, Feb 11, 2011 at 03:19:51PM -0600, Meador Inge wrote:
> 1. Hardware specific bits somewhere under '.../arch/*'. Drivers
>for the MPIC message registers on Power and OMAP4 mailboxes, for
>example.
> 2. A higher level driver under '.../drivers/mailbox/*'. That the
>
From: Hiroshi DOYU
Subject: Re: [RFC] Inter-processor Mailboxes Drivers
Date: Mon, 14 Feb 2011 10:55:53 +0200 (EET)
> From: ext Linus Walleij
> Subject: Re: [RFC] Inter-processor Mailboxes Drivers
> Date: Mon, 14 Feb 2011 09:39:32 +0100
>
>> On Mon, Feb 14, 2011 at 8:32 AM, Hiroshi DOYU wrote:
On Mon, Feb 14, 2011 at 9:55 AM, Hiroshi DOYU wrote:
> Does db5500 use IOMMU for mapping shared memories?
Nope, it's a fixed physical allocation from the modem side
of the world.
Yours,
Linus Walleij
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From: ext Linus Walleij
Subject: Re: [RFC] Inter-processor Mailboxes Drivers
Date: Mon, 14 Feb 2011 09:39:32 +0100
> On Mon, Feb 14, 2011 at 8:32 AM, Hiroshi DOYU wrote:
>
>> OMAP mailbox is the interrupt driven 32bit unit H/W FIFO to other
>> cores.
>
> How is it used? Is it a low-traffic (li
On Mon, 2011-02-14 at 12:48 +0900, FUJITA Tomonori wrote:
> This is the second version of tcm ibmvscsis driver. You can find the
> first version at:
>
> http://marc.info/?t=12973408564&r=1&w=2
>
> The changes are:
>
> - send VIOSRP_MAD_NOT_SUPPORTED for unknown mad type requests.
> - fix inq
> > Sorry, I don't understand that. I think u32 is always 32bit
> > 4byte on all archs. Right?
>
> Yes.
>
> Use an unsigned long if you want to hold a pointer correctly on all
> arches.
Although that is true for many systems (and probably all ppc Linux)
it isn't necessarily true (eg 64 bit Mi
Hi Meador,
From: ext Meador Inge
Subject: [RFC] Inter-processor Mailboxes Drivers
Date: Fri, 11 Feb 2011 15:19:51 -0600
> Hi All,
>
> I am currently working on building AMP systems using OpenMCAPI
> (https://bitbucket.org/hollisb/openmcapi/wiki/Home) as the
> inter-processor communication mecha
On Mon, Feb 14, 2011 at 8:32 AM, Hiroshi DOYU wrote:
> OMAP mailbox is the interrupt driven 32bit unit H/W FIFO to other
> cores.
How is it used? Is it a low-traffic (like single 32bit words etc) signal
control-path link while the actual high-throughput data-path is done
with shared memory? (Tha
From: ext Linus Walleij
Subject: Re: [RFC] Inter-processor Mailboxes Drivers
Date: Sun, 13 Feb 2011 22:16:12 +0100
> 2011/2/12 Sundar :
>
>> At least I would like this; I wanted to generalize such mailbox IPCs
>> right from the day when I was working on one, but coudnt really
>> work on that.
>>
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