On Thu, 03 Mar 2011 19:29:19 -0800
Joe Perches j...@perches.com wrote:
$ git log --pretty=format:%an %ae arch/powerpc/platforms/pseries/msi.c
Andre Detsch adet...@br.ibm.com
Michael Ellerman mich...@ellerman.id.au
Michael Ellerman mich...@ellerman.id.au
Michael Ellerman
On Fri, 2011-03-04 at 12:02 +1100, Benjamin Herrenschmidt wrote:
On Wed, 2011-03-02 at 11:20 -0600, Tseng-Hui (Frank) Lin wrote:
+#define CPU_FTR_ICSWX LONG_ASM_CONST(0x1000)
Do we want a userspace visible feature as well ? Or some other way to
inform
On Fri, 2011-03-04 at 11:29 -0600, Tseng-Hui (Frank) Lin wrote:
On Fri, 2011-03-04 at 12:02 +1100, Benjamin Herrenschmidt wrote:
On Wed, 2011-03-02 at 11:20 -0600, Tseng-Hui (Frank) Lin wrote:
+#define CPU_FTR_ICSWX LONG_ASM_CONST(0x1000)
Do we want a
On Sat, 2011-03-05 at 07:26 +1100, Benjamin Herrenschmidt wrote:
On Fri, 2011-03-04 at 11:29 -0600, Tseng-Hui (Frank) Lin wrote:
On Fri, 2011-03-04 at 12:02 +1100, Benjamin Herrenschmidt wrote:
On Wed, 2011-03-02 at 11:20 -0600, Tseng-Hui (Frank) Lin wrote:
+#define CPU_FTR_ICSWX
What if the unmask/mask functions are dropped and only interrupt
enable/disable functions are provided?
I.e: rename the old unmask/mask functions to enable/disable and
register them as enable/disable? I did try that, and it works too, no
spurious IRQ's and no missing IRQ's.
Cheers,
Henk.
On
On Fri, 2011-03-04 at 16:22 -0600, Tseng-Hui (Frank) Lin wrote:
Well, I don't know how you use icswx on P7+, but on Prism it's
definitely issued directly by userspace.
OK. You've got a point. I wasn't aware of Prism. HFI device driver is
currently the only icswx user on P7. Could you
On Fri, 2011-03-04 at 23:40 +0100, Henk Stegeman wrote:
What if the unmask/mask functions are dropped and only interrupt
enable/disable functions are provided?
No, that's backward. enable/disable are handled by the core, leave them
there.
I.e: rename the old unmask/mask functions to
On Sat, 2011-03-05 at 09:40 +1100, Benjamin Herrenschmidt wrote:
The lazy switching checks the shadow variable first before setting ACOP
register. This saves mtspr() only if the new value is the same as
current. If there are several coprocessors on the system, the ACOP
register may have
Hi Ira,
I've successfully tested this version on P2020RDB,
with 10 threads per channel, 10 iterations per
thread.
Tested-by: Felix Radensky fe...@embedded-sol.com
Felix.
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On Fri, 2011-03-04 at 17:07 -0600, Tseng-Hui (Frank) Lin wrote:
I don't have any measurable numbers. That's why I made it an option in
case people wants to disable it. I do agree that the kernel has so many
options that we should refrain from adding more. If the chance that the
lazy switching
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