>-Original Message-
>From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>Sent: Friday, July 22, 2011 2:01 PM
>To: Xie Shaohui-B21989
>Cc: Gala Kumar-B11780; linuxppc-dev@lists.ozlabs.org
>Subject: Re: [PATCH 1/4] powerpc/85xx: fix interrupt number of memory-
>controller for P4080
>
>
On Jul 21, 2011, at 5:25 AM, Shaohui Xie wrote:
> Signed-off-by: Shaohui Xie
> ---
> arch/powerpc/platforms/85xx/corenet_ds.c |3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c
> b/arch/powerpc/platforms/85xx/corenet_ds.c
> i
On Jul 21, 2011, at 9:04 PM, Xie Shaohui-B21989 wrote:
>
>
>
>> -Original Message-
>> From: Gala Kumar-B11780
>> Sent: Thursday, July 21, 2011 8:13 PM
>> To: Xie Shaohui-B21989
>> Cc: linuxppc-dev@lists.ozlabs.org
>> Subject: Re: [PATCH 1/4] powerpc/85xx: fix interrupt number of memory
Hi Linus !
This branch contains some rework and consolidation of the code
to establish the mapping between device-tree nodes for PCI
devices (if they exist) and the corresponding Linux struct device.
It moves it all to generic code in a way that is a lot cleaner
than any of the previous implemen
>From: Tabi Timur-B04825
>Sent: Thursday, July 21, 2011 11:59 PM
>To: Xie Shaohui-B21989
>Cc: linuxppc-dev@lists.ozlabs.org; Gala Kumar-B11780; Jiang Kai-B18973
>Subject: Re: [PATCH 3/4] powerpc/85xx: Merge PCI/PCI Express error
>management registers
>
>On Thu, Jul 21, 2011 at 5:29 AM, Shaohui Xie
>From: Tabi Timur-B04825
>Sent: Thursday, July 21, 2011 11:58 PM
>To: Xie Shaohui-B21989
>Cc: linuxppc-dev@lists.ozlabs.org; Gala Kumar-B11780
>Subject: Re: [PATCH 1/4] powerpc/85xx: fix interrupt number of memory-
>controller for P4080
>
>On Thu, Jul 21, 2011 at 5:24 AM, Shaohui Xie
>wrote:
>> Si
>-Original Message-
>From: Gala Kumar-B11780
>Sent: Thursday, July 21, 2011 8:13 PM
>To: Xie Shaohui-B21989
>Cc: linuxppc-dev@lists.ozlabs.org
>Subject: Re: [PATCH 1/4] powerpc/85xx: fix interrupt number of memory-
>controller for P4080
>
>
>On Jul 21, 2011, at 5:24 AM, Shaohui Xie wrote
On Tue, Jul 19, 2011 at 10:12 AM, Kumar Gala wrote:
>
> On Jul 19, 2011, at 3:53 AM, Dmitry Eremin-Solenikov wrote:
>
>> Currently sbc8548 reads hardware revision during bootup. To simplify
>> things read it when it's first required when the kernel is up and
>> running.
>>
>> Signed-off-by: Dmitry
On 07/22/2011 06:59 AM, Andrew Morton wrote:
On Fri, 22 Jul 2011 08:52:06 +1000
Benjamin Herrenschmidt wrote:
On Thu, 2011-07-21 at 15:36 -0700, Andrew Morton wrote:
On Tue, 19 Jul 2011 14:29:22 +1000
Benjamin Herrenschmidt wrote:
The futex code currently attempts to write to user memory w
Something has gone off the rails with getmaintainer.pl or similar --
I'm guessing that
PaulM doesn't care about dts patches for some aging sbc8560 board,
P.
On Tue, Jul 19, 2011 at 4:53 AM, Dmitry Eremin-Solenikov
wrote:
> Signed-off-by: Dmitry Eremin-Solenikov
> ---
> arch/powerpc/boot/dts/sb
> You're not understanding me.
>
> I need a good reason to merge this into 3.0.
>
> The -stable maintainers need even better reasons to merge this into
> earlier kernels.
>
> Please provide those reasons!
>
> (Documentation/stable_kernel_rules.txt, 4th bullet)
>
> (And it's not just me and -s
On Fri, 22 Jul 2011 08:52:06 +1000
Benjamin Herrenschmidt wrote:
> On Thu, 2011-07-21 at 15:36 -0700, Andrew Morton wrote:
> > On Tue, 19 Jul 2011 14:29:22 +1000
> > Benjamin Herrenschmidt wrote:
> >
> > > The futex code currently attempts to write to user memory within
> > > a pagefault disabl
On Fri, 2011-07-22 at 08:52 +1000, Benjamin Herrenschmidt wrote:
> > um, what problem. There's no description here of the user-visible
> > effects of the bug hence it's hard to work out what kernel version(s)
> > should receive this patch.
>
> Shan could give you an actual example (it was in the
On Thu, 2011-07-21 at 15:36 -0700, Andrew Morton wrote:
> On Tue, 19 Jul 2011 14:29:22 +1000
> Benjamin Herrenschmidt wrote:
>
> > The futex code currently attempts to write to user memory within
> > a pagefault disabled section, and if that fails, tries to fix it
> > up using get_user_pages().
>
On Tue, 28 Jun 2011 14:54:45 -0500
Becky Bruce wrote:
> From: Becky Bruce
>
> This is needed on HIGHMEM systems - we don't always have a virtual
> address so store the physical address and map it in as needed.
>
> Signed-off-by: Becky Bruce
> ---
> include/linux/hugetlb.h |3 +++
> mm/hu
On Tue, 19 Jul 2011 14:29:22 +1000
Benjamin Herrenschmidt wrote:
> The futex code currently attempts to write to user memory within
> a pagefault disabled section, and if that fails, tries to fix it
> up using get_user_pages().
>
> This doesn't work on archs where the dirty and young bits are
>
From: Matt Evans
Date: Thu, 21 Jul 2011 11:51:00 +1000
> An implementation of a code generator for BPF programs to speed up packet
> filtering on PPC64, inspired by Eric Dumazet's x86-64 version.
>
> Filter code is generated as an ABI-compliant function in module_alloc()'d mem
> with stackframe
On Thu, Jul 21, 2011 at 5:29 AM, Shaohui Xie wrote:
> + /* - PCIE has no this register */
I don't understand this sentence.
--
Timur Tabi
Linux kernel developer at Freescale
___
Linuxppc-dev mailing list
Linuxppc
On Thu, Jul 21, 2011 at 5:24 AM, Shaohui Xie wrote:
> Signed-off-by: Shaohui Xie
> ---
Can you provide an explanation as to why the current numbers are wrong?
--
Timur Tabi
Linux kernel developer at Freescale
___
Linuxppc-dev mailing list
Linuxppc-de
On Jul 21, 2011, at 5:24 AM, Shaohui Xie wrote:
> Signed-off-by: Shaohui Xie
> ---
> arch/powerpc/boot/dts/p4080ds.dts |4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/boot/dts/p4080ds.dts
> b/arch/powerpc/boot/dts/p4080ds.dts
> index 927f94d..9c37a8
From: Kai.Jiang
Add pcie error interrupt edac support for mpc85xx and p4080.
mpc85xx uses the legacy interrupt report mechanism - the error
interrupts are reported directly to mpic. While, p4080 attaches
most of error interrupts to interrupt 0. And report error interrupt
to mpic via interrupt 0.
From: Kai.Jiang
There are some differences of register offset and definition between
pci and pcie error management registers. While, some other pci/pcie
error management registers are nearly the same.
Signed-off-by: Kai.Jiang
Signed-off-by: Kumar Gala
Signed-off-by: Shaohui Xie
---
arch/powe
Signed-off-by: Shaohui Xie
---
arch/powerpc/platforms/85xx/corenet_ds.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c
b/arch/powerpc/platforms/85xx/corenet_ds.c
index 2ab338c..15247b0 100644
--- a/arch/powerpc/platforms/85xx/c
Signed-off-by: Shaohui Xie
---
arch/powerpc/boot/dts/p4080ds.dts |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/p4080ds.dts
b/arch/powerpc/boot/dts/p4080ds.dts
index 927f94d..9c37a85 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powe
tiejun.chen wrote:
> Kumar Gala wrote:
>> On Jul 11, 2011, at 6:31 AM, Tiejun Chen wrote:
>>
>>> When kprobe these operations such as store-and-update-word for SP(r1),
>>>
>>> stwu r1, -A(r1)
>>>
>>> The program exception is triggered, and PPC always allocate an exception
>>> frame
>>> as shown as
On Wed, 2011-07-20 at 09:18 -0400, Josh Boyer wrote:
> On Tue, Jul 12, 2011 at 4:41 PM, Josh Boyer
> wrote:
> > Hi Ben,
> >
> > A few fixes from Tony/Dave, a DTS update from Stefan, and a MAINTAINERS
> > update.
> >
> > josh
> >
> > The following changes since commit af9719c3062dfe216a0c3de3fa52b
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