On Fri, 2012-02-17 at 18:56 -0600, Scott Wood wrote:
> Yes, or maybe make it "default y", and/or require an "I know what I'm
> doing" option to be set for it to be unset if a board otherwise wants it.
>
> The ability to turn it off is potentially useful for any board, since
> the address map is de
On 02/17/2012 05:01 PM, Timur Tabi wrote:
> So I noticed something else. PHYS_64BIT is not defined in
> mpc85xx_smp_defconfig.
It couldn't have been, since it was selected by another kconfig option.
defconfigs only hold non-default options.
> However, that select statement also means that we ca
On 02/17/2012 09:50 AM, Yoder Stuart-B08248 wrote:
>
>
>> -Original Message-
>> From: linuxppc-release-boun...@linux.freescale.net [mailto:linuxppc-release-
>> boun...@linux.freescale.net] On Behalf Of Jia Hongtao-B38951
>> Sent: Thursday, February 16, 2012 8:49 PM
>> To: linuxppc-dev@lis
On 17.02.2012, at 23:32, Tabi Timur-B04825 wrote:
> On Fri, Feb 17, 2012 at 10:56 AM, Alexander Graf wrote:
>
>> config KVM_E500MC
>>bool "KVM support for PowerPC E500MC/E5500 processors"
>> - depends on EXPERIMENTAL && PPC_E500MC
>> + depends on EXPERIMENTAL && PPC_E500MC
On Fri, Feb 17, 2012 at 1:20 PM, Tabi Timur-B04825 wrote:
> On Tue, Feb 14, 2012 at 2:37 AM, Prabhakar Kushwaha
> wrote:
>>
>> Applied on git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
>> branch next
>
> This is actually a false statement. "Applied" is past tense, so you
> are
On 02/17/2012 11:13 AM, Alexander Graf wrote:
> There's always a chance we're unable to read a guest instruction. The guest
> could have its TLB mapped execute-, but not readable, something odd happens
> and our TLB gets flushed. So it's a good idea to be prepared for that case
> and have a fallbac
So I noticed something else. PHYS_64BIT is not defined in
mpc85xx_smp_defconfig. This means that if we want to build a 36-bit
kernel, we need to have "select PHYS_64BIT" in the Kconfig for that board.
This is what we have today for the P1022DS.
However, that select statement also means that we
On 02/17/2012 11:13 AM, Alexander Graf wrote:
> Instead of checking whether we should reschedule only when we exited
> due to an interrupt, let's always check before entering the guest back
> again. This gets the target more in line with the other archs.
>
> Signed-off-by: Alexander Graf
> ---
>
Hi Linus !
Here are a few more fixes for powerpc. Some are regressions, the rest is
simple/obvious/nasty enough that I deemed it good to go now.
Here's also step one of deprecating legacy iSeries support: we are
removing it from the main defconfig.
Nobody seems to be using it anymore and the cod
On Fri, Feb 17, 2012 at 10:56 AM, Alexander Graf wrote:
> config KVM_E500MC
> bool "KVM support for PowerPC E500MC/E5500 processors"
> - depends on EXPERIMENTAL && PPC_E500MC
> + depends on EXPERIMENTAL && PPC_E500MC && !KVM_E500V2
There was a patch floating around that made
On 02/17/2012 11:13 AM, Alexander Graf wrote:
> We can't build e500v2 and e500mc (kvm) support inside the same kernel.
> So indicate that by making the 2 options mutually exclusive in kconfig.
>
> Signed-off-by: Alexander Graf
> ---
> arch/powerpc/kvm/Kconfig |2 +-
> 1 files changed, 1 inse
On 02/17/2012 03:55 PM, Scott Wood wrote:
> Should this be a kvm_make_request instead (with a separate
> pending_doorbell bool in vcpu that msgclr can act on), considering
> earlier discussion of phasing out atomics on pending_exceptions, in
> favor of requests?
Ignore the bit about msgclr -- it a
On 02/17/2012 11:13 AM, Alexander Graf wrote:
> When one vcpu wants to kick another, it can issue a special IPI instruction
> called msgsnd. This patch emulates this instruction, its clearing counterpart
> and the infrastructure required to actually trigger that interrupt inside
> a guest vcpu.
>
Benjamin Herrenschmidt wrote:
> Sorry, I fail to see how... it basically makes all those boards
> non-functional even when enabled...
So you're saying that if we allow 32-bit address spacing for a particular
board, then we must provide a 32-bit DTS to go with it?
I was hoping to use the defconfig
On 02/17/2012 11:13 AM, Alexander Graf wrote:
> From: Scott Wood
>
> Chips such as e500mc that implement category E.HV in Power ISA 2.06
> provide hardware virtualization features, including a new MSR mode for
> guest state. The guest OS can perform many operations without trapping
> into the hy
On Fri, 2012-02-17 at 16:22 +, Tabi Timur-B04825 wrote:
> Was this a Freescale internal decision, or is this a generic 85xx
> decision?
>
> For the record, I'm in favor in leaving out support for 32-bit address
> map in the upstream kernel, and having it be an option on the SDK
> only. Howeve
On Tue, Feb 14, 2012 at 2:37 AM, Prabhakar Kushwaha
wrote:
>
> Applied on git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
> branch next
This is actually a false statement. "Applied" is past tense, so you
are saying that this patch has *already* been applied to Kumar's
powerpc.g
On 02/17/2012 04:03 AM, Liu Yu-B13201 wrote:
>
>
>> -Original Message-
>> From: Wood Scott-B07421
>> Sent: Friday, February 17, 2012 1:13 AM
>> To: Liu Yu-B13201
>> Cc: ag...@suse.de; kvm-...@vger.kernel.org; k...@vger.kernel.org;
>> linuxppc-...@ozlabs.org; Wood Scott-B07421
>> Subject:
On Wed, Feb 15, 2012 at 12:58 AM, Zhicheng Fan wrote:
> @@ -114,6 +114,24 @@ struct ccsr_guts_86xx {
> __be32 srds2cr1; /* 0x.0f44 - SerDes2 Control Register 0 */
> } __attribute__ ((packed));
>
> +#ifdef CONFIG_PPC_85xx
> +
Remove this #ifdef. It doesn't really help, and it make
> >
> > /*
> > * Please do not include this file in generic code. There is currently
> > * no requirement for any architecture to implement anything held
> > * within this file.
> > *
> > * Thanks. --rmk
> > */
> >
> > A quick grep indicates that we've lost this battle ;) Is the comments
>
On Fri, Feb 17, 2012 at 06:42:31PM +0100, Cousson, Benoit wrote:
> Hi Grant,
>
> On 2/16/2012 11:52 PM, Andrew Morton wrote:
> > On Thu, 16 Feb 2012 02:09:01 -0700
> > Grant Likely wrote:
> >
> >>
> >> This series generalizes the "irq_host" infrastructure from powerpc
> >> so that it can be used
Hi Grant,
On 2/16/2012 11:52 PM, Andrew Morton wrote:
> On Thu, 16 Feb 2012 02:09:01 -0700
> Grant Likely wrote:
>
>>
>> This series generalizes the "irq_host" infrastructure from powerpc
>> so that it can be used by all architectures and renames it to "irq_domain".
>
> drivers/mfd/twl-core.c i
When using exit timing stats, we clobber r9 in the NEED_EMU case,
so better move that part down a few lines and fix it that way.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/bookehv_interrupts.S |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kv
The CONFIG_KVM_E500 option really indicates that we're running on a V2 machine,
not on a machine of the generic E500 class. So indicate that properly and
change the config name accordingly.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/Kconfig|8
arch/powerpc/kvm/Makefile
The SET_VCPU macro is a leftover from times when the vcpu struct wasn't
stored in the thread on vcpu_load/put. It's not needed anymore. Remove it.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/bookehv_interrupts.S |8
1 files changed, 0 insertions(+), 8 deletions(-)
diff --git
There's always a chance we're unable to read a guest instruction. The guest
could have its TLB mapped execute-, but not readable, something odd happens
and our TLB gets flushed. So it's a good idea to be prepared for that case
and have a fallback that allows us to fix things up in that case.
Add f
From: Scott Wood
e500mc has a normal PPC FPU, rather than SPE which is found
on e500v1/v2.
Based on code from Liu Yu .
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/system.h |1 +
arch/powerpc/kvm/booke.c | 44
The e500mc patches left some debug code in that we don't need. Remove it.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/booke.c |5 -
1 files changed, 0 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 12a2b0b..4c1e2bc 100644
---
We need to make sure that no MAS updates happen automatically while we
have the guest MAS registers loaded. So move the disabling code a bit
higher up so that it covers the full time we have guest values in MAS
registers.
The race this patch fixes should never occur, but it makes the code a
bit mo
We can't build e500v2 and e500mc (kvm) support inside the same kernel.
So indicate that by making the 2 options mutually exclusive in kconfig.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/Kconfig |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/Kco
The semantics of BOOKE_IRQPRIO_MAX changed to denote the highest available
irqprio + 1, so let's reflect that in the code too.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/booke.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powe
Instead if doing
#ifndef CONFIG_64BIT
...
#else
...
#endif
we should rather do
#ifdef CONFIG_64BIT
...
#else
...
#endif
which is a lot easier to read. Change the bookehv implementation to
stick with this rule.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/bookehv_int
For BookE HV the guest visible MSR is shared->msr and is identical to
the MSR that is in use while the guest is running, because we can't trap
reads from/to MSR.
So shadow_msr is unused there. Indicate that with a comment.
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/kvm_host.h |
When we fail to emulate an instruction for the guest, we better go in and
tell it that we failed to emulate it, by throwing an illegal instruction
exception.
Please beware that we basically never get around to telling the guest that
we failed thanks to the debugging code right above it. If user sp
When one vcpu wants to kick another, it can issue a special IPI instruction
called msgsnd. This patch emulates this instruction, its clearing counterpart
and the infrastructure required to actually trigger that interrupt inside
a guest vcpu.
With this patch, SMP guests on e500mc work.
Signed-off-
Instead of checking whether we should reschedule only when we exited
due to an interrupt, let's always check before entering the guest back
again. This gets the target more in line with the other archs.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/booke.c | 15 ++-
1 files ch
If we hit any exception whatsoever in the restore path and r1/r2 aren't the
host registers, we don't get a working oops. So it's always a good idea to
restore them as early as possible.
This time, it actually has practical reasons to do so too, since we need to
have the host page fault handler fix
When setting MSR for an e500mc guest, we implicitly always set MSR_GS
to make sure the guest is in guest state. Since we have this implicit
rule there, we don't need to explicitly pass MSR_GS to set_msr().
Remove all explicit setters of MSR_GS.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm
From: Scott Wood
Chips such as e500mc that implement category E.HV in Power ISA 2.06
provide hardware virtualization features, including a new MSR mode for
guest state. The guest OS can perform many operations without trapping
into the hypervisor, including transitions to and from guest userspac
From: Scott Wood
Add processor support for e500mc, using hardware virtualization support
(GS-mode).
Current issues include:
- No support for external proxy (coreint) interrupt mode in the guest.
Includes work by Ashish Kalra ,
Varun Sethi , and
Liu Yu .
Signed-off-by: Scott Wood
Signed-off-b
From: Scott Wood
DO_KVM will need to identify the particular exception type.
There is an existing set of arbitrary numbers that Linux passes,
but it's an undocumented mess that sort of corresponds to server/classic
exception vectors but not really.
Signed-off-by: Scott Wood
Signed-off-by: Alex
From: Scott Wood
The PID handling is e500v1/v2-specific, and is moved to e500.c.
The MMU sregs code and kvmppc_core_vcpu_translate will be shared with
e500mc, and is moved from e500.c to e500_tlb.c.
Partially based on patches from Liu Yu .
Signed-off-by: Scott Wood
[agraf: fix bisectability]
From: Scott Wood
tlbilx is the new, preferred invalidation instruction. It is not
found on e500 prior to e500mc, but there should be no harm in
supporting it on all e500.
Based on code from Ashish Kalra .
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/e500.h
From: Scott Wood
Keeping two separate headers for e500-specific things was a
pain, and wasn't even organized along any logical boundary.
There was TLB stuff in despite the existence of
arch/powerpc/kvm/e500_tlb.h, and nothing in needed
to be referenced from outside arch/powerpc/kvm.
Signed-of
From: Scott Wood
Rather than invalidate everything when a TLB1 entry needs to be
taken down, keep track of which host TLB1 entries are used for
a given guest TLB1 entry, and invalidate just those entries.
Based on code from Ashish Kalra
and Liu Yu .
Signed-off-by: Scott Wood
Signed-off-by: Al
From: Scott Wood
This is in preparation for merging in the contents of
arch/powerpc/include/asm/kvm_e500.h.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/e500.c |2 +-
arch/powerpc/kvm/{e500_tlb.h => e500.h} |6 +++---
arch/powerpc/kvm/e5
From: Scott Wood
e500mc will want to do lpid allocation/deallocation here.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/44x.c |9 +
arch/powerpc/kvm/booke.c |9 -
arch/powerpc/kvm/e500.c |9 +
3 files changed, 18 insertion
From: Scott Wood
Move vcpu to the beginning of vcpu_e500 to give it appropriate
prominence, especially if more fields end up getting added to the
end of vcpu_e500 (and vcpu ends up in the middle).
Remove gratuitous "extern" and add parameter names to prototypes.
Signed-off-by: Scott Wood
[agra
(resending with fixed email list - somehow I screwed that one up the
first time)
This is Scott's e500mc RFC patch set rebased, berobbed of its pt_regs
parts and fixed for bisectability. On top of them, I addressed all the
comments that I had on the code and that came up in his code as FIXMEs.
I
From: Scott Wood
We'll use it on e500mc as well.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/kvm_book3s.h |3 ++
arch/powerpc/include/asm/kvm_booke.h |3 ++
arch/powerpc/include/asm/kvm_ppc.h|5
arch/powerpc/kvm/book3s_64_mmu_hv.c
From: Scott Wood
Split e500 (v1/v2) and e500mc/e5500 to allow optimization of feature
checks that differ between the two.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/cputable.h | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff
From: Scott Wood
This gives us a place to put load/put actions that correspond to
code that is booke-specific but not specific to a particular core.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/44x.c |3 +++
arch/powerpc/kvm/booke.c |8
arch/
From: Scott Wood
Currently 32-bit only cares about this for choice of exception
vector, which is done in core-specific code. However, KVM will
want to distinguish as well.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/cputable.h |5 +++--
1 files ch
For BookE HV the guest visible MSR is shared->msr and is identical to
the MSR that is in use while the guest is running, because we can't trap
reads from/to MSR.
So shadow_msr is unused there. Indicate that with a comment.
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/kvm_host.h |
From: Scott Wood
Chips such as e500mc that implement category E.HV in Power ISA 2.06
provide hardware virtualization features, including a new MSR mode for
guest state. The guest OS can perform many operations without trapping
into the hypervisor, including transitions to and from guest userspac
The SET_VCPU macro is a leftover from times when the vcpu struct wasn't
stored in the thread on vcpu_load/put. It's not needed anymore. Remove it.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/bookehv_interrupts.S |8
1 files changed, 0 insertions(+), 8 deletions(-)
diff --git
When setting MSR for an e500mc guest, we implicitly always set MSR_GS
to make sure the guest is in guest state. Since we have this implicit
rule there, we don't need to explicitly pass MSR_GS to set_msr().
Remove all explicit setters of MSR_GS.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm
When one vcpu wants to kick another, it can issue a special IPI instruction
called msgsnd. This patch emulates this instruction, its clearing counterpart
and the infrastructure required to actually trigger that interrupt inside
a guest vcpu.
With this patch, SMP guests on e500mc work.
Signed-off-
Instead of checking whether we should reschedule only when we exited
due to an interrupt, let's always check before entering the guest back
again. This gets the target more in line with the other archs.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/booke.c | 15 ++-
1 files ch
The CONFIG_KVM_E500 option really indicates that we're running on a V2 machine,
not on a machine of the generic E500 class. So indicate that properly and
change the config name accordingly.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/Kconfig|8
arch/powerpc/kvm/Makefile
The semantics of BOOKE_IRQPRIO_MAX changed to denote the highest available
irqprio + 1, so let's reflect that in the code too.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/booke.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powe
We need to make sure that no MAS updates happen automatically while we
have the guest MAS registers loaded. So move the disabling code a bit
higher up so that it covers the full time we have guest values in MAS
registers.
The race this patch fixes should never occur, but it makes the code a
bit mo
When using exit timing stats, we clobber r9 in the NEED_EMU case,
so better move that part down a few lines and fix it that way.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/bookehv_interrupts.S |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kv
Instead if doing
#ifndef CONFIG_64BIT
...
#else
...
#endif
we should rather do
#ifdef CONFIG_64BIT
...
#else
...
#endif
which is a lot easier to read. Change the bookehv implementation to
stick with this rule.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/bookehv_int
There's always a chance we're unable to read a guest instruction. The guest
could have its TLB mapped execute-, but not readable, something odd happens
and our TLB gets flushed. So it's a good idea to be prepared for that case
and have a fallback that allows us to fix things up in that case.
Add f
When we fail to emulate an instruction for the guest, we better go in and
tell it that we failed to emulate it, by throwing an illegal instruction
exception.
Please beware that we basically never get around to telling the guest that
we failed thanks to the debugging code right above it. If user sp
We can't build e500v2 and e500mc (kvm) support inside the same kernel.
So indicate that by making the 2 options mutually exclusive in kconfig.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/Kconfig |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/Kco
From: Scott Wood
tlbilx is the new, preferred invalidation instruction. It is not
found on e500 prior to e500mc, but there should be no harm in
supporting it on all e500.
Based on code from Ashish Kalra .
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/e500.h
The e500mc patches left some debug code in that we don't need. Remove it.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/booke.c |5 -
1 files changed, 0 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 12a2b0b..4c1e2bc 100644
---
From: Scott Wood
The PID handling is e500v1/v2-specific, and is moved to e500.c.
The MMU sregs code and kvmppc_core_vcpu_translate will be shared with
e500mc, and is moved from e500.c to e500_tlb.c.
Partially based on patches from Liu Yu .
Signed-off-by: Scott Wood
[agraf: fix bisectability]
From: Scott Wood
Add processor support for e500mc, using hardware virtualization support
(GS-mode).
Current issues include:
- No support for external proxy (coreint) interrupt mode in the guest.
Includes work by Ashish Kalra ,
Varun Sethi , and
Liu Yu .
Signed-off-by: Scott Wood
Signed-off-b
From: Scott Wood
DO_KVM will need to identify the particular exception type.
There is an existing set of arbitrary numbers that Linux passes,
but it's an undocumented mess that sort of corresponds to server/classic
exception vectors but not really.
Signed-off-by: Scott Wood
Signed-off-by: Alex
From: Scott Wood
Keeping two separate headers for e500-specific things was a
pain, and wasn't even organized along any logical boundary.
There was TLB stuff in despite the existence of
arch/powerpc/kvm/e500_tlb.h, and nothing in needed
to be referenced from outside arch/powerpc/kvm.
Signed-of
From: Scott Wood
Rather than invalidate everything when a TLB1 entry needs to be
taken down, keep track of which host TLB1 entries are used for
a given guest TLB1 entry, and invalidate just those entries.
Based on code from Ashish Kalra
and Liu Yu .
Signed-off-by: Scott Wood
Signed-off-by: Al
If we hit any exception whatsoever in the restore path and r1/r2 aren't the
host registers, we don't get a working oops. So it's always a good idea to
restore them as early as possible.
This time, it actually has practical reasons to do so too, since we need to
have the host page fault handler fix
From: Scott Wood
We'll use it on e500mc as well.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/kvm_book3s.h |3 ++
arch/powerpc/include/asm/kvm_booke.h |3 ++
arch/powerpc/include/asm/kvm_ppc.h|5
arch/powerpc/kvm/book3s_64_mmu_hv.c
From: Scott Wood
e500mc has a normal PPC FPU, rather than SPE which is found
on e500v1/v2.
Based on code from Liu Yu .
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/system.h |1 +
arch/powerpc/kvm/booke.c | 44
From: Scott Wood
Currently 32-bit only cares about this for choice of exception
vector, which is done in core-specific code. However, KVM will
want to distinguish as well.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/cputable.h |5 +++--
1 files ch
From: Scott Wood
Move vcpu to the beginning of vcpu_e500 to give it appropriate
prominence, especially if more fields end up getting added to the
end of vcpu_e500 (and vcpu ends up in the middle).
Remove gratuitous "extern" and add parameter names to prototypes.
Signed-off-by: Scott Wood
[agra
This is Scott's e500mc RFC patch set rebased, berobbed of its pt_regs
parts and fixed for bisectability. On top of them, I addressed all the
comments that I had on the code and that came up in his code as FIXMEs.
I verified that this patch set works just fine on e500mc and doesn't
break e500v2, so
From: Scott Wood
Split e500 (v1/v2) and e500mc/e5500 to allow optimization of feature
checks that differ between the two.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/cputable.h | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff
From: Scott Wood
This gives us a place to put load/put actions that correspond to
code that is booke-specific but not specific to a particular core.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/44x.c |3 +++
arch/powerpc/kvm/booke.c |8
arch/
From: Scott Wood
e500mc will want to do lpid allocation/deallocation here.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/44x.c |9 +
arch/powerpc/kvm/booke.c |9 -
arch/powerpc/kvm/e500.c |9 +
3 files changed, 18 insertion
From: Scott Wood
This is in preparation for merging in the contents of
arch/powerpc/include/asm/kvm_e500.h.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/e500.c |2 +-
arch/powerpc/kvm/{e500_tlb.h => e500.h} |6 +++---
arch/powerpc/kvm/e5
On Thu, Feb 16, 2012 at 7:27 PM, Kumar Gala wrote:
> For some of these platforms like P2041RDB, P3041DS, P3060QDS, P4080DS, &
> P5020DS only a 36-bit physical address map is supported by u-boot and the
> device tree. This was a decision that was made to NOT support 32-bit address
> map for th
Commit b8076966e8e1 ("params: _initcall-like kernel parameters")
changed the parse_args() API without fixing all the callers. Done now.
Signed-off-by: Pawel Moll
---
arch/powerpc/mm/hugetlbpage.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/mm/hugetlbpa
> -Original Message-
> From: linuxppc-release-boun...@linux.freescale.net [mailto:linuxppc-release-
> boun...@linux.freescale.net] On Behalf Of Jia Hongtao-B38951
> Sent: Thursday, February 16, 2012 8:49 PM
> To: linuxppc-dev@lists.ozlabs.org
> Cc: meador_i...@mentor.com; Li Yang-R58472;
> -Original Message-
> From: Wood Scott-B07421
> Sent: Friday, February 17, 2012 1:13 AM
> To: Liu Yu-B13201
> Cc: ag...@suse.de; kvm-...@vger.kernel.org; k...@vger.kernel.org;
> linuxppc-...@ozlabs.org; Wood Scott-B07421
> Subject: Re: [PATCH v4 1/3] KVM: PPC: epapr: Factor out the epapr
On Tue, 2011-12-20 at 19:34 -0600, Scott Wood wrote:
>
> There is an existing set of arbitrary numbers that Linux passes,
> but it's an undocumented mess that sort of corresponds to
> server/classic
> exception vectors but not really.
>
> FIXME: Replace the existing trap numbering rather than add
On Fri, 2012-02-17 at 04:32 +, Li Yang-R58472 wrote:
> >Additionally, outside of maybe P2041RDB I believe the majority of
> these
> >boards ship with 4G of DDR (but that off the top of my head) and thus
> >require the 36-bit / PHYS_64BIT support to be enabled.
>
> I know that current support o
On Thu, 2012-02-16 at 20:10 +0800, Li Yang wrote:
> Fix the problem that large physical address support cannot be
> disabled when some platforms which only provides 36-bit support
> are selected. According to the philosophy of kernel config
> enabling a platform support doesn't mean the kernel is
On Fri, 2012-02-17 at 11:25 +0530, Suzuki K. Poulose wrote:
> > Could you tell me what kind of data is stored in vmalloc region in
> PPC ?
> > I want to estimate importance of your patches for makedumpfile.
> I know at least the modules are loaded in the vmalloc'd region. I have
> Cc'ed linux-ppc d
This patch includes:
Configure EMAC PHY clock source (clock from PHY or internal clock).
Do not advertise PHY half duplex capability as APM821XX EMAC does not
support half duplex mode.
Add changes to support configuring jumbo frame for APM821XX EMAC.
Signed-off-by: Duc Dang
---
drivers/
This compatible value will be used to distinguish some special
features of APM821XX EMAC: no half duplex mode support, configuring
jumbo frame.
Signed-off-by: Duc Dang
---
arch/powerpc/boot/dts/bluestone.dts |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/
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