This patch consists of:
- Enable PCI MSI as default for Bluestone board
- Change definition of number of MSI interrupt as it depends on SoC
- Fix returning ENODEV as finding MSI node
- Fix MSI physical high and low address
- Keep MSI data logically
Signed-off-by: Mai La m...@apm.com
---
v3:
*
From: Liu Shuo soniccat@gmail.com
Signed-off-by: Liu Shuo soniccat@gmail.com
---
arch/powerpc/sysdev/fsl_msi.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index ecb5c19..0bab156 100644
---
soniccat@gmail.com wrote:
From: Liu Shuo soniccat@gmail.com
Signed-off-by: Liu Shuo soniccat@gmail.com
Acked-by: Timur Tabi ti...@freescale.com
This is not a critical fix for 3.3, but it should probably be applied to
3.3-stable.
--
Timur Tabi
Linux kernel developer at Freescale
On Wed, Mar 07, 2012 at 07:24:26PM +0530, Vinod Koul wrote:
On Tue, 2012-03-06 at 22:33 +, Russell King - ARM Linux wrote:
[v2 - more or less same description. Including lakml in cc for the full
set]
This patch series cleans up the handling of cookies in DMA engine drivers.
This
On Mon, 2012-03-12 at 16:11 +, Russell King - ARM Linux wrote:
On Wed, Mar 07, 2012 at 07:24:26PM +0530, Vinod Koul wrote:
On Tue, 2012-03-06 at 22:33 +, Russell King - ARM Linux wrote:
[v2 - more or less same description. Including lakml in cc for the full
set]
This patch
These patches add support for the GE IMP3A. This board (based on a Freescale
P2020) uses some support for FPGA logic common with the PPC9A and other 86xx
based boards, so this support has been moved out of the 86xx directory. A
config option (GE_FPGA) has been added to reduce churn on dependant
This patch adds the GE_FPGA configuration option. This is being carried
out as ground work to allow the PIC and GPIO drivers to be move from the
powerpc 86xx platform directory to more general locations to allow them to
be used on non-86xx boards and to reduce churn when further boards using
these
The GE GPIO driver provides basic support (set direction, read/write state)
for the GPIO provided on some GE single board computers. This patch moves
the driver from the 86xx specific platform directrory to the GPIO subsystem
so that it can be used on non-86xx boards.
Signed-off-by: Martyn Welch
Move the GE PIC drivers to allow these to be used by non-86xx boards.
Signed-off-by: Martyn Welch martyn.we...@ge.com
---
v2: Move GPIO and PIC drivers to sysdev/ge/ rather than platforms/.
v3: Now just PIC driver. GPIO driver going to drivers/gpio.
arch/powerpc/platforms/86xx/Kconfig
Initial board support for the GE IMP3A, a 3U compactPCI card with a p2020
processor.
Signed-off-by: Martyn Welch martyn.we...@ge.com
---
v2: Rebase patch onto powerpc/next, taking work by Kyle Moffett into
account.
v3: Correct detection of interrupt controller.
On 07.03.2012, at 18:08, Scott Wood wrote:
On 03/07/2012 07:56 AM, Alexander Graf wrote:
On 03/01/2012 02:20 AM, Olivia Yin wrote:
From: Liu Yuyu@freescale.com
So that we can call it when improving SPE switch like book3e did for
fp switch.
Timur / Scott, can you please (n)ack this
There's always a chance we're unable to read a guest instruction. The guest
could have its TLB mapped execute-, but not readable, something odd happens
and our TLB gets flushed. So it's a good idea to be prepared for that case
and have a fallback that allows us to fix things up in that case.
Add
Hi Grant,
Today's linux-next merge of the devicetree tree got a conflict in
include/linux/of.h between commit eb740b5f3e65 (powerpc/eeh: Introduce
EEH device) from the powerpc tree and commit 0f22dd395fc4 (of: Only
compile OF_DYNAMIC on PowerPC pseries and iseries) from the devicetree
tree.
Just
PSC9131RDB is a Freescale reference design board for PSC9131 SoC.The PSC9131 is
integrated SoC that targets Femto base station market. It combines Power
Architecture e500v2 and DSP StarCore SC3850 core technologies with MAPLE-B2F
baseband acceleration processing elements.
The PSC9131 SoC includes
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