This breaks resume on the iBook G4 (PowerBook6,7). Apparently during or
before noirq resume the system is hanging by the same amount of time as
the system was sleeping.
Andreas.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
Andreas Schwab sch...@linux-m68k.org writes:
This breaks resume on the iBook G4 (PowerBook6,7). Apparently during or
before noirq resume the system is hanging by the same amount of time as
the system was sleeping.
The point where the time is wasted actually appears to be _after_ resume
(the
On Sunday, July 15, 2012, Andreas Schwab wrote:
This breaks resume on the iBook G4 (PowerBook6,7). Apparently during or
before noirq resume the system is hanging by the same amount of time as
the system was sleeping.
I'm able to reproduce this problem on Toshiba Portege R500 with similar
于 2012年07月13日 19:50, Kumar Gala 写道:
On Jul 12, 2012, at 9:44 PM, Jiang Lu wrote:
On PPC44x core, the WRC(Watchdog-timer Reset Control) field of TCR
of timer can not reset by software after set to a non-zero value.
Which means software can not reset the timeout behaviour of watchdog timer.
At 07/09/2012 06:26 PM, Yasuaki Ishimatsu Wrote:
When (hot)adding memory into system, /sys/firmware/memmap/X/{end, start, type}
sysfs files are created. But there is no code to remove these files. The patch
implements the function to remove them.
Note : The code does not free
A PCIe erratum of mpc85xx may causes a core hang when a link of PCIe
goes down. when the link goes down, Non-posted transactions issued
via the ATMU requiring completion result in an instruction stall.
At the same time a machine-check exception is generated to the core
to allow further processing
A PCIe erratum of mpc85xx may causes a core hang when a link of PCIe
goes down. when the link goes down, Non-posted transactions issued
via the ATMU requiring completion result in an instruction stall.
At the same time a machine-check exception is generated to the core
to allow further processing
Heaven Myneni ha...@linux.vnet.ibm.com wrote:
powerpc: SMT priority (PPR) save and restore
On P7 systems, users can define SMT priority levels 2,3 and 4 for
processes so that some can run higher priority than the other ones.
In the current kernel, the default priority is set to 4 which
On some platforms, in RC mode, root port has neither MSI/MSI-X nor INTx
interrupt generated, which are available only in EP mode on those platform.
In this case, we try to use other interrupt for port service driver to have
AER, Hot-plug, etc, services to work.
Signed-off-by: Shengzhou Liu
On current fsl powerpc platforms, the PCIe root port doesn't support
generating MSI/MSI-X and INTx interrupt in RC mode (those interrupts
are supported only in EP mode). So we use the shared error interrupt
by flag PCI_DEV_FLAGS_USE_NON_MSI_INTX_IRQ for PCIe port driver to
support AER, Hot-plug
From: Liu Shuo soniccat@gmail.com
The MPIC chip with version 2.0 has a MSI errata (errata PIC1 of mpc8544),
It causes that neither MSI nor MSI-X can work fine. There is a workaround
to allow MSI-X to function properly.
Signed-off-by: Liu Shuo soniccat@gmail.com
Signed-off-by: Li Yang
The following 4 patches enabling fsl-dma and talitos offload raid
operations for improving raid performance and balancing CPU load.
Write performance will be improved by 25-30% tested by iozone.
Write performance is improved about 2% after using spin_lock_bh replace
spin_lock_irqsave.
CPU load
Delete attribute DMA_INTERRUPT because fsl-dma doesn't support this function,
exception will be thrown if talitos is used to offload xor at the same time.
Cc: Dan Williams dan.j.willi...@intel.com
Cc: Vinod Koul vinod.k...@intel.com
Cc: Li Yang le...@freescale.com
Signed-off-by: Qiang Liu
Fix the potential risk when enable config NET_DMA and ASYNC_TX.
Async_tx is lack of support in current release process of dma descriptor,
all descriptors will be released whatever is acked or no-acked by async_tx,
so there is a potential race condition when dma engine is uesd by others
clients
Use spin_lock_bh to instead of spin_lock_irqsave for improving performance.
Cc: Dan Williams dan.j.willi...@intel.com
Cc: Vinod Koul vinod.k...@intel.com
Cc: Li Yang le...@freescale.com
Signed-off-by: Qiang Liu qiang@freescale.com
---
drivers/dma/fsldma.c | 29 -
Expose Talitos's XOR functionality to be used for RAID parity
calculation via the Async_tx layer.
Cc: Herbert Xu herb...@gondor.apana.org.au
Cc: David S. Miller da...@davemloft.net
Signed-off-by: Dipen Dudhat dipen.dud...@freescale.com
Signed-off-by: Maneesh Gupta maneesh.gu...@freescale.com
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