Hi Chen,
Sorry for late reply.
2012/10/02 13:21, Ni zhan Chen wrote:
On 09/05/2012 05:25 PM, we...@cn.fujitsu.com wrote:
From: Yasuaki Ishimatsu
All pages of virtual mapping in removed memory cannot be freed, since some pages
used as PGD/PUD includes not only removed memory but also other me
When our x86 box calls __remove_pages(), release_mem_region() shows
many warnings. And x86 box cannot unregister iomem_resource.
"Trying to free nonexistent resource "
release_mem_region() has been changed as called in each PAGES_PER_SECTION
chunk since applying a patch(de7f0cba96786c). Because p
Hi Alex,
Looks to be a preempt issue with the iommu pools code. I did find a
couple more bugs along the way too.
Anton
--
There are a number of issues in the recent IOMMU pools code:
- On a preempt kernel we might switch CPUs in the middle of building
a scatter gather list. When this happens
Earlier without cpuidle framework on pseries, the native arch
idle routine comprised of both snooze and nap
states. smt_snooze_delay variable was used to delay
the idle process entry to deeper idle state like nap.
With the coming of cpuidle, this arch specific idle was replaced
by two different i
smt_snooze_delay was designed to delay idle loop's nap entry
in the native idle code before it got ported over to use as part of
the cpuidle framework.
A -ve value assigned to smt_snooze_delay should result in
busy looping, in other words disabling the entry to nap state.
- https://lis
Remove the redundant target residency initialisation in
pseries_cpuidle_driver_init().
This is currently over-writing the residency time updated as part of the static
table, resulting in all the idle states having the same target
residency of 100us which is incorrect. This may result in the menu
The following series consists of a bunch of fixes for
cpuidle back-end driver for ppc64 (pSeries) platform.
The series applies on 3.6-rc7 and has been tested on ppc64 pSeries
POWER7 system with snooze and nap states.
With these fixes, avg idle residency for nap on 50 percent idle system
increase
Hi,
> Yes. With that patch applied, things work for me again.
Thanks Alex, Nish. We can reproduce this on one of our Biminis, looking
into it now.
Anton
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On Wed, 3 Oct 2012 15:18:43 -0400
Alexandre Bounine wrote:
> Replace the single global destination ID counter with per-net allocation
> mechanism to allow independent destID management for each available RapidIO
> network. Using bitmap based mechanism instead of counters allows
> destination ID
On Wed, 3 Oct 2012 15:18:41 -0400
Alexandre Bounine wrote:
> Modify mport initialization routine to run the RapidIO discovery process
> asynchronously. This allows to have an arbitrary order of enumerating and
> discovering ports in systems with multiple RapidIO controllers without
> creating a
On 10/03/2012 08:35:58 AM, Kumar Gala wrote:
On Oct 3, 2012, at 5:42 AM, Wang Dongsheng wrote:
> This is only for freescale powerpc platform. The driver provides a
way
> to wake up system. Proc
interface(/proc/powerpc/wakeup_timer_seconds).
>
> eg: "echo 5 > /proc/powerpc/wakeup_timer_seco
On Wed, 3 Oct 2012 15:18:39 -0400
Alexandre Bounine wrote:
> Fix blocking wait loop in the RapidIO discovery routine to avoid warning
> dumps about stalled CPU on x86 platforms.
>
> ...
>
> + to_end = jiffies + CONFIG_RAPIDIO_DISC_TIMEOUT * HZ;
> + while (time_before(jif
Make RIONET driver multi-net safe/capable by introducing per-net lists of
RapidIO network peers. Rework registration of network adapters to support
all available RIO master port devices.
Signed-off-by: Alexandre Bounine
Cc: Matt Porter
Cc: Li Yang
Cc: David S. Miller
---
drivers/net/rionet.c
Replace the single global destination ID counter with per-net allocation
mechanism to allow independent destID management for each available RapidIO
network. Using bitmap based mechanism instead of counters allows
destination ID release and reuse in systems that support hot-swap.
Signed-off-by: Al
Modify handling of device lists to resolve issues caused by using single global
list of RIO devices during enumeration/discovery. The most common sign of
existing issue is incorrect contents of switch routing tables in systems with
multiple mport controllers while single-port configuration performs
The following set of patches provides modifications targeting support of
multiple
RapidIO master port (mport) devices on a CPU-side of RapidIO-capable board.
While the RapidIO subsystem code has definitions suitable for
multi-controller/multi-net support, the existing implementation cannot be
cons
Fix blocking wait loop in the RapidIO discovery routine to avoid warning
dumps about stalled CPU on x86 platforms.
Signed-off-by: Alexandre Bounine
Cc: Matt Porter
Cc: Li Yang
---
drivers/rapidio/rio-scan.c | 62 ++-
1 files changed, 20 insertions(+),
Modify mport initialization routine to run the RapidIO discovery process
asynchronously. This allows to have an arbitrary order of enumerating and
discovering ports in systems with multiple RapidIO controllers without
creating a deadlock situation if enumerator port is registered after a
discoverin
Hi,
On Mon, 24 Sep 2012 18:16:47 -0400
Eric Millbrandt wrote:
> Add a node for the pcm030-audio-fabric ASoC driver
>
> Signed-off-by: Eric Millbrandt
> ---
> arch/powerpc/boot/dts/pcm030.dts |7 ++-
> 1 files changed, 6 insertions(+), 1 deletions(-)
Appied to next, thanks.
Anatolij
On Oct 3, 2012, at 5:42 AM, Wang Dongsheng wrote:
> This is only for freescale powerpc platform. The driver provides a way
> to wake up system. Proc interface(/proc/powerpc/wakeup_timer_seconds).
>
> eg: "echo 5 > /proc/powerpc/wakeup_timer_seconds", 5 seconds
> after the system will be woken up
Ben,
A few minor patches for v3.7.
The following changes since commit 7844663a31e97930e3949430573452ac245bfdd5:
powerpc/eeh: Don't release eeh_mutex in eeh_phb_pe_get (2012-09-27 12:51:07
+1000)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/po
On Sep 27, 2012, at 2:02 PM, Chunhe Lan wrote:
> There are some differences of register offset and definition between
> pci and pcie error management registers. While, some other pci/pcie
> error management registers are nearly the same.
>
> To merge pci and pcie edac code into one, it is easier
This is only for freescale powerpc platform. The driver provides a way
to wake up system. Proc interface(/proc/powerpc/wakeup_timer_seconds).
eg: "echo 5 > /proc/powerpc/wakeup_timer_seconds", 5 seconds
after the system will be woken up. echo another time into proc interface
to update the time.
S
The MPIC global timer is a hardware timer inside the Freescale PIC comply
to Open-PIC standard. When the timer is timeout of the specified interval,
the hardware timer generates an interrupt. The driver currently is only
tested on fsl chip, but it can potentially support other global timers
complyi
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