Make BHRB instructions available in problem and privileged states.
Signed-off-by: Anshuman Khandual
---
arch/powerpc/include/asm/reg.h| 1 +
arch/powerpc/kernel/cpu_setup_power.S | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/
This patch adds support for the power8 PMU to perf.
Work is ongoing to add generic cache events.
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/Makefile |3 +-
arch/powerpc/perf/power8-pmu.c | 537
2 files changed, 539 insertions(+), 1 de
On power8 we have a new SIER (Sampled Instruction Event Register), which
captures information about instructions when we have random sampling
enabled.
Add support for loading the SIER into pt_regs, overloading regs->dar.
Also set the new NO_SIPR flag in regs->result if we don't have SIPR.
Update
On power8 the presence or absence of SIPR depends on settings at runtime,
so convert to using a dynamic flag for NO_SIPR. Existing backends that
set NO_SIPR unconditionally set the dynamic flag obviously.
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/core-book3s.c | 15 ---
Add an accessor for regs->result so we can use it to store more flags in
future.
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/core-book3s.c |9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
i
On power8 the SIPR and SIHV are not in MMCRA, so convert the routines
to take regs and change the names accordingly.
Signed-off-by: Michael Ellerman
---
arch/powerpc/perf/core-book3s.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/perf/c
In perf_ip_adjust() we potentially use the MMCRA[SLOT] field to adjust
the reported IP of a sampled instruction.
Currently the logic is written so that if the backend does NOT have
the PPMU_ALT_SIPR flag set then we assume MMCRA[SLOT] exists.
However on power8 we do not want to set ALT_SIPR (it's
For both HV and guest kernels, intialise PMU regs to something sane.
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/reg.h|6 ++
arch/powerpc/kernel/cpu_setup_power.S | 21 -
2 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/arch/po
The TCE should be invalidated while it's created or free'd. The
approach to do that for IODA1 and IODA2 compliant PHBs are different.
So the patch differentiate them with different functions called to
do that for IODA1 and IODA2 compliant PHBs. It's notable that the
PCI address is used to invalidat
Ben found the root cause. Commit 37f02195bee9c25ce44e25204f40b7961a6d7c9d
("powerpc/pci: fix PCI-e devices rescan issue on powerpc platform")
overwrites the IOMMU table of PCI device while enabling PCI device.
The patch intends to fix the IOMMU table after that point.
Signed-off-by: Gavin Shan
--
The patch intends to build 32-bits DMA space for individual PEs on
PHB3. The TVE# is recognized by the combo of PE# and fixed bits
from DMA address, which is zero for 32-bits DMA space.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/pci-ioda.c | 99 +++--
The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
steps to handle the P/Q bits in IVE before EOIing the corresponding
interrupt. The patch changes the EOI handler to cover that. we have
individual IRQ chip in each PHB instance. During the MSI IRQ setup
time, the IRQ chip is copi
The patch intends to initialize PHB3 during system boot stage. The
flag "PNV_PHB_MODEL_PHB3" is introduced to differentiate IODA2
compatible PHB3 from other types of PHBs.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/powernv/pci-ioda.c | 62 +++--
ar
As Michael Ellerman suggested, to add CONFIG_POWERNV_MSI for PowerNV
platform. That's similar to CONFIG_PSERIES_MSI for pSeries platform.
For now, we don't make it dependent on CONFIG_EEH since it's not ready
to enable that yet.
Apart from that, we also enable CONFIG_PPC_MSI_BITMAP on selecting
CO
The patchset includes minimal support for PHB3. Initially, flag "PNV_PHB_IODA2"
is introduced to differentiate IODA2 compliant PHB3 from other types of PHBs and
do initialization accordingly for PHB3. Besides, variable IODA2 tables reside in
system memory and we allocate them in kernel, then pass t
On 2013年04月26日 11:51, Paul Mackerras wrote:
> Building a 64-bit powerpc kernel with PR KVM enabled currently gives
> this error:
>
> AS arch/powerpc/kernel/head_64.o
> arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
> arch/powerpc/kernel/exceptions-64s.S:258: Error: attempt to mov
于 2013/4/26 11:42, Chen Gang 写道:
On 2013年04月26日 11:25, Chen Gang wrote:
On 2013年04月26日 11:08, Mike Qiu wrote:
于 2013/4/26 10:06, Chen Gang 写道:
On 2013年04月26日 10:03, Mike Qiu wrote:
�� 2013/4/26 9:36, Chen Gang �:
On 2013��04��26�� 09:18, Chen Gang wrote:
On 2013��04��26�� 09:06, Chen Gang
Building a 64-bit powerpc kernel with PR KVM enabled currently gives
this error:
AS arch/powerpc/kernel/head_64.o
arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
arch/powerpc/kernel/exceptions-64s.S:258: Error: attempt to move .org backwards
make[2]: *** [arch/powerpc/kernel/head_
On 2013年04月26日 11:25, Chen Gang wrote:
> On 2013年04月26日 11:08, Mike Qiu wrote:
>> 于 2013/4/26 10:06, Chen Gang 写道:
>>> On 2013年04月26日 10:03, Mike Qiu wrote:
�� 2013/4/26 9:36, Chen Gang �:
>> On 2013��04��26�� 09:18, Chen Gang wrote:
On 2013��04��26�� 09:06, Chen Gang wrote:
>>>
On 2013年04月26日 11:08, Mike Qiu wrote:
> 于 2013/4/26 10:06, Chen Gang 写道:
>> On 2013年04月26日 10:03, Mike Qiu wrote:
>>> �� 2013/4/26 9:36, Chen Gang �:
> On 2013��04��26�� 09:18, Chen Gang wrote:
>>> On 2013��04��26�� 09:06, Chen Gang wrote:
>>> CFAR is the Come From Register. It s
于 2013/4/25 14:25, Paul Mackerras 写道:
On Thu, Apr 25, 2013 at 12:05:54PM +0800, Mike Qiu wrote:
This has block my work now
So I hope you can take a look ASAP
Thanks
:)
Mike
As a quick fix, turn on CONFIG_KVM_BOOK3S_64_HV. That will eliminate
the immediate problem.
Thanks
got it, I will have
Anshuman,
IIRC there are new bits in the FSCR and HFSCR you need to enable for the
PMU and BRHB. Can you please check these are enabled?
Mikey
Anshuman Khandual wrote:
> Branch History Rolling Buffer (BHRB) is a new PMU feaure in
> IBM
> POWER8 processor which records the bran
于 2013/4/26 10:06, Chen Gang 写道:
On 2013年04月26日 10:03, Mike Qiu wrote:
�� 2013/4/26 9:36, Chen Gang �:
On 2013��04��26�� 09:18, Chen Gang wrote:
On 2013��04��26�� 09:06, Chen Gang wrote:
CFAR is the Come From Register. It saves the location of the last
branch and is hence overwritten by a
Hi Nathan,
On Wed, 24 Apr 2013 10:55:08 -0500 Nathan Fontenot
wrote:
>
> When iterating over the entries in firmware_features_table we only need
> to go over the actual number of entries in the array instead of declaring
> it to be bigger and checking to make sure there is a valid entry in every
Hi Nathan,
On Wed, 24 Apr 2013 10:49:36 -0500 Nathan Fontenot
wrote:
>
> @@ -134,6 +134,7 @@
> char *prop_data;
> char *rtas_buf;
> int update_properties_token;
> + u32 vd;
>
> update_properties_token = rtas_token("ibm,update-properties");
> if (update_proper
> -Original Message-
> From: Benjamin Herrenschmidt [mailto:b...@kernel.crashing.org]
> Sent: Wednesday, April 24, 2013 12:19 PM
> To: Jia Hongtao-B38951
> Cc: Michael Ellerman; Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH 1/2] powerpc: Move opcode definitions fr
On 2013年04月26日 10:03, Mike Qiu wrote:
> �� 2013/4/26 9:36, Chen Gang �:
>> > On 2013��04��26�� 09:18, Chen Gang wrote:
>>> >> On 2013��04��26�� 09:06, Chen Gang wrote:
> CFAR is the Come From Register. It saves the location of the last
>> > branch and is hence overwritten by any
On 2013年04月26日 09:58, Mike Qiu wrote:
> 于 2013/4/25 19:16, Chen Gang 写道:
>> On 2013年04月25日 14:25, Paul Mackerras wrote:
>>> On Thu, Apr 25, 2013 at 12:05:54PM +0800, Mike Qiu wrote:
> This has block my work now
> So I hope you can take a look ASAP
> Thanks
> :)
>
> Mike
>>>
于 2013/4/26 9:36, Chen Gang 写道:
> On 2013年04月26日 09:18, Chen Gang wrote:
>> On 2013年04月26日 09:06, Chen Gang wrote:
CFAR is the Come From Register. It saves the location of the last
> branch and is hence overwritten by any branch.
>
>>> Do we process it just like others done (e.g. 0x30
于 2013/4/25 19:16, Chen Gang 写道:
On 2013年04月25日 14:25, Paul Mackerras wrote:
On Thu, Apr 25, 2013 at 12:05:54PM +0800, Mike Qiu wrote:
This has block my work now
So I hope you can take a look ASAP
Thanks
:)
Mike
As a quick fix, turn on CONFIG_KVM_BOOK3S_64_HV. That will eliminate
the immedia
On 04/25/2013 08:11 PM, Caraman Mihai Claudiu-B02008 wrote:
-Original Message-
From: kvm-ppc-ow...@vger.kernel.org [mailto:kvm-ppc-
ow...@vger.kernel.org] On Behalf Of Tiejun Chen
Sent: Thursday, April 25, 2013 2:46 PM
To: ga...@kernel.crashing.org
Cc: linuxppc-dev@lists.ozlabs.org; kvm-.
On 2013年04月26日 09:18, Chen Gang wrote:
> On 2013年04月26日 09:06, Chen Gang wrote:
>>> CFAR is the Come From Register. It saves the location of the last
branch and is hence overwritten by any branch.
>> Do we process it just like others done (e.g. 0x300, 0xe00, 0xe20 ...) ?
>> . = 0x90
POWER8 allows us to take interrupts with the MMU on. This gives us a
second set of vectors offset at 0x4000.
Unfortunately when coping these vectors we missed checking for MSR HV
for hardware interrupts (0x500). This results in us trying to use
HSRR0/1 when HV=0, rather than SRR0/1 on HW IRQs
On 2013年04月26日 09:06, Chen Gang wrote:
>> CFAR is the Come From Register. It saves the location of the last
>> > branch and is hence overwritten by any branch.
>> >
> Do we process it just like others done (e.g. 0x300, 0xe00, 0xe20 ...) ?
> . = 0x900
> .globl decrementer_pSeries
> dec
On 2013年04月26日 07:16, Michael Neuling wrote:
>> > diff --git a/arch/powerpc/kernel/exceptions-64s.S
>> > b/arch/powerpc/kernel/exceptions-64s.S
>> > index e789ee7..8997de2 100644
>> > --- a/arch/powerpc/kernel/exceptions-64s.S
>> > +++ b/arch/powerpc/kernel/exceptions-64s.S
>> > @@ -254,7 +254,11
On 04/24/2013 07:28:18 PM, Zhao Chenhui wrote:
On Wed, Apr 24, 2013 at 05:38:16PM -0500, Scott Wood wrote:
> On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote:
> >On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
> >> On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote:
> >> >From: Chen-Hui Zhao
Hi,
Looking at the kdump code for powerpc, I see that if
CONFIG_NONSTATIC_KERNEL is not set then the load address for the capture
kernel is fixed at 32MB.
Why is this?
When using a separate capture kernel I don't see why that should
restrict where I allocate space in the boot kernel.
Chr
Chen Gang wrote:
>
> When CONFIG_KVM_BOOK3S_64_PR is enabled,
> MASKABLE_EXCEPTION_PSERIES(0x900 ...) will includes __KVMTEST, it will
> exceed 0x980 which STD_EXCEPTION_HV(0x980 ...) will use, it will cause
> compiling issue.
>
> The related errors:
> arch/powerpc/kernel/exceptions-64s.S: Asse
On Wednesday, April 24, 2013 5:37 PM Andrew Morton wrote:
>
> On Wed, 24 Apr 2013 10:31:57 -0400 Alexandre Bounine
> wrote:
>
> > Rework to implement RapidIO enumeration/discovery method selection
> > combined with ability to use enumeration/discovery as a kernel module.
> >
> > ...
> >
> > @@ -
On 04/25/2013 03:12 PM, Benjamin Herrenschmidt wrote:
> On Thu, 2013-04-25 at 14:14 -0500, Rob Herring wrote:
>> On 04/25/2013 12:35 PM, Benjamin Herrenschmidt wrote:
[...]
>> You need patch 2 of this series to fix this:
>>
>> driver core: move to_platform_driver to platform_device.h
>>
>> which
On Thu, 2013-04-25 at 14:14 -0500, Rob Herring wrote:
> On 04/25/2013 12:35 PM, Benjamin Herrenschmidt wrote:
> > On Thu, 2013-04-25 at 10:23 -0500, Rob Herring wrote:
> >> Ben, Can I have your Ack for this? The change is straightforward and
> >> neither of the 2 drivers used the id parameter that
On 04/25/2013 12:35 PM, Benjamin Herrenschmidt wrote:
> On Thu, 2013-04-25 at 10:23 -0500, Rob Herring wrote:
>> Ben, Can I have your Ack for this? The change is straightforward and
>> neither of the 2 drivers used the id parameter that is removed.
>
> Didn't you get my mail about a compile failur
On Thu, Apr 25, 2013 at 3:49 AM, Andrew Murray wrote:
> This patch moves struct pci_controller into asm-generic to allow
> for use by other architectures thus reducing code duplication in
> the kernel.
>
> Signed-off-by: Andrew Murray
> ---
> arch/powerpc/include/asm/pci-bridge.h | 87 +---
Michael Ellerman [mich...@ellerman.id.au] wrote:
| From: Michael Ellerman
|
| On power8 we have a new SIER (Sampled Instruction Event Register), which
| captures information about instructions when we have random sampling
| enabled.
|
| Add support for loading the SIER into pt_regs, overloading
On Thu, 2013-04-25 at 10:23 -0500, Rob Herring wrote:
> Ben, Can I have your Ack for this? The change is straightforward and
> neither of the 2 drivers used the id parameter that is removed.
Didn't you get my mail about a compile failure caused by this patch ?
Or did you send an update that I mis
On 04/24/2013 08:48 PM, Tony Breeds wrote:
On Wed, Apr 24, 2013 at 07:54:49PM -0300, luca...@linux.vnet.ibm.com wrote:
From: Lucas Kannebley Tavares
On pseries machines the detection for max_bus_speed should be done
through an OpenFirmware property. This patch adds a function to perform
this de
* Remove A variant of load instruction emulation
Why is this? You handle all other simple load insns, there is
nothing special about LHA. (I reviewed the V4 email thread, no
reason for the chance is given there).
The LHA implementation in V5 was incorrect (didn't sign-extend).
The history o
Michael Ellerman [mich...@ellerman.id.au] wrote:
| From: Michael Ellerman
|
| On power8 the SIPR and SIHV are not in MMCRA, so convert the routines
| to take regs and change the names accordingly.
|
| Signed-off-by: Michael Ellerman
| ---
| arch/powerpc/perf/core-book3s.c | 20 +++---
On 04/25/2013 10:31:51 AM, Segher Boessenkool wrote:
* Remove A variant of load instruction emulation
Why is this? You handle all other simple load insns, there is
nothing special about LHA. (I reviewed the V4 email thread, no
reason for the chance is given there).
The LHA implementation in
* Remove A variant of load instruction emulation
Why is this? You handle all other simple load insns, there is
nothing special about LHA. (I reviewed the V4 email thread, no
reason for the chance is given there).
Segher
___
Linuxppc-dev mailing li
On Sun, Apr 21, 2013 at 9:13 PM, Rob Herring wrote:
> From: Rob Herring
>
> ibmebus is the last remaining user of of_platform_driver and the
> conversion to a regular platform driver is trivial.
>
> Signed-off-by: Rob Herring
> Cc: Benjamin Herrenschmidt
> Cc: Paul Mackerras
> Cc: Hoang-Nam Ng
On 04/16/2013 11:56 PM, David Howells wrote:
Supply accessor functions to set attributes in proc_dir_entry structs.
The following are supplied: proc_set_size() and proc_set_user().
Signed-off-by: David Howells
cc: linuxppc-dev@lists.ozlabs.org
cc: linux-me...@vger.kernel.org
cc: net...@vger.ker
On 04/16/2013 11:57 PM, David Howells wrote:
Clean up the pseries scanlog driver's use of procfs:
(1) Don't need to save the proc_dir_entry pointer as we have the filename to
remove with.
(2) Save the scan log buffer pointer in a static variable (there is only one
of it) and don
On 04/16/2013 11:57 PM, David Howells wrote:
Clean up some of the problems with the rtas_flash driver:
(1) It shouldn't fiddle with the internals of the procfs filesystem (altering
pde->count).
(2) If pid namespaces are in effect, then you can get multiple inodes
connected to a
> -Original Message-
> From: kvm-ppc-ow...@vger.kernel.org [mailto:kvm-ppc-
> ow...@vger.kernel.org] On Behalf Of Tiejun Chen
> Sent: Thursday, April 25, 2013 2:46 PM
> To: ga...@kernel.crashing.org
> Cc: linuxppc-dev@lists.ozlabs.org; kvm-...@vger.kernel.org;
> k...@vger.kernel.org
> Subje
Hello Mike:
This patch can pass compiling with Mike's config file, under my
cross-compiling environments, but does not run under the real machine,
please try it.
Welcome other members to help check this patch whether valid.
Thanks.
On 2013年04月25日 19:51, Chen Gang wrote:
>
> When CONFIG_KVM_BO
On Thu, Apr 25, 2013 at 06:47:58PM +1000, Benjamin Herrenschmidt wrote:
>On Thu, 2013-04-25 at 16:13 +0800, Gavin Shan wrote:
>> It should be "chip_data" (not "irq_data"). Hopefully, you haven't
>> get time to see the reply. Otherwise, it would a bit confused ;-)
>
>Doesn't ics-opal already use chi
When CONFIG_KVM_BOOK3S_64_PR is enabled,
MASKABLE_EXCEPTION_PSERIES(0x900 ...) will includes __KVMTEST, it will
exceed 0x980 which STD_EXCEPTION_HV(0x980 ...) will use, it will cause
compiling issue.
The related errors:
arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
arch/powerpc/kernel
Commit cd66cc2e, "powerpc/85xx: Add AltiVec support for e6500", adds
support for AltiVec on a Book-E class processor, but while compiling
in the CONFIG_PPC_BOOK3E_64 and CONFIG_VIRTUALIZATION case, this
introduce the following error:
arch/powerpc/kernel/exceptions-64e.S:402: undefined reference t
On 2013年04月25日 14:25, Paul Mackerras wrote:
> On Thu, Apr 25, 2013 at 12:05:54PM +0800, Mike Qiu wrote:
>> > This has block my work now
>> > So I hope you can take a look ASAP
>> > Thanks
>> > :)
>> >
>> > Mike
> As a quick fix, turn on CONFIG_KVM_BOOK3S_64_HV. That will eliminate
> the immediate
On Thu, Apr 25, 2013 at 12:05:54PM +0800, Mike Qiu wrote:
> This has block my work now
> So I hope you can take a look ASAP
> Thanks
> :)
>
> Mike
As a quick fix, turn on CONFIG_KVM_BOOK3S_64_HV. That will eliminate
the immediate problem.
Paul.
___
Li
This patch exploits pstore subsystem to read details of common partition
in NVRAM to a separate file in /dev/pstore. For instance, common partition
details will be stored in a file named [common-nvram-6].
Signed-off-by: Aruna Balakrishnaiah
Reviewed-by: Jim Keniston
---
arch/powerpc/platforms/p
Introduce os_partition member in nvram_os_partition structure to identify
if the partition is an os partition or not. This will be useful to handle
non-os partitions of-config and common.
Signed-off-by: Aruna Balakrishnaiah
Reviewed-by: Jim Keniston
---
arch/powerpc/platforms/pseries/nvram.c |
This patch set exploits the pstore subsystem to read details of
of-config partition in NVRAM to a separate file in /dev/pstore.
For instance, of-config partition details will be stored in a
file named [of-nvram-5].
Signed-off-by: Aruna Balakrishnaiah
Reviewed-by: Jim Keniston
---
arch/powerpc/p
This patch set exploits the pstore subsystem to read details of rtas partition
in NVRAM to a separate file in /dev/pstore. For instance, rtas details will be
stored in a file named [rtas-nvram-4].
Signed-off-by: Aruna Balakrishnaiah
Reviewed-by: Jim Keniston
---
arch/powerpc/platforms/pseries/n
IBM's p series machines provide persistent storage for LPARs through NVRAM.
NVRAM's lnx,oops-log partition is used to log oops messages.
Currently the kernel provides the contents of p-series NVRAM only as a
simple stream of bytes via /dev/nvram, which must be interpreted in user
space by the nvram
Introduce generic read function to read nvram partitions other than rtas.
nvram_read_error_log will be retained which is used to read rtas partition
from rtasd. nvram_read_partition is the generic read function to read from
any nvram partition.
Signed-off-by: Aruna Balakrishnaiah
Reviewed-by: Jim
Introduce version and timestamp information in the oops header.
oops_log_info (oops header) holds version (to distinguish between old
and new format oops header), length of the oops text
(compressed or uncompressed) and timestamp.
The version field will sit in the same place as the length in old
h
Removal of syslog prefix in the uncompressed oops text will
help in capturing more oops data.
Signed-off-by: Aruna Balakrishnaiah
Reviewed-by: Jim Keniston
---
arch/powerpc/platforms/pseries/nvram.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/ps
Currently the kernel provides the contents of p-series NVRAM only as a
simple stream of bytes via /dev/nvram, which must be interpreted in user
space by the nvram command in the powerpc-utils package. This patch set
exploits the pstore subsystem to expose each partition in NVRAM as a
separate file
This patch unifies similar definations of INDIRECT_TYPE_* between
PowerPC and Microblaze.
Signed-off-by: Andrew Murray
---
arch/microblaze/include/asm/pci-bridge.h | 23 ---
arch/powerpc/include/asm/pci-bridge.h| 23 ---
arch/powerpc/sysdev/fsl_pci
This patch removes struct pci_controller from Microblaze and instead
uses struct pci_controller from asm-generic.
Signed-off-by: Andrew Murray
---
arch/microblaze/include/asm/pci-bridge.h | 75 ++
include/asm-generic/pci-bridge.h |2 +-
2 files changed,
This patch moves struct pci_controller into asm-generic to allow
for use by other architectures thus reducing code duplication in
the kernel.
Signed-off-by: Andrew Murray
---
arch/powerpc/include/asm/pci-bridge.h | 87 +---
include/asm-generic/pci-bridge.h |
PowerPC and Microblaze have nearly identical definations of struct
pci_controller - this patch unifies them in asm-generic to reduce
code duplication and to allow new architectures to reuse.
This patchset follows and depends on "of/pci: Provide common
support for PCI DT parsing" which provided com
On 2013年04月25日 17:05, Chen Gang wrote:
> On 2013年04月25日 17:00, Michael Neuling wrote:
Signed-off-by: Chen Gang
---
arch/powerpc/include/asm/kvm_asm.h |2 +-
arch/powerpc/kernel/exceptions-64s.S |6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
>>>
On 2013年04月25日 17:00, Michael Neuling wrote:
>> >
>> > Signed-off-by: Chen Gang
>> > ---
>> > arch/powerpc/include/asm/kvm_asm.h |2 +-
>> > arch/powerpc/kernel/exceptions-64s.S |6 +++---
>> > 2 files changed, 4 insertions(+), 4 deletions(-)
>> >
>> > diff --git a/arch/powerpc/includ
Chen Gang wrote:
>
> When CONFIG_KVM_BOOK3S_64_PR is enabled,
> MASKABLE_EXCEPTION_PSERIES(0x900 ...) will includes __KVMTEST, it will
> exceed 0x980 which STD_EXCEPTION_HV(0x980 ...) will use, it will cause
> compiling issue.
>
> The related errors:
> arch/powerpc/kernel/exceptions-64s.S: Asse
On Thu, 2013-04-25 at 16:13 +0800, Gavin Shan wrote:
> It should be "chip_data" (not "irq_data"). Hopefully, you haven't
> get time to see the reply. Otherwise, it would a bit confused ;-)
Doesn't ics-opal already use chip_data ?
I was thinking just duplicating the irq_chip (including chip_data)
On Thu, Apr 25, 2013 at 06:52:37AM +1000, Benjamin Herrenschmidt wrote:
>
>> diff --git a/arch/powerpc/include/asm/iommu.h
>> b/arch/powerpc/include/asm/iommu.h
>> index cbfe678..0db308e 100644
>> --- a/arch/powerpc/include/asm/iommu.h
>> +++ b/arch/powerpc/include/asm/iommu.h
>> @@ -76,6 +76,7 @@
于 2013/4/25 16:21, Chen Gang 写道:
Hello Mike:
Please try this patch, at least it can pass compiling with the config
file which you provided under my cross-compiling envrionments.
I do not give a running test now, so better to try to run the new kernel
with this patch.
OK, I will use your patch,
Hello Mike:
Please try this patch, at least it can pass compiling with the config
file which you provided under my cross-compiling envrionments.
I do not give a running test now, so better to try to run the new kernel
with this patch.
Thanks.
On 2013年04月25日 16:18, Chen Gang wrote:
>
> When CON
When CONFIG_KVM_BOOK3S_64_PR is enabled,
MASKABLE_EXCEPTION_PSERIES(0x900 ...) will includes __KVMTEST, it will
exceed 0x980 which STD_EXCEPTION_HV(0x980 ...) will use, it will cause
compiling issue.
The related errors:
arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
arch/powerpc/kernel
On Thu, Apr 25, 2013 at 04:08:37PM +0800, Gavin Shan wrote:
>On Thu, Apr 25, 2013 at 06:49:40AM +1000, Benjamin Herrenschmidt wrote:
>>On Wed, 2013-04-24 at 17:37 +0800, Gavin Shan wrote:
>>> The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
>>> steps to handle the P/Q bits in I
On Thu, Apr 25, 2013 at 06:49:40AM +1000, Benjamin Herrenschmidt wrote:
>On Wed, 2013-04-24 at 17:37 +0800, Gavin Shan wrote:
>> The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
>> steps to handle the P/Q bits in IVE before EOIing the corresponding
>> interrupt. The patch chang
TWR-P1025 Overview
-
512Mbyte DDR3 (on board DDR)
64MB Nor Flash
eTSEC1: Connected to RGMII PHY AR8035
eTSEC3: Connected to RGMII PHY AR8035
Two USB2.0 Type A
One microSD Card slot
One mini-PCIe slot
One mini-USB TypeB dual UART
Signed-off-by: Michael Johnston
Signed-off-
On 2013年04月25日 13:36, Chen Gang wrote:
> On 2013年04月25日 12:05, Mike Qiu wrote:
>>> I will try, and plan to get a result within this week (2013-04-28)
>>>
>>> Thanks.
>> Hi
>> This has block my work now
>> So I hope you can take a look ASAP
>> Thanks
>> :)
>
> The root cause is the room 0x500..0xc0
Michael Neuling wrote:
> In __restore_cpu_power8 we determine if we are HV and if not, we return
> before setting HV only resources.
>
> Unfortunately we forgot to restore the link register from r11 before
> returning.
>
> This will happen on boot and with secondary CPUs not coming online.
>
>
In __restore_cpu_power8 we determine if we are HV and if not, we return
before setting HV only resources.
Unfortunately we forgot to restore the link register from r11 before
returning.
This will happen on boot and with secondary CPUs not coming online.
This adds the missing link register restor
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