Event Based Branching (EBB) is a new POWER8 feature to take asynchronous
userspace interrupt based on events. Currently on POWER8 these events can be
PMU overflows.
This patch series context switches the three new EBB SPRs which are:
- Event Based Branch Handler Register (EBBHR)
- Event Based
From: Michael Ellerman mich...@ellerman.id.au
We are getting low on cpu feature bits. So rather than add a separate bit for
every new Power8 feature, add a bit for arch 2.07 server catagory and use that
instead.
Hijack the value we had for BCTAR, but swap the value with CFAR so that all the
ARCH
This turns Event Based Branching (EBB) on in the Hypervisor Facility Status and
Control Register (HFSCR) and Facility Status and Control Register (FSCR).
Signed-off-by: Michael Neuling mi...@neuling.org
---
arch/powerpc/include/asm/reg.h|2 ++
arch/powerpc/kernel/cpu_setup_power.S |
From: Michael Ellerman mich...@ellerman.id.au
This context switches the new Event Based Branching (EBB) SPRs. The three new
SPRs are:
- Event Based Branch Handler Register (EBBHR)
- Event Based Branch Return Register (EBBRR)
- Branch Event Status and Control Register (BESCR)
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We moved the definition of shift_to_mmu_psize and mmu_psize_to_shift
out of hugetlbpage.c in patch powerpc: New hugepage directory format.
These functions are not related to hugetlbpage and we want to use them
outside hugetlbpage.c We missed
From: Benjamin Herrenschmidt b...@kernel.crashing.org
Date: Wed, 01 May 2013 11:39:53 +1000
I'm not even completely certain bytes are safe to be honest, though
probably more than bitfields. I'll poke our compiler people.
Older Alpha only has 32-bit and 64-bit loads and stores, so byte sized
David Gibson d...@au1.ibm.com writes:
On Tue, Apr 30, 2013 at 10:51:00PM +0530, Aneesh Kumar K.V wrote:
David Gibson d...@au1.ibm.com writes:
On Mon, Apr 29, 2013 at 01:07:39AM +0530, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Encode the actual
On 05/01/2013 03:47 PM, Aneesh Kumar K.V wrote:
David Gibson d...@au1.ibm.com writes:
On Tue, Apr 30, 2013 at 10:51:00PM +0530, Aneesh Kumar K.V wrote:
David Gibson d...@au1.ibm.com writes:
On Mon, Apr 29, 2013 at 01:07:39AM +0530, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V
On Wed, 2013-05-01 at 03:36 -0400, David Miller wrote:
From: Benjamin Herrenschmidt b...@kernel.crashing.org
Date: Wed, 01 May 2013 11:39:53 +1000
I'm not even completely certain bytes are safe to be honest, though
probably more than bitfields. I'll poke our compiler people.
Older Alpha
The initial version of this driver supports only memory to memory
data transfers.
Data transfers between memory and i/o memory require more delicate TCD
(Transfer Control Descriptor) configuration and DMA channel service requests
via hardware.
dma_device.device_control callback function is
On Wed, 2013-05-01 at 11:39 +1000, Benjamin Herrenschmidt wrote:
On Tue, 2013-04-30 at 18:12 -0700, Eric Dumazet wrote:
From: Eric Dumazet eduma...@google.com
Using bit fields is dangerous on ppc64, as the compiler uses 64bit
instructions to manipulate them. If the 64bit word includes
On Wed, May 01, 2013 at 03:52:30PM +0800, Simon Jeons wrote:
On 05/01/2013 03:47 PM, Aneesh Kumar K.V wrote:
David Gibson d...@au1.ibm.com writes:
On Tue, Apr 30, 2013 at 10:51:00PM +0530, Aneesh Kumar K.V wrote:
David Gibson d...@au1.ibm.com writes:
On Mon, Apr 29, 2013 at 01:07:39AM
On Tue, 30 Apr 2013 22:04:32 -0700
Eric Dumazet eric.duma...@gmail.com wrote:
On Wed, 2013-05-01 at 13:24 +0930, Alan Modra wrote:
On Tue, Apr 30, 2013 at 07:24:20PM -0700, Eric Dumazet wrote:
li 11,1
ld 0,0(9)
rldimi 0,11,31,32
std 0,0(9)
blr
.ident GCC: (GNU)
On Wed, 2013-05-01 at 03:36 -0400, David Miller wrote:
From: Benjamin Herrenschmidt b...@kernel.crashing.org
Date: Wed, 01 May 2013 11:39:53 +1000
I'm not even completely certain bytes are safe to be honest, though
probably more than bitfields. I'll poke our compiler people.
Older Alpha
On 04/26/2013 04:32 PM, Robert Jennings wrote:
With this patch before a migration/hibernation all threads present but
not online will be brought online. After migration/hibernation those
threads are taken back offline.
During migration/hibernation all online CPUs must call H_JOIN, this is
On Wed, 2013-05-01 at 16:53 +0100, David Laight wrote:
Why not just change gc_candidate and gc_maybe_cycle to
unsigned char?
It might reduce the number of pad bytes somewhat.
You didn't quite follow the discussion.
I used bytes on V1, and we are not 100% sure its safe on all arches.
unsigned
diff --git a/include/net/af_unix.h b/include/net/af_unix.h
index a8836e8..dbdfd2b 100644
--- a/include/net/af_unix.h
+++ b/include/net/af_unix.h
@@ -57,9 +57,10 @@ struct unix_sock {
struct list_headlink;
atomic_long_t inflight;
spinlock_t
On 04/30/2013 09:06:56 PM, Anthony Foiani wrote:
Scott --
On 04/30/2013 06:42 PM, Scott Wood wrote:
I just meant that, for whatever boards you would have put this in
the device tree, put it in platform code instead (if the platform
file supports more than one board type, then check the
From: Eric Dumazet eric.duma...@gmail.com
Date: Wed, 01 May 2013 08:24:03 -0700
[PATCH v2] af_unix: fix a fatal race with bit fields
Using bit fields is dangerous on ppc64/sparc64, as the compiler [1]
uses 64bit instructions to manipulate them.
If the 64bit word includes any atomic_t or
On 04/27/2013 03:02 AM, Robert Jennings wrote:
With this patch before a migration/hibernation all threads present but
not online will be brought online. After migration/hibernation those
threads are taken back offline.
During migration/hibernation all online CPUs must call H_JOIN, this is
On Tue, Apr 30, 2013 at 02:17:59PM +0200, Mike wrote:
Hi,
i was reading trough arch/powerpc/kernel/misc32.S looking at the icbi and
iccci instructions, from whats on print in
http://s.eeweb.com/members/kvks_kumar/answers/1356585717-PPC440_UM2013.pdf(page
272) iccci should be used once in the
On 04/17/2013 12:04:10 AM, saikrishna gajula wrote:
HI All,
I am new to this group. I am working on Freescale P2020
platform running linux 2.6.21. I am looking for debug
mechanism/utility,
when a multi threaded application running on linux , appears to be
hung (
running in a
On Wed, 2013-05-01 at 10:25 -0500, Nathan Fontenot wrote:
On 04/26/2013 04:32 PM, Robert Jennings wrote:
With this patch before a migration/hibernation all threads present but
not online will be brought online. After migration/hibernation those
threads are taken back offline.
During
On 05/01/2013 06:35:38 PM, Anthony Foiani wrote:
Scott --
Thanks again for the quick reply.
On 05/01/2013 12:05 PM, Scott Wood wrote:
On 04/30/2013 09:06:56 PM, Anthony Foiani wrote:
Instead of a new property name, I would instead check for my
specific board type (let's call it a foo-8315)
* Benjamin Herrenschmidt (b...@kernel.crashing.org) wrote:
On Wed, 2013-05-01 at 10:25 -0500, Nathan Fontenot wrote:
On 04/26/2013 04:32 PM, Robert Jennings wrote:
With this patch before a migration/hibernation all threads present but
not online will be brought online. After
Some ancient pHyp versions used to create a 8 bytes local-mac-address
property in the device-tree instead of a 6 bytes one for veth.
The Linux driver code to deal with that is an insane hack which also
happens to break with some choices of MAC addresses in qemu by testing
for a bit in the address
From: Wei Yongjun yongjun_...@trendmicro.com.cn
Add the missing unlock before return from function set_base_addr()
when disables the mapping.
Introduced by commit 5df554ad5b7522ea62b0ff9d5be35183494efc21
(kvm/ppc/mpic: in-kernel MPIC emulation)
Signed-off-by: Wei Yongjun
On Wed, May 01, 2013 at 01:17:41PM +0530, Aneesh Kumar K.V wrote:
David Gibson d...@au1.ibm.com writes:
On Tue, Apr 30, 2013 at 10:51:00PM +0530, Aneesh Kumar K.V wrote:
David Gibson d...@au1.ibm.com writes:
On Mon, Apr 29, 2013 at 01:07:39AM +0530, Aneesh Kumar K.V wrote:
From:
28 matches
Mail list logo
