On Thu, Jul 11, 2013 at 12:42:31AM -0400, Vince Weaver wrote:
> On Wed, 10 Jul 2013, Ingo Molnar wrote:
>
> > Exactly - PMUs enumerated in /sys should be self-identifying, it's a
> > hardware topology after all ...
> >
> > Anytime userspace is forced to look into /proc, or into weird places in
On 07/10/2013 06:32 PM, Mahesh J Salgaonkar wrote:
> From: Mahesh Salgaonkar
>
> During Machine Check interrupt on pseries platform, R3 generally points to
> memory region inside RTAS (FWNMI) area. We see r3 corruption because when RTAS
> delivers the machine check exception it passes the address
On 07/10/2013 08:05 PM, Alexander Graf wrote:
>
> On 10.07.2013, at 07:00, Alexey Kardashevskiy wrote:
>
>> On 07/10/2013 03:02 AM, Alexander Graf wrote:
>>> On 07/06/2013 05:07 PM, Alexey Kardashevskiy wrote:
This adds real mode handlers for the H_PUT_TCE_INDIRECT and
H_STUFF_TCE hyper
On Thu, 2013-07-11 at 10:04 +0530, Mahesh Jagannath Salgaonkar wrote:
> > I always got that error and used to wonder why I find FWNMI
> > corrupt. IS this a rtas bug or is it documented in papr ?
>
> Nope. There is no mention of it in PAPR. It looks like a bug in RTAS.
Typically, the top bit in r
On Wed, 10 Jul 2013, Ingo Molnar wrote:
> Exactly - PMUs enumerated in /sys should be self-identifying, it's a
> hardware topology after all ...
>
> Anytime userspace is forced to look into /proc, or into weird places in
> /sys it's a FAIL really.
well on x86 you have to look at /proc/cpuinfo
On 07/10/2013 07:41 PM, Aneesh Kumar K.V wrote:
> Mahesh J Salgaonkar writes:
>
>> From: Mahesh Salgaonkar
>>
>> During Machine Check interrupt on pseries platform, R3 generally points to
>> memory region inside RTAS (FWNMI) area. We see r3 corruption because when
>> RTAS
>> delivers the machin
On 07/11/2013 03:15 AM, Scott Wood wrote:
On 07/10/2013 01:02:19 AM, Tiejun Chen wrote:
We should ensure the preemption cannot occur while calling get_paca()
insdide hard_irq_disable(), otherwise the paca_struct may be the
wrong one just after. And btw, we may update timing stats in this case.
On 07/10/2013 06:00 PM, Stefani Seibold wrote:
Am Mittwoch, den 10.07.2013, 16:48 +0800 schrieb tiejun.chen:
On 07/10/2013 04:39 PM, Stefani Seibold wrote:
Hi,
i have tried to kexec a 32 bit kernel on a Freescale P2020 dual core CPU
(e500v2, revison 5.1 - pvr 8021 1051), but Kexec will hang af
Add this file to help detect cpu type in runtime.
These macros will be more favorable for driver
to apply errata and workaround to specified cpu type.
Signed-off-by: Haijun Zhang
Signed-off-by: Zhao Chenhui
---
changes for v3:
- remove get_svr and is_svr_rev
arch/powerpc/include/asm/mp
Thanks.
Regards
Haijun.
> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, July 11, 2013 4:30 AM
> To: Zhang Haijun-B42677
> Cc: Wood Scott-B07421; linux-...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; cbouatmai...@gmail.com; c...@laptop.org; Fleming
> Andy-AFLEMI
On 11.07.2013, at 02:15, Scott Wood wrote:
> On 07/10/2013 05:50:01 PM, Alexander Graf wrote:
>> On 10.07.2013, at 20:42, Scott Wood wrote:
>> > On 07/10/2013 05:15:09 AM, Alexander Graf wrote:
>> >> On 10.07.2013, at 02:06, Scott Wood wrote:
>> >> > On 07/09/2013 04:44:24 PM, Alexander Graf wrot
On 07/10/2013 05:50:01 PM, Alexander Graf wrote:
On 10.07.2013, at 20:42, Scott Wood wrote:
> On 07/10/2013 05:15:09 AM, Alexander Graf wrote:
>> On 10.07.2013, at 02:06, Scott Wood wrote:
>> > On 07/09/2013 04:44:24 PM, Alexander Graf wrote:
>> >> On 09.07.2013, at 20:46, Scott Wood wrote:
>>
On 10.07.2013, at 20:42, Scott Wood wrote:
> On 07/10/2013 05:15:09 AM, Alexander Graf wrote:
>> On 10.07.2013, at 02:06, Scott Wood wrote:
>> > On 07/09/2013 04:44:24 PM, Alexander Graf wrote:
>> >> On 09.07.2013, at 20:46, Scott Wood wrote:
>> >> > I suspect that tlbsx is faster, or at worst si
On 10.07.2013, at 20:37, Scott Wood wrote:
> On 07/10/2013 05:18:10 AM, Alexander Graf wrote:
>> On 10.07.2013, at 02:12, Scott Wood wrote:
>> > On 07/09/2013 04:45:10 PM, Alexander Graf wrote:
>> >> On 28.06.2013, at 11:20, Mihai Caraman wrote:
>> >> > + /* Get page size */
>> >> > +
On 10.07.2013, at 20:24, Scott Wood wrote:
> On 07/10/2013 05:23:36 AM, Alexander Graf wrote:
>> On 10.07.2013, at 00:26, Scott Wood wrote:
>> > On 07/09/2013 05:00:26 PM, Alexander Graf wrote:
>> >> It'll also be more flexible at the same time. You could take the logs and
>> >> actually check w
On Wed, Jul 10, 2013 at 2:40 PM, Benjamin Herrenschmidt
wrote:
> Well, it should work,
I tried forcing NET_IP_ALIGN to 0, and I did see the DMA accesses
align on 32-bit boundaries with all the byte enables set. However,
the memory corruption still occurred.
> but it's possible that there i
On 07/10/2013 02:39:01 AM, Haijun Zhang wrote:
+/* Get current SOC Version */
+#define GET_SVR() (mfspr(SPRN_SVR))
Unnecessary parens. Why do we need GET_SVR(), versus opencoding it?
Note that U-Boot (which this is patterned after) doesn't have
GET_SVR(), so code that wants to work o
On 07/10/2013 05:11:54 AM, Wang Dongsheng-B40534 wrote:
Hi scott & ben,
About this patch do you have any suggestions?
Thanks
- dongsheng
> -Original Message-
> From: Wang Dongsheng-B40534
> Sent: Sunday, June 09, 2013 6:38 PM
> To: b...@kernel.crashing.org
> Cc: johan...@sipsolutions.
On Wed, 2013-07-10 at 14:06 -0700, Peter LaDow wrote:
> I have a bit more information, but I'm not sure of the impact. So far
> I have been dump lots of debugging output trying to determine where
> this memory corruption could be coming from. I've sprinkled the
> driver with wmb() (near every DMA
On 07/09/2013 08:49:52 PM, Kevin Hao wrote:
I got the following error on my t4240qds board.
ntpd[2713]: unhandled signal 4 at 0fd5b448 nip 0fd5b448 lr 0fd5b424
code 30001
The root cause is that the float point instruction 'fsqrt' is used.
But this instruction is not implemented on e6500 cor
I have a bit more information, but I'm not sure of the impact. So far
I have been dump lots of debugging output trying to determine where
this memory corruption could be coming from. I've sprinkled the
driver with wmb() (near every DMA function and the hardware IO), loads
of printk's to get the D
On 07/09/2013 10:41:22 PM, Zhang Haijun-B42677 wrote:
> No. It's still supposed to be describing the sdhc block itself,
not the
> board -- and any workarounds that key off of this will still fail
to work
> with existing device trees.
[Haijun Wrote:] So, leave dts unchanged and to check compi
From: Arnaldo Carvalho de Melo
Hi Ingo,
Please consider pulling,
Regards,
- Arnaldo
The following changes since commit e5302920da9ef23f9d19d4e9ac85704cc25bee7a:
perf: Fix interrupt handler timing harness (2013-07-05 08:54:43 +0200)
are available in the git repository at:
git://
From: Runzhen Wang
In the Power7 PMU guide:
https://www.power.org/documentation/commonly-used-metrics-for-performance-analysis/
PM_BRU_MPRED is referred to as PM_BR_MPRED.
It fixed the typo by changing the name of the event in kernel and
documentation accordingly.
This patch changes the ABI, th
On 07/10/2013 01:02:19 AM, Tiejun Chen wrote:
We should ensure the preemption cannot occur while calling get_paca()
insdide hard_irq_disable(), otherwise the paca_struct may be the
wrong one just after. And btw, we may update timing stats in this
case.
The soft-ee mechanism depends on accessi
On 07/10/2013 05:15:09 AM, Alexander Graf wrote:
On 10.07.2013, at 02:06, Scott Wood wrote:
> On 07/09/2013 04:44:24 PM, Alexander Graf wrote:
>> On 09.07.2013, at 20:46, Scott Wood wrote:
>> > I suspect that tlbsx is faster, or at worst similar. And unlike
comparing tlbsx to lwepx (not coun
On 07/10/2013 05:18:10 AM, Alexander Graf wrote:
On 10.07.2013, at 02:12, Scott Wood wrote:
> On 07/09/2013 04:45:10 PM, Alexander Graf wrote:
>> On 28.06.2013, at 11:20, Mihai Caraman wrote:
>> > + /* Get page size */
>> > + if (MAS0_GET_TLBSEL(mfspr(SPRN_MAS0)) == 0)
>> > + psize_shif
On 07/10/2013 05:23:36 AM, Alexander Graf wrote:
On 10.07.2013, at 00:26, Scott Wood wrote:
> On 07/09/2013 05:00:26 PM, Alexander Graf wrote:
>> It'll also be more flexible at the same time. You could take the
logs and actually check what's going on to debug issues that you're
encountering
Hello.
I would like to monitor the value of one of the parameters (within the stack
frame) that have been passed as part of a context switch (from process
context to interrupt context). Hence I have been looking at the call flow of
a typical exception (which can be thought of as a synchronous exce
On 10.07.2013, at 16:17, Alexey Kardashevskiy wrote:
> On 07/10/2013 08:27 PM, Alexander Graf wrote:
>>
>> On 10.07.2013, at 01:35, Alexey Kardashevskiy wrote:
>>
>>> On 07/10/2013 01:35 AM, Alexander Graf wrote:
On 06/27/2013 07:02 AM, Alexey Kardashevskiy wrote:
> Signed-off-by: Alex
On 07/10/2013 08:27 PM, Alexander Graf wrote:
>
> On 10.07.2013, at 01:35, Alexey Kardashevskiy wrote:
>
>> On 07/10/2013 01:35 AM, Alexander Graf wrote:
>>> On 06/27/2013 07:02 AM, Alexey Kardashevskiy wrote:
Signed-off-by: Alexey Kardashevskiy
---
include/uapi/linux/kvm.h |2
Mahesh J Salgaonkar writes:
> From: Mahesh Salgaonkar
>
> During Machine Check interrupt on pseries platform, R3 generally points to
> memory region inside RTAS (FWNMI) area. We see r3 corruption because when RTAS
> delivers the machine check exception it passes the address inside FWNMI area
> w
Gerhard Sittig wrote:
>+ * Author is Alexander Popov.
nit pick: is 1337 speak usual and appropriate here?
Um, that's his actual email address.
shouldn't headers get sorted alphabetically?
Is that a new policy? I've never heard that requirement.
+MODULE_AUTHOR("Alexander Popov ");
+MO
On 07/10/2013 08:46 AM, Gerhard Sittig wrote:
> On Wed, Jul 10, 2013 at 14:21 +0400, Alexander Popov wrote:
>>
>> This is SCLPC device driver for the Freescale MPC512x.
>> It is needed for Direct Memory Access to the devices on LocalPlus Bus.
>>
>> Signed-off-by: Alexander Popov
>> ---
>> arch/po
On Wed, Jul 10, 2013 at 14:21 +0400, Alexander Popov wrote:
>
> This is SCLPC device driver for the Freescale MPC512x.
> It is needed for Direct Memory Access to the devices on LocalPlus Bus.
>
> Signed-off-by: Alexander Popov
> ---
> arch/powerpc/boot/dts/mpc5121.dtsi| 8 +-
> ar
From: Mahesh Salgaonkar
During Machine Check interrupt on pseries platform, R3 generally points to
memory region inside RTAS (FWNMI) area. We see r3 corruption because when RTAS
delivers the machine check exception it passes the address inside FWNMI area
with the top most bit set. This patch fixe
Disclaimer: It's been a while since I worked with the MPC512x
DMA controller, and I only read the RM rev3 back then.
On Wed, Jul 10, 2013 at 14:20 +0400, Alexander Popov wrote:
>
> Data transfers between memory and i/o memory require more delicate TCD
> (Transfer Control Descriptor) configuratio
The math.c is only built when CONFIG_MATH_EMULATION is enabled.
So we would never get into the case that CONFIG_MATH_EMULATION
is not defined in this file.
It seems that these codes have been there for a very long time.
Benjamin Herrenschmidt has gave a detailed background of them.
This is ancie
The math.c is only built when CONFIG_MATH_EMULATION is enabled.
So the #ifdef check for CONFIG_MATH_EMULATION in it seems redundant.
Drop all of them.
Signed-off-by: Kevin Hao
---
v2: No change.
arch/powerpc/math-emu/math.c | 4
1 file changed, 4 deletions(-)
diff --git a/arch/powerpc/mat
v2:
Update the patch 1 commit log as requested by Michael.
v1:
Just remove some dead or unneeded codes in math.c. No function change.
Kevin Hao (2):
powerpc/math-emu: remove the dead code in math.c
powerpc/math-emu: remove the unneeded check for CONFIG_MATH_EMULATION
in math.c
arch/
On 10.07.2013, at 12:40, Alexander Graf wrote:
>
> On 10.07.2013, at 12:39, Benjamin Herrenschmidt wrote:
>
>> On Wed, 2013-07-10 at 12:33 +0200, Alexander Graf wrote:
>>>
>>> It's not exactly obvious that you're calling it with writing == 1 :).
>>> Can you create a new local variable "is_writ
On 10.07.2013, at 12:39, Benjamin Herrenschmidt wrote:
> On Wed, 2013-07-10 at 12:33 +0200, Alexander Graf wrote:
>>
>> It's not exactly obvious that you're calling it with writing == 1 :).
>> Can you create a new local variable "is_write" in the calling
>> function, set that to 1 before the cal
On Wed, 2013-07-10 at 12:33 +0200, Alexander Graf wrote:
>
> It's not exactly obvious that you're calling it with writing == 1 :).
> Can you create a new local variable "is_write" in the calling
> function, set that to 1 before the call to get_user_pages_fast and
> pass it in instead of the 1? The
The code enabled SSIEN when triggered by SNDRV_PCM_TRIGGER_START,
so move the disable code to SNDRV_PCM_TRIGGER_STOP for symmetric.
This also allows us to use the SSI driver more flexible so that
it can support some use cases like "aplay S16_LE.wav S24_LE.wav"
which would call the driver in sequen
On 10.07.2013, at 01:29, Alexey Kardashevskiy wrote:
> On 07/10/2013 03:32 AM, Alexander Graf wrote:
>> On 07/06/2013 05:07 PM, Alexey Kardashevskiy wrote:
>>> This adds special support for huge pages (16MB). The reference
>>> counting cannot be easily done for such pages in real mode (when
>>>
On 10.07.2013, at 01:35, Alexey Kardashevskiy wrote:
> On 07/10/2013 01:35 AM, Alexander Graf wrote:
>> On 06/27/2013 07:02 AM, Alexey Kardashevskiy wrote:
>>> Signed-off-by: Alexey Kardashevskiy
>>> ---
>>> include/uapi/linux/kvm.h |2 ++
>>> 1 file changed, 2 insertions(+)
>>>
>>> diff --
On 10.07.2013, at 00:26, Scott Wood wrote:
> On 07/09/2013 05:00:26 PM, Alexander Graf wrote:
>> On 09.07.2013, at 23:54, Scott Wood wrote:
>> > On 07/09/2013 04:49:32 PM, Alexander Graf wrote:
>> >> Not sure I understand. What the timing stats do is that they measure the
>> >> time between [exi
This is SCLPC device driver for the Freescale MPC512x.
It is needed for Direct Memory Access to the devices on LocalPlus Bus.
Signed-off-by: Alexander Popov
---
arch/powerpc/boot/dts/mpc5121.dtsi| 8 +-
arch/powerpc/include/asm/mpc5121.h| 32 ++
arch/powerpc/platforms/
Data transfers between memory and i/o memory require more delicate TCD
(Transfer Control Descriptor) configuration and DMA channel service requests
via hardware.
dma_device.device_control callback function is needed to configure
DMA channel to work with i/o memory.
Signed-off-by: Alexander Popov
On 10.07.2013, at 02:12, Scott Wood wrote:
> On 07/09/2013 04:45:10 PM, Alexander Graf wrote:
>> On 28.06.2013, at 11:20, Mihai Caraman wrote:
>> > + /* Get page size */
>> > + if (MAS0_GET_TLBSEL(mfspr(SPRN_MAS0)) == 0)
>> > + psize_shift = PAGE_SHIFT;
>> > + else
>> > + psi
On 10.07.2013, at 02:06, Scott Wood wrote:
> On 07/09/2013 04:44:24 PM, Alexander Graf wrote:
>> On 09.07.2013, at 20:46, Scott Wood wrote:
>> > I suspect that tlbsx is faster, or at worst similar. And unlike comparing
>> > tlbsx to lwepx (not counting a fix for the threading problem), we don't
Hi scott & ben,
About this patch do you have any suggestions?
Thanks
- dongsheng
> -Original Message-
> From: Wang Dongsheng-B40534
> Sent: Sunday, June 09, 2013 6:38 PM
> To: b...@kernel.crashing.org
> Cc: johan...@sipsolutions.net; an...@enomsg.org; Wood Scott-B07421;
> ga...@kernel.c
> -Original Message-
> From: Benjamin Herrenschmidt [mailto:b...@kernel.crashing.org]
> Sent: Wednesday, July 10, 2013 5:52 PM
> To: Wang Dongsheng-B40534
> Cc: Wood Scott-B07421; johan...@sipsolutions.net; an...@enomsg.org;
> ga...@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org
> Sub
On 10.07.2013, at 07:00, Alexey Kardashevskiy wrote:
> On 07/10/2013 03:02 AM, Alexander Graf wrote:
>> On 07/06/2013 05:07 PM, Alexey Kardashevskiy wrote:
>>> This adds real mode handlers for the H_PUT_TCE_INDIRECT and
>>> H_STUFF_TCE hypercalls for QEMU emulated devices such as IBMVIO
>>> devic
Am Mittwoch, den 10.07.2013, 16:48 +0800 schrieb tiejun.chen:
> On 07/10/2013 04:39 PM, Stefani Seibold wrote:
> > Hi,
> >
> > i have tried to kexec a 32 bit kernel on a Freescale P2020 dual core CPU
> > (e500v2, revison 5.1 - pvr 8021 1051), but Kexec will hang after the
> > "Bye!".
> >
> > The ho
On Wed, 2013-07-10 at 09:41 +, Wang Dongsheng-B40534 wrote:
> Hi scott,
>
> Could you apply this patch?
There were a numbre of comments, were there addressed ? Do you need to
save all the SPRGs for example ?
Ben.
> Thanks.
>
> -dongsheng
>
> > -Original Message-
> > From: Wang Don
> -Original Message-
> From: Benjamin Herrenschmidt [mailto:b...@kernel.crashing.org]
> Sent: Wednesday, July 10, 2013 5:33 PM
> To: Wang Dongsheng-B40534
> Cc: Wood Scott-B07421; ga...@kernel.crashing.org; Zhao Chenhui-B35336; Li
> Yang-R58472; linuxppc-dev@lists.ozlabs.org
> Subject: Re
Hi scott,
Could you apply this patch?
Thanks.
-dongsheng
> -Original Message-
> From: Wang Dongsheng-B40534
> Sent: Sunday, June 09, 2013 6:38 PM
> To: b...@kernel.crashing.org
> Cc: johan...@sipsolutions.net; an...@enomsg.org; Wood Scott-B07421;
> ga...@kernel.crashing.org; linuxppc-de
On Wed, 2013-07-10 at 09:29 +, Wang Dongsheng-B40534 wrote:
> >
> Yes, the wait instructions is for cpu idle, It will be make cpu into
> low power mode, like DOZE & NAP. Each thread have this.
I don't need you to tell me by email, I need you to put a proper
comment in the patch submission so
> -Original Message-
> From: Benjamin Herrenschmidt [mailto:b...@kernel.crashing.org]
> Sent: Wednesday, July 10, 2013 5:23 PM
> To: Wang Dongsheng-B40534
> Cc: Wood Scott-B07421; ga...@kernel.crashing.org; Zhao Chenhui-B35336; Li
> Yang-R58472
> Subject: Re: [RFC 2/2] powerpc/cputable: a
From: Wang Dongsheng
Signed-off-by: Wang Dongsheng
diff --git a/arch/powerpc/include/asm/cputable.h
b/arch/powerpc/include/asm/cputable.h
index 6f3887d..0a8d0cb 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -138,6 +138,7 @@ extern const char *pow
From: Wang Dongsheng
move wait instructions from idle_e500.S to idle_book3e.S
idle_e500.S: rename e500_idle to e500_idle_ph.
idle_book3e.S: rename BOOK3E to E500, this file not only use 64bit
mode.
Next we will modify the current cpu idle running way, and will use
cpuidle framework. Distinguish
* Michael Ellerman wrote:
> On Tue, Jul 09, 2013 at 10:14:34AM +0200, Peter Zijlstra wrote:
> > On Mon, Jul 08, 2013 at 10:24:34PM -0400, Vince Weaver wrote:
> > >
> > > So something like they have on ARM?
> > >
> > > vince@pandaboard:/sys/bus/event_source/devices$ ls -l
> > > lrwxrwxrwx 1 roo
Add this file to help detect cpu type in runtime.
These macros will be more favorable for driver
to apply errata and workaround to specified cpu type.
Signed-off-by: Haijun Zhang
Signed-off-by: Zhao Chenhui
---
changes v2:
- Remove inline function
- Ignore E bit of SOC
-
On Thu, 2013-05-30 at 23:17 +0530, Vinod Koul wrote:
> On Mon, May 27, 2013 at 03:14:30PM +0300, Andy Shevchenko wrote:
> > Here is a set of small independent patches that clean up or fix minor things
> > across DMA slave drivers.
> The series looks fine. I am going to wait a day more and apply, p
Am 10.07.2013 um 09:25 schrieb Michael Neuling :
> Alexander Graf wrote:
>
>>
>> On 09.07.2013, at 06:24, Michael Neuling wrote:
>>
>>> Alexander Graf wrote:
>>>
On 04.07.2013, at 08:15, Bharat Bhushan wrote:
> From: Bharat Bhushan
>
> This patchset moves the
Alexander Graf wrote:
>
> On 09.07.2013, at 06:24, Michael Neuling wrote:
>
> > Alexander Graf wrote:
> >
> >>
> >> On 04.07.2013, at 08:15, Bharat Bhushan wrote:
> >>
> >>> From: Bharat Bhushan
> >>>
> >>> This patchset moves the debug registers in a structure, which allows
> >>> kvm to
Bharat Bhushan wrote:
> This way we can use same data type struct with KVM and
> also help in using other debug related function.
>
> Signed-off-by: Bharat Bhushan
Acked-by: Michael Neuling
> ---
> arch/powerpc/include/asm/processor.h | 38 +
> arch/powerpc/include/asm/reg_booke.h
Bharat Bhushan wrote:
> Signed-off-by: Bharat Bhushan
Acked-by: Michael Neuling
> ---
> arch/powerpc/kernel/process.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
> index c517dbe..19b8733 100644
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