'pe_no' hasn't been defined, it should be an typo error,
it should be 'frozen_pe_no'.
Also '__func__' has missed in IODA_EEH_DBG(),
For safety reasons, use pr_devel() directly, instead
of use IODA_EEH_DBG()
Signed-off-by: Mike Qiu
---
arch/powerpc/platforms/powernv/eeh-ioda.c | 22
Currently we don't save and restore the checkpointed TAR, PPR and DSCR.
This adds the required save and restore to the treclaim and trechkpt code.
Signed-off-by: Michael Neuling
Cc:
---
arch/powerpc/kernel/tm.S | 20
1 file changed, 20 insertions(+)
diff --git a/arch/powe
This moves us to use the save_tar() function to save the Target Address
Register (TAR) a lot earlier in __switch_to.
We need to save the TAR earlier as we may overwrite it in the transactional
memory reclaim/recheckpoint path.
Signed-off-by: Michael Neuling
Cc:
---
arch/powerpc/kernel/entry_64
Add save_tar() function to save the Target Address Register (TAR). This will
be used in a future patch to save the TAR earlier than it currently is.
Signed-off-by: Michael Neuling
Cc:
---
arch/powerpc/include/asm/switch_to.h | 5 +
arch/powerpc/kernel/entry_64.S | 12
2
Transactional memory will restore the TAR, PPR and DSCR on transaction failure.
Add these to the thread_struct for use in the future
Signed-off-by: Michael Neuling
Cc:
---
arch/powerpc/include/asm/processor.h | 4
arch/powerpc/kernel/asm-offsets.c| 3 +++
2 files changed, 7 insertions
On Tue, Aug 06, 2013 at 08:36:38PM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2013-08-06 at 18:23 +0800, Kevin Hao wrote:
> > We don't need to flush the dcache and invalidate the icache on the
> > CPU which has CPU_FTR_COHERENT_ICACHE set.
>
> Actually we probably need an isync...
Will add.
On Tue, Aug 06, 2013 at 08:35:10PM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2013-08-06 at 18:23 +0800, Kevin Hao wrote:
> > In function flush_icache_range(), we use cpu_has_feature() to test
> > the feature bit of CPU_FTR_COHERENT_ICACHE. But this seems not optimal
> > for two reasons:
> > a
'pe_no' hasn't been defined, it should be an typo error,
it should be 'frozen_pe_no'.
Also '__func__' has missed in IODA_EEH_DBG(),
For safety reasons, use pr_info() directly, instead
of use IODA_EEH_DBG()
Signed-off-by: Mike Qiu
---
arch/powerpc/platforms/powernv/eeh-ioda.c | 22 -
>From comparison of pci printout from the two kernel ,
beside the EDAC errors I noticed other strange differences:
In 3.8.13 I got BAR 7 and BAR 8:
[ 39.017749] pci :00:00.0: BAR 8: assigned [mem 0xc000-0xdfff]
[ 39.024530] pci :00:00.0: BAR 7: can't assign io (size 0x1)
I
δΊ 2013/8/7 13:25, Gavin Shan ει:
On Wed, Aug 07, 2013 at 03:11:24PM +1000, Michael Ellerman wrote:
On Tue, Aug 06, 2013 at 10:24:46PM -0400, Mike Qiu wrote:
'pe_no' hasn't been defined, it should be an typo error,
it should be 'frozen_pe_no'.
Also '__func__' should be added to IODA_EEH_DBG(),
On Tue, Aug 6, 2013 at 10:13 PM, Aruna Balakrishnaiah
wrote:
> How is it with erst and efivars?
ERST is at the whim of the BIOS writer (the ACPI standard doesn't provide any
suggestions on record sizes). My systems support ~6K record size.
efivars has, IIRC, a 1k limit coded in the Linux back e
On Wed, Aug 07, 2013 at 03:11:24PM +1000, Michael Ellerman wrote:
>On Tue, Aug 06, 2013 at 10:24:46PM -0400, Mike Qiu wrote:
>> 'pe_no' hasn't been defined, it should be an typo error,
>> it should be 'frozen_pe_no'.
>>
>> Also '__func__' should be added to IODA_EEH_DBG(),
>>
>> Signed-off-by: Mi
On Wed, Aug 07, 2013 at 09:31:00AM +1000, Michael Neuling wrote:
> Anton Blanchard wrote:
>
> > This is the pseries_defconfig with CONFIG_CPU_LITTLE_ENDIAN enabled
> > and CONFIG_VIRTUALIZATION disabled (required until we fix some
> > endian issues in KVM).
>
> The CONFIG_VIRTUALIZATION disablin
Hi Tony,
On Wednesday 07 August 2013 08:55 AM, Tony Luck wrote:
On Tue, Aug 6, 2013 at 6:58 PM, Aruna Balakrishnaiah
wrote:
The patch looks right. I will clean it up. Does the issue still persist
after this?
Things seem to be working - but testing has hardly been extensive (just
a couple of f
On Tue, Aug 06, 2013 at 10:24:46PM -0400, Mike Qiu wrote:
> 'pe_no' hasn't been defined, it should be an typo error,
> it should be 'frozen_pe_no'.
>
> Also '__func__' should be added to IODA_EEH_DBG(),
>
> Signed-off-by: Mike Qiu
> ---
> arch/powerpc/platforms/powernv/eeh-ioda.c | 3 ++-
> 1 f
On Wed, Aug 07, 2013 at 02:02:05AM +1000, Anton Blanchard wrote:
> Add support for the H_SET_MODE hcall so we can select the
> endianness of our exceptions.
>
> We create a guest MSR from scratch when delivering exceptions in
> a few places and instead of extracting the LPCR[ILE] and inserting
> i
On Wed, Aug 07, 2013 at 02:01:53AM +1000, Anton Blanchard wrote:
> +#ifdef __BIG_ENDIAN__
> #define HPTE_LOCK_BIT 3
> +#else
> +#define HPTE_LOCK_BIT (63-3)
> +#endif
Are you deliberately using a different bit here? AFAICS you are using
0x20 in the 7th byte as the lock bit for LE, whereas we us
>
> obj-$(CONFIG_PPC64) += copypage_64.o copyuser_64.o \
> memcpy_64.o usercopy_64.o mem_64.o string.o \
> -checksum_wrappers_64.o hweight_64.o \
> +checksum_wrappers_64.o \
> copyuser_power7.o stri
> -Original Message-
> From: Linuxppc-dev [mailto:linuxppc-dev-bounces+tie-
> fei.zang=freescale@lists.ozlabs.org] On Behalf Of Leon Ravich
> Sent: Tuesday, August 06, 2013 3:26 PM
> To: Johannes Thumshirn
> Cc: Bjorn Helgaas; linux-...@vger.kernel.org; linuxppc-dev
> Subject: Re: PCI
On Tue, Aug 6, 2013 at 6:58 PM, Aruna Balakrishnaiah
wrote:
> The patch looks right. I will clean it up. Does the issue still persist
> after this?
Things seem to be working - but testing has hardly been extensive (just
a couple of forced panics).
I do have one other question. In this code:
>>
On Tue, Aug 06, 2013 at 10:25:14PM -0400, Mike Qiu wrote:
>The procfs entry for global statistics has been missed on PowerNV
>platform and the patch is going to add that.
>
>Signed-off-by: Mike Qiu
Acked-by: Gavin Shan
>---
> arch/powerpc/kernel/eeh.c | 2 +-
> 1 file changed, 1 insertion(+), 1
On Tue, Aug 06, 2013 at 10:24:46PM -0400, Mike Qiu wrote:
>'pe_no' hasn't been defined, it should be an typo error,
>it should be 'frozen_pe_no'.
>
>Also '__func__' should be added to IODA_EEH_DBG(),
>
>Signed-off-by: Mike Qiu
Acked-by: Gavin Shan
>---
> arch/powerpc/platforms/powernv/eeh-ioda.
The procfs entry for global statistics has been missed on PowerNV
platform and the patch is going to add that.
Signed-off-by: Mike Qiu
---
arch/powerpc/kernel/eeh.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 399
'pe_no' hasn't been defined, it should be an typo error,
it should be 'frozen_pe_no'.
Also '__func__' should be added to IODA_EEH_DBG(),
Signed-off-by: Mike Qiu
---
arch/powerpc/platforms/powernv/eeh-ioda.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/platf
On Wednesday 07 August 2013 05:06 AM, Tony Luck wrote:
On Mon, Aug 5, 2013 at 2:20 PM, Tony Luck wrote:
Still have problems booting if there are any compressed images in ERST
to be inflated.
So I took another look at this part of the code ... and saw a couple of issues:
while ((size
On Tue, Aug 06, 2013 at 08:11:34PM -0500, Scott Wood wrote:
> On Wed, 2013-08-07 at 10:24 +1000, Paul Mackerras wrote:
> > On Tue, Aug 06, 2013 at 07:02:48AM +, Bhushan Bharat-R65777 wrote:
> > >
> > > I am trying to me the Linux pte search and update generic so that this
> > > can be used fo
On 07/31/2013 02:25 PM, Haijun Zhang wrote:
Add function to support get voltage from device-tree.
If there are voltage-range specified in device-tree node, this function
will parse it and return the avail voltage mask.
Signed-off-by: Haijun Zhang
---
changes for v2:
- Update the paramet
The RELOCATABLE is more flexible and without any alignment restriction.
And it is a superset of DYNAMIC_MEMSTART. So use it by default for
a kdump kernel.
Signed-off-by: Kevin Hao
---
v3: no change.
v2: A new patch in v2.
arch/powerpc/Kconfig | 3 +--
1 file changed, 1 insertion(+), 2 deletion
This is always true for a non-relocatable kernel. Otherwise the kernel
would get stuck. But for a relocatable kernel, it seems a little
complicated. When booting a relocatable kernel, we just align the
kernel start addr to 64M and map the PAGE_OFFSET from there. The
relocation will base on this vir
For a relocatable kernel since it can be loaded at any place, there
is no any relation between the kernel start addr and the memstart_addr.
So we can't calculate the memstart_addr from kernel start addr. And
also we can't wait to do the relocation after we get the real
memstart_addr from device tre
We use the tlb1 entries to map low mem to the kernel space. In the
current code, it assumes that the first tlb entry would cover the
kernel image. But this is not true for some special cases, such as
when we run a relocatable kernel above the 64M or set
CONFIG_KERNEL_START above 64M. So we choose t
This is based on the codes in the head_44x.S. The difference is that
the init tlb size we used is 64M. With this patch we can only load the
kernel at address between memstart_addr ~ memstart_addr + 64M. We will
fix this restriction in the following patches.
Signed-off-by: Kevin Hao
---
v3:
* Us
Move the codes which translate a effective address to physical address
to a separate function. So it can be reused by other code.
Signed-off-by: Kevin Hao
---
v3: Use ifdef CONFIG_PHYS_64BIT to protect the access to MAS7
v2: A new patch in v2.
arch/powerpc/kernel/head_fsl_booke.S | 50
The e500v1 doesn't implement the MAS7, so we should avoid to access
this register on that implementations. In the current kernel, the
access to MAS7 are protected by either CONFIG_PHYS_64BIT or
MMU_FTR_BIG_PHYS. Since some code are executed before the code
patching, we have to use CONFIG_PHYS_64BIT
v3:
The main changes include:
* Drop the patch 5 in v2 (memblock: introduce the memblock_reinit function)
* Change to use the 64M boot init tlb.
Please refer to the comment section of each patch for more detail.
This patch series passed the kdump test with kernel option "crashkernel=64M@32M"
On Wed, 2013-08-07 at 10:24 +1000, Paul Mackerras wrote:
> On Tue, Aug 06, 2013 at 07:02:48AM +, Bhushan Bharat-R65777 wrote:
> >
> > I am trying to me the Linux pte search and update generic so that this can
> > be used for powerpc as well.
> >
> > I am not sure which of the below two shoul
On Tue, Aug 06, 2013 at 07:02:48AM +, Bhushan Bharat-R65777 wrote:
>
> I am trying to me the Linux pte search and update generic so that this can be
> used for powerpc as well.
>
> I am not sure which of the below two should be ok, please help
Given that the BookE code uses gfn_to_pfn_memsl
On Tue, 2013-08-06 at 18:10 -0500, Scott Wood wrote:
> On Thu, 2013-08-01 at 19:49 +0200, Lutz Jaenicke wrote:
> > The TBIPA register is part of gianfar's full register set. When starting
> > from the MII registers, the start address of struct gfar needs to
> > be determined via container_of().
> >
On Wed, 2013-08-07 at 09:30 +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2013-08-06 at 18:08 -0500, Scott Wood wrote:
> > Here's another example. get_lppaca() will only build on book3s -- and
> > yet we get requests for e500 code to use this file.
>
> Indeed, Besides there is already accessors
On Mon, Aug 5, 2013 at 2:20 PM, Tony Luck wrote:
> Still have problems booting if there are any compressed images in ERST
> to be inflated.
So I took another look at this part of the code ... and saw a couple of issues:
while ((size = psi->read(&id, &type, &count, &time, &buf, &compresse
On Tue, 2013-08-06 at 18:08 -0500, Scott Wood wrote:
> Here's another example. get_lppaca() will only build on book3s -- and
> yet we get requests for e500 code to use this file.
Indeed, Besides there is already accessors afaik for lppaca that compile
to nothing on E (and if not they would be tri
Anton Blanchard wrote:
> This is the pseries_defconfig with CONFIG_CPU_LITTLE_ENDIAN enabled
> and CONFIG_VIRTUALIZATION disabled (required until we fix some
> endian issues in KVM).
The CONFIG_VIRTUALIZATION disabling should be done in the Kconfig not
here.
I'm not that keen on another defcon
On Thu, 2013-08-01 at 19:49 +0200, Lutz Jaenicke wrote:
> The TBIPA register is part of gianfar's full register set. When starting
> from the MII registers, the start address of struct gfar needs to
> be determined via container_of().
> Experienced with mpc8313 and "fsl,gianfar-mdio" device tree en
On Wed, 2013-07-31 at 08:29 +0530, Deepthi Dharwar wrote:
> /*
> - * pseries_idle_probe()
> + * powerpc_idle_probe()
> * Choose state table for shared versus dedicated partition
> */
> -static int pseries_idle_probe(void)
> +static int powerpc_idle_probe(void)
> {
>
> +#ifndef PPC_POWERNV
>
[ this is an overview on how to split the series if necessary ]
On Tue, Aug 06, 2013 at 22:43 +0200, Gerhard Sittig wrote:
>
> this series
> - fixes several drivers that are used in the MPC512x platform (UART,
> SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they
> handle clo
remove the last clkdev registration call ("sys_clk" and "ref_clk"
for CAN), as well as the clkdev header inclusion and the "compat
registration" comment
all client lookups for clock items are device tree based now, no
compatibility alias names need to get provided any longer
remove the now obsole
transition to the common clock framework has completed and the PPC_CLOCK
is no longer available for the MPC512x platform, remove the now obsolete
code path of the mpc5xxx mscan driver which accessed clock control
module registers directly
Signed-off-by: Gerhard Sittig
---
drivers/net/can/mscan/m
completely switch to, i.e. unconditionally use COMMON_CLK for the
MPC512x platform, and retire the PPC_CLOCK implementation for that
platform after the transition has completed
Signed-off-by: Gerhard Sittig
---
arch/powerpc/platforms/512x/Kconfig | 14 +-
arch/powerpc/platforms/512x/Makefile
adapt the DIU clock initialization to the COMMON_CLK approach:
device tree based clock lookup, prepare and unprepare for clocks,
work with frequencies not dividers, call the appropriate clk_*()
routines and don't access CCM registers, remove the pre-enable
workaround in the platform's clock driver
implement a .get_clock() callback for the MPC512x platform which uses
the common clock infrastructure (eliminating direct access to the clock
control registers from within the CAN network driver), and provide the
corresponding .put_clock() callback to release resources after use
keep the previous
after device tree based clock lookup became available, the VIU driver
need no longer use the previous "viu_clk" name but can switch to the
fixed "per" clock name -- adjust the peripheral driver and remove the
clock driver's clkdev registration
Signed-off-by: Gerhard Sittig
---
arch/powerpc/platf
after device tree based clock lookup became available, the NAND flash
driver need no longer use the previous "nfc_clk" name but can switch to
the fixed "per" clock name -- adjust the peripheral driver and remove
the clock driver's clkdev registration
Signed-off-by: Gerhard Sittig
---
arch/powerp
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the component
index -- remove the "usb%d_clk" template and unconditionally use "per",
remove the clock driver's clkdev registration
Signed-off-by: Gerhard Sittig
---
ar
prepare and enable the FIFO clock upon PSC FIFO initialization,
check for and propagage errors when enabling the PSC FIFO clock,
disable and unprepare the FIFO clock upon PSC FIFO uninitialization,
remove the pre-enable workaround from the platform's clock driver
devm_{get,put}_clk() doesn't apply
after the UART and SPI peripheral drivers have switched to device tree
based clock lookup and no longer construct clock names from their PSC
component index, the "psc%d_mclk" alias names have become obsolete --
remove the corresponding clk_register_clkdev() calls
after the UART and SPI peripheral
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the "psc%d_mclk" template and unconditionally use 'mclk'
acquire and release the 'ipg' clock for register access as well
Signed-off-by: Gerhard Sit
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the "psc%d_mclk" template and unconditionally use 'mclk'
acquire and release the 'ipg' clock for register access as well
Signed-off-by: Gerhard Sit
after the device tree nodes provide clock specs for client side lookups,
peripheral drivers can attach to their clocks and the clock driver need
no longer pre-enable those clock items
Signed-off-by: Gerhard Sittig
---
arch/powerpc/platforms/512x/clock-commonclk.c |2 --
1 file changed, 2 del
this addresses the client side of device tree based clock lookups
add clock specifiers to the mbx, nfc, mscan, sdhc, i2c, axe, diu, viu,
mdio, fec, usb, pata, psc, psc fifo, and pci nodes in the shared
mpc5121.dtsi include
these specs map 'clock-names' encoded in drivers to their respective
'stru
this change implements a clock driver for the MPC512x PowerPC platform
which follows the COMMON_CLK approach and uses common clock drivers
shared with other platforms
this driver implements the publicly announced set of clocks (which can
get referenced by means of symbolic identifiers from the dt-
this addresses the clock driver aka provider's side of clocks
- prepare for future '<&clks ID>' phandle references for device tree
based clock lookup in client drivers
- introduce a 'clocks' subtree with an 'osc' node for the crystal
or oscillator SoC input (fixed frequency)
- provide default v
introduce a dt-bindings/ header file for MPC512x clocks,
providing symbolic identifiers for those SoC clocks which
clients will reference from their device tree nodes
Reviewed-by: Mike Turquette # for v3: w/o bdlc, PSC
ipg
Signed-off-by: Gerhard Sittig
---
include/dt-bindings/clock/mpc512x
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals
wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms
Signed-off-by: Gerhard Sittig
---
drivers/clk
prepare C preprocessor support when processing MPC512x DTS files
- switch from DTS syntax to CPP syntax for include specs
- create a symlink such that DTS processing can reference includes
Signed-off-by: Gerhard Sittig
---
arch/powerpc/boot/dts/ac14xx.dts |2 +-
arch/powerpc/boot/dt
reword the clock control module's registers declaration such that the
MCLK related registers form an array and get indexed by PSC controller
or CAN controller component number
this change is in preparation to COMMON_CLK support for the MPC512x
platform, the changed declaration remains neutral to e
the .get_clock() callback is run from probe() and might allocate
resources, introduce a .put_clock() callback that is run from remove()
to undo any allocation activities
prepare and enable the clocks in open(), disable and unprepare the
clocks in close() if clocks were acquired during probe(), to
add a comment about the magic of deriving an MSCAN component index
from the peripheral's physical address / register offset
Signed-off-by: Gerhard Sittig
---
drivers/net/can/mscan/mpc5xxx_can.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/can/mscan/mpc5x
make the Freescale PCI driver get, prepare and enable the PCI clock
during probe(); the clock gets put upon device close by the devm approach
clock lookup is non-fatal as not all platforms may provide clock specs
in their device tree, but failure to enable specified clocks are fatal
the driver ap
make the Freescale ethernet driver get, prepare and enable the FEC clock
during probe(); disable and unprepare the clock upon remove(), put is
done by the devm approach; hold a reference to the clock over the period
of use
clock lookup is non-fatal as not all platforms provide clock specs in
their
Signed-off-by: Gerhard Sittig
---
drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c |1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
index 8de53a1..c04eb3a 100644
--- a/drivers
make the MPC I2C driver get, prepare and enable the peripheral clock
during probe ('per' for access to the peripheral's registers); disable
and unprepare the clock upon remove(), put is done by the devm approach;
hold a reference to the clock over the period of use
clock lookup is non-fatal in thi
On 08/04/2013 10:13 PM, Michael Ellerman wrote:
> On Fri, Aug 02, 2013 at 02:13:06PM -0500, Nathan Fontenot wrote:
>> On 08/01/2013 09:32 PM, Michael Ellerman wrote:
>>> On Wed, Jul 24, 2013 at 01:37:47PM -0500, Nathan Fontenot wrote:
When doing memory hot add via the 'probe' interface in sysf
use devm_clk_get() for automatic put after device close, check for and
propagate errors when enabling clocks, need to prepare clocks before
they can get enabled, adjust code paths to correctly balance get/put and
prepare/unprepare and enable/disable calls
Signed-off-by: Gerhard Sittig
---
driver
use devm_get_clk() for automatic put upon device close, check for and
propagate errors when enabling clocks, must prepare clocks before they
can get enabled, unprepare after disable
Signed-off-by: Gerhard Sittig
---
drivers/usb/host/fsl-mph-dr-of.c | 16 +---
1 file changed, 9 inse
use devm_clk_get() for automatic put after device close, check for and
propagate errors when enabling clocks, need to prepare clocks before
they can get enabled, adjust error code paths to correctly balance
get/put and prepare/unprepare and enable/disable calls
Signed-off-by: Gerhard Sittig
---
cleanup the clock API use of the UART driver which is shared among the
MPC512x and the MPC5200 platforms
- get, prepare, and enable the MCLK during port allocation; disable,
unprepare and put the MCLK upon port release; hold a reference to the
clock over the period of use; check for and propaga
cleanup the MPC512x SoC's SPI master's use of the clock API
- get, prepare, and enable the MCLK during probe; disable, unprepare and
put the MCLK upon remove; hold a reference to the clock over the
period of use
- fetch MCLK rate (reference) once during probe and slightly reword BCLK
(bitrate
this series
- fixes several drivers that are used in the MPC512x platform (UART,
SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they
handle clocks (appropriately acquire and setup them, hold references
during use, release clocks after use)
- introduces support for the common
On Mon, 5 Aug 2013 16:14:29 -0700
Peter LaDow wrote:
...
> Perhaps it is a BIOS option ROM like you suggested earlier. The
> 3c90xC reference manual I found
> (http://people.freebsd.org/~wpaul/3Com/3c90xc.pdf) mentions an option
> ROM (and there is an Atmel part stuffed). I can't find any techni
From: Mark Brown
This is another file we can generate so add it to the list.
Signed-off-by: Mark Brown
---
arch/powerpc/boot/.gitignore | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
index c32ae5c..554734f 100644
--- a/arch/power
This is the pseries_defconfig with CONFIG_CPU_LITTLE_ENDIAN enabled
and CONFIG_VIRTUALIZATION disabled (required until we fix some
endian issues in KVM).
Signed-off-by: Anton Blanchard
---
arch/powerpc/configs/pseries_le_defconfig | 347 ++
1 file changed, 347 inserti
Temporarily work around an ICE we are seeing while building
in little endian mode:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57134
Signed-off-by: Anton Blanchard
---
arch/powerpc/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/
POWER7 takes alignment exceptions on some unaligned addresses, so
disable HAVE_EFFICIENT_UNALIGNED_ACCESS. This fixes an early boot
issue in the printk code.
Signed-off-by: Anton Blanchard
---
arch/powerpc/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/K
From: Ian Munsie
This patch allows the kbuild system to successfully compile a kernel for
the little endian PowerPC64 architecture.
To build such a kernel a supported platform must be used and
CONFIG_CPU_LITTLE_ENDIAN must be set. If cross compiling, CROSS_COMPILE
must point to a suitable toolch
We need to distinguish between big endian and little endian
environments, so fix uname to return the right thing.
Signed-off-by: Anton Blanchard
---
arch/powerpc/Makefile | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makef
We need to fix some endian issues in our memcpy code. For now
just enable the generic memcpy routine for little endian builds.
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/string.h | 4
arch/powerpc/kernel/ppc_ksyms.c | 2 ++
arch/powerpc/lib/Makefile | 9 ++---
We need to fix some endian issues in our checksum code. For now
just enable the generic checksum routines for little endian builds.
Signed-off-by: Anton Blanchard
---
arch/powerpc/Kconfig| 3 +++
arch/powerpc/include/asm/checksum.h | 5 +
arch/powerpc/kernel/ppc_ksyms.c |
We want ppc64 to be able to select between optimised assembly
checksum routines in big endian, and the generic lib/checksum.c
routines in little endian.
The lpfc driver is forcing CONFIG_GENERIC_CSUM on which means
we are unable to make the choice of when to enable and disable
it in the arch Kconf
The hypervisor is big endian, so little endian kernel builds need
to byteswap.
Signed-off-by: Anton Blanchard
---
drivers/net/ethernet/ibm/ibmveth.c | 4 ++--
drivers/net/ethernet/ibm/ibmveth.h | 19 ---
2 files changed, 18 insertions(+), 5 deletions(-)
diff --git a/drivers/net
The hypervisor is big endian, so little endian kernel builds need
to byteswap.
Signed-off-by: Anton Blanchard
---
drivers/scsi/ibmvscsi/ibmvscsi.c | 153 ++-
drivers/scsi/ibmvscsi/viosrp.h | 46 ++--
2 files changed, 108 insertions(+), 91 deletions(
Things are complicated by the fact that VSX elements are big
endian ordered even in little endian mode. 8 byte loads and
stores also write to the top 8 bytes of the register.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/align.c | 41 +
1 file cha
The TS_FPR macro selects the FPR component of a VSX register (the
high doubleword). emulate_vsx is using this macro to get the
address of the associated VSX register. This happens to work on big
endian, but fails on little endian.
Replace it with an explicit array access.
Signed-off-by: Anton Bla
Handle most unaligned load and store faults in little
endian mode. Strings, multiples and VSX are not supported.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/align.c | 93 ++---
1 file changed, 63 insertions(+), 30 deletions(-)
diff --git a/arch
The alignment handler assumes big endian ordering when selecting
the low word of a 64bit floating point value. Use the existing
union which works in both little and big endian.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/align.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-
Use swab64/32/16 instead of open coding it.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/align.c | 36
1 file changed, 12 insertions(+), 24 deletions(-)
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 52e5758..573728b 1
Add support for the H_SET_MODE hcall so we can select the
endianness of our exceptions.
We create a guest MSR from scratch when delivering exceptions in
a few places and instead of extracting the LPCR[ILE] and inserting
it into MSR_LE each time simply create a new variable intr_msr which
contains
On little endian builds call H_SET_MODE so exceptions have the
correct endianness. We need a better hook to handle flipping back
into big endian mode on a kexec, but insert it into the mmu
teardown callback for now.
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/hvcall.h
We might need to flip endian when starting secondary threads via
RTAS.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/head_64.S | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 065d10f..2ae41ab 100644
--- a/arch/power
From: Benjamin Herrenschmidt
Create a trampoline that works in either endian and flips to
the expected endian. Use it for primary and secondary thread
entry as well as RTAS and OF call return.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/pp
From: Ian Munsie
This patch will have powerpc include the appropriate generic endianness
header depending on what the compiler reports.
Signed-off-by: Ian Munsie
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/uapi/asm/byteorder.h | 4
1 file changed, 4 insertions(+)
diff --git
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