On Fri, 2014-01-10 at 16:52 -0800, Greg KH wrote:
> > >Signed-off-by: Alistair Popple
> > >Acked-by: Alan Stern
> > >Cc: linux-...@vger.kernel.org
> >
> >Greg, why this patch hasn't been merged? Because it wasn't addressed to
> > you (but BenH)? The other, ehci-platform.c patch didn't even g
On Sat, Jan 11, 2014 at 04:27:53AM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 11/22/2013 05:08 AM, Alistair Popple wrote:
>
> >The IBM Akebono board uses the PPC476GTR SoC which has a OHCI
> >compliant USB host interface. This patch adds support for it to the
> >OHCI platform driver.
>
> >As
Highlights include 32-bit booke relocatable support, e6500 hardware
tablewalk support, various e500 SPE fixes, some new/revived boards, and
e6500 deeper idle and altivec powerdown modes.
The following changes since commit dece8ada993e1764a115bdff0f1eaa5fc8dc:
Merge branch 'merge' into next
Hello.
On 11/22/2013 05:08 AM, Alistair Popple wrote:
The IBM Akebono board uses the PPC476GTR SoC which has a OHCI
compliant USB host interface. This patch adds support for it to the
OHCI platform driver.
As we use device tree to pass platform specific data instead of
platform data we remov
On Friday, December 20, 2013 07:47:22 PM Bartlomiej Zolnierkiewicz wrote:
> Hi,
>
> Some cpuidle drivers assume that cpuidle core will handle cases where
> device->state_count is smaller than driver->state_count, unfortunately
> currently this is untrue (device->state_count is used only for handli
From: Scott Wood
It was branching to the cleanup part of the non-bolted handler,
which would have been bad if there were any chips with tlbsrx.
that use the bolted handler.
Signed-off-by: Scott Wood
---
v2: rebase
arch/powerpc/mm/tlb_low_64e.S | 3 ++-
1 file changed, 2 insertions(+), 1 delet
After reverting 25ebc45b93452d0bc60271f178237123c4b26808
("powerpc/pseries/iommu: remove default window before attempting DDW
manipulation"), we no longer remove the base window in enable_ddw.
Therefore, we no longer need to reset the DMA window state in
find_existing_ddw_windows(). We can instead
Ben rightfully pointed out that there is a race in the "newer" DDW code.
Presuming we are running on recent enough firmware that supports the
"reset" DDW manipulation call, we currently always remove the base
32-bit DMA window in order to maximize the resources for Phyp when
creating the 64-bit win
On Fri, 2014-01-10 at 10:29 +0800, Tang Yuantian wrote:
> +- reg: Offset and length of the clock register set
"offset" into what? The containing node is not within the scope of this
binding.
I know that plenty of other bindings are worded this way, and I wouldn't
hold up acceptance if this were
On Fri, Jan 10, 2014 at 04:52:29PM +, Mark Brown wrote:
> On Fri, Jan 10, 2014 at 11:48:25PM +0800, Nicolin Chen wrote:
>
> > I think I start to understand the point here: If a user only needs to
> > playback
> > the default case - 44.1KHz for example, the driver can just configure all
> > t
On Fri, Jan 10, 2014 at 11:48:25PM +0800, Nicolin Chen wrote:
> I think I start to understand the point here: If a user only needs to playback
> the default case - 44.1KHz for example, the driver can just configure all the
> dividers once at the beginning, not every time, so that we can save furth
On Fri, Jan 10, 2014 at 01:26:42PM +, Mark Brown wrote:
> On Fri, Jan 10, 2014 at 09:03:39PM +0800, Nicolin Chen wrote:
> > On Fri, Jan 10, 2014 at 12:04:39PM +, Mark Brown wrote:
>
> > > This is about what I'd expect but then surely the next step is for the
> > > driver to choose a defual
On Fri, Jan 10, 2014 at 09:03:39PM +0800, Nicolin Chen wrote:
> On Fri, Jan 10, 2014 at 12:04:39PM +, Mark Brown wrote:
> > This is about what I'd expect but then surely the next step is for the
> > driver to choose a defualt BCLK ratio - that's how most drivers work,
> > they try to generate
I just received the 'applied' mail. But still want to confirm this topic to
see how to refine the driver in the step ahead.
On Fri, Jan 10, 2014 at 12:04:39PM +, Mark Brown wrote:
> On Fri, Jan 10, 2014 at 10:35:39AM +0800, Nicolin Chen wrote:
>
> > Resent this because of losing attached file
On Fri, Jan 10, 2014 at 05:54:06PM +0800, Nicolin Chen wrote:
> This patch implements a device-tree-only CPU DAI driver for Freescale ESAI
> controller that supports:
Applied, thanks.
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On Fri, Jan 10, 2014 at 10:35:39AM +0800, Nicolin Chen wrote:
> Resent this because of losing attached file.
I don't think your previous mail got sent at all, or at least it must've
been caught by spam filters here...
> On Fri, Jan 10, 2014 at 10:32:52AM +0800, Nicolin Chen wrote:
> > On Thu, Ja
This patch implements a device-tree-only CPU DAI driver for Freescale ESAI
controller that supports:
- 12 channels playback and 8 channels record.
[ Some of the inner transmitters and receivers are sharing same group of
pins. So the maxmium 12 output or 8 input channels are only valid if
Hi Tony,
FYI, kernel build failed on
tree: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 7d1c153ab373a5c07feb97eaf4e4bcad5bfc262e
commit: b81f18e55e9f4ea81759bcb00fea295de679bbe8 powerpc/boot: Only build board
support files when required.
date: 1 year, 6 mo
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