[PATCH v2] gpio: ge: Convert to platform driver

2014-04-11 Thread Alexander Shiyan
This patch converts GE I/O FPGA GPIO driver to platform driver. Signed-off-by: Alexander Shiyan --- drivers/gpio/gpio-ge.c | 174 +++-- 1 file changed, 53 insertions(+), 121 deletions(-) diff --git a/drivers/gpio/gpio-ge.c b/drivers/gpio/gpio-ge.c ind

Re: [PATCH v3] dmaengine: driver support for FSL RaidEngine device.

2014-04-11 Thread Dan Williams
On Fri, Apr 11, 2014 at 10:42 AM, Dan Williams wrote: > A few more comments: > > On Fri, Apr 11, 2014 at 12:41 AM, wrote: >> From: Xuelin Shi >> >> The RaidEngine is a new FSL hardware used for Raid5/6 acceration. >> >> This patch enables the RaidEngine functionality and provides >> hardware of

Re: [PATCH v3] dmaengine: driver support for FSL RaidEngine device.

2014-04-11 Thread Dan Williams
A few more comments: On Fri, Apr 11, 2014 at 12:41 AM, wrote: > From: Xuelin Shi > > The RaidEngine is a new FSL hardware used for Raid5/6 acceration. > > This patch enables the RaidEngine functionality and provides > hardware offloading capability for memcpy, xor and pq computation. > It works

[PATCH] ASoC: fsl_sai: Fix incorrect condition check in trigger()

2014-04-11 Thread Nicolin Chen
Patch ASoC: fsl_sai: Fix buggy configurations in trigger() doesn't entirely fix the condition: FRDE of the current substream direction is being cleared while the code is still using the non-updated one. Thus this patch fixes this issue by checking the opposite one's FRDE alone since the current on

Re: [PATCH v3] powerpc: kvm: make _PAGE_NUMA take effect

2014-04-11 Thread Alexander Graf
On 11.04.2014, at 13:45, Liu Ping Fan wrote: > When we mark pte with _PAGE_NUMA we already call > mmu_notifier_invalidate_range_start > and mmu_notifier_invalidate_range_end, which will mark existing guest hpte > entry as HPTE_V_ABSENT. Now we need to do that when we are inserting new > guest h

[PATCH v3] powerpc: kvm: make _PAGE_NUMA take effect

2014-04-11 Thread Liu Ping Fan
When we mark pte with _PAGE_NUMA we already call mmu_notifier_invalidate_range_start and mmu_notifier_invalidate_range_end, which will mark existing guest hpte entry as HPTE_V_ABSENT. Now we need to do that when we are inserting new guest hpte entries. Signed-off-by: Liu Ping Fan Reviewed-by: An

[PATCH 3/3] ppc/kvm: Clear the runlatch bit of a vcpu before napping

2014-04-11 Thread Preeti U Murthy
When the guest cedes the vcpu or the vcpu has no guest to run it naps. Clear the runlatch bit of the vcpu before napping to indicate an idle cpu. Signed-off-by: Preeti U Murthy Acked-by: Paul Mackerras Reviewed-by: Srivatsa S. Bhat --- arch/powerpc/kvm/book3s_hv_rmhandlers.S | 12 ++

[PATCH 2/3] ppc/kvm: Set the runlatch bit of a CPU just before starting guest

2014-04-11 Thread Preeti U Murthy
The secondary threads in the core are kept offline before launching guests in kvm on powerpc: "371fefd6f2dc4666:KVM: PPC: Allow book3s_hv guests to use SMT processor modes." Hence their runlatch bits are cleared. When the secondary threads are called in to start a guest, their runlatch bits need t

[PATCH 1/3] ppc/powernv: Set the runlatch bits correctly for offline cpus

2014-04-11 Thread Preeti U Murthy
Up until now we have been setting the runlatch bits for a busy CPU and clearing it when a CPU enters idle state. The runlatch bit has thus been consistent with the utilization of a CPU as long as the CPU is online. However when a CPU is hotplugged out the runlatch bit is not cleared. It needs to b

[PATCH 0/3] ppc:Set runlatch bits correctly for offline threads and vcpus

2014-04-11 Thread Preeti U Murthy
The runlatch bits with their value indicated by CTRL_RUNLATCH are set and cleared in the SPRN_CTRL registers to indicate a busy and idle cpu respectively. This is currently being done in the cpuidle path of the host. But needs to be taken care of in hotplug and kvm scenarios. This patchset is aimed

[PATCH] ASoC: fsl_sai: Use FSL_SAI_xXR() and regmap_update_bits() to simplify code

2014-04-11 Thread Nicolin Chen
By doing this, the driver can drop around 50 lines and become neater. Signed-off-by: Nicolin Chen --- sound/soc/fsl/fsl_sai.c | 101 1 file changed, 25 insertions(+), 76 deletions(-) diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c

[PATCH 0/3] ppc:Set runlatch bits correctly for offline threads and vcpus

2014-04-11 Thread Preeti U Murthy
The runlatch bits with their value indicated by CTRL_RUNLATCH are set and cleared in the SPRN_CTRL registers to indicate a busy and idle cpu respectively. This is currently being done in the cpuidle path of the host. But needs to be taken care of in hotplug and kvm scenarios. This patchset is aimed

Re: [PATCH v3 6/8] DMA: Freescale: change descriptor release process for supporting async_tx

2014-04-11 Thread Hongbo Zhang
On 04/11/2014 04:00 PM, Hongbo Zhang wrote: On 04/10/2014 07:56 PM, Andy Shevchenko wrote: On Thu, 2014-04-10 at 15:10 +0800, hongbo.zh...@freescale.com wrote: From: Hongbo Zhang Fix the potential risk when enable config NET_DMA and ASYNC_TX. Async_tx is lack of support in current release

RE: [PATCH v2] fix wrong usage of dmaengine_unmap_put in async_xxx

2014-04-11 Thread Xuelin Shi
Hi Dan, With https://patchwork.kernel.org/patch/3863711/ applied, the issue disappeared. Thanks, Xuelin Shi -Original Message- From: dan.j.willi...@gmail.com [mailto:dan.j.willi...@gmail.com] On Behalf Of Dan Williams Sent: 2014年4月10日 12:02 To: Shi Xuelin-B29237 Cc: Koul, Vinod; dmaeng.

[PATCH v3] dmaengine: driver support for FSL RaidEngine device.

2014-04-11 Thread xuelin.shi
From: Xuelin Shi The RaidEngine is a new FSL hardware used for Raid5/6 acceration. This patch enables the RaidEngine functionality and provides hardware offloading capability for memcpy, xor and pq computation. It works with async_tx. Signed-off-by: Harninder Rai Signed-off-by: Naveen Burmi S

Re: [PATCH v3 4/8] DMA: Freescale: add fsl_dma_free_descriptor() to reduce code duplication

2014-04-11 Thread Hongbo Zhang
On 04/10/2014 07:29 PM, Andy Shevchenko wrote: On Thu, 2014-04-10 at 15:10 +0800, hongbo.zh...@freescale.com wrote: From: Hongbo Zhang There are several places where descriptors are freed using identical code. This patch puts this code into a function to reduce code duplication. Signed-off-b

Re: [PATCH v3 6/8] DMA: Freescale: change descriptor release process for supporting async_tx

2014-04-11 Thread Hongbo Zhang
On 04/10/2014 07:56 PM, Andy Shevchenko wrote: On Thu, 2014-04-10 at 15:10 +0800, hongbo.zh...@freescale.com wrote: From: Hongbo Zhang Fix the potential risk when enable config NET_DMA and ASYNC_TX. Async_tx is lack of support in current release process of dma descriptor, all descriptors will

Re: [PATCH v3 8/8] DMA: Freescale: add suspend resume functions for DMA driver

2014-04-11 Thread Hongbo Zhang
On 04/10/2014 08:05 PM, Andy Shevchenko wrote: On Thu, 2014-04-10 at 15:10 +0800, hongbo.zh...@freescale.com wrote: From: Hongbo Zhang This patch adds suspend resume functions for Freescale DMA driver. .prepare callback is used to stop further descriptors from being added into the pending que