> -Original Message-
> From: Wood Scott-B07421
> Sent: Wednesday, August 27, 2014 4:23 AM
> To: Mehresh Ramneek-B31383
> Cc: Badola Nikhil-B46172; linuxppc-dev@lists.ozlabs.org;
> devicet...@vger.kernel.org
> Subject: Re: [PATCH] Documentation: dts: fsl-usb: Document USB node
> compatible
Aravinda Prasad writes:
> This patch adds a private HCALL to inform qemu the updated
> rtas-base and rtas-entry address when OS invokes the call
> "instantiate-rtas". This is required as qemu allocates the
> error reporting structure in RTAS space upon a machine check
> exception and hence needs
>-Original Message-
>From: Wood Scott-B07421
>Sent: Wednesday, August 27, 2014 6:51 AM
>To: Lu Jingchang-B35083
>Cc: mturque...@linaro.org; linuxppc-dev@lists.ozlabs.org; linux-
>ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org
>Subject: Re: [RESEND] clk: ppc-corenet: Add Freesc
On 二, 2014-08-26 at 08:10 -0500, Nathan Fontenot wrote:
> On 08/25/2014 02:22 AM, Li Zhong wrote:
> > With commit 2fabf084b, during boottime, cpu_numa_callback() is called
> > earlier(before their online) for each cpu, and verify_cpu_node_mapping()
> > uses cpu_to_node() to check whether siblings a
On Tue, Aug 26, 2014 at 05:33:28PM -0700, Geoff Levand wrote:
> Hi Vivek,
>
> On Mon, 2014-08-25 at 12:59 -0400, Vivek Goyal wrote:
> > Does arm64 has secureboot? If yes, then it might make sense to
> > enable the new syscall kexec_file_load() on arm64 instead of trying
> > to make old syscall wor
Hi Vivek,
On Mon, 2014-08-25 at 12:59 -0400, Vivek Goyal wrote:
> Does arm64 has secureboot? If yes, then it might make sense to
> enable the new syscall kexec_file_load() on arm64 instead of trying
> to make old syscall work first.
Yes, arm64 should support secureboot, but I have not looked into
On Fri, 2014-08-22 at 00:05 -0500, Mehresh Ramneek-B31383 wrote:
>
> -Original Message-
> From: Badola Nikhil-B46172
> Sent: Friday, August 22, 2014 10:18 AM
> To: Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org; Mehresh
> Ramneek-B31383
> Subject: RE: [
On Fri, 2014-08-22 at 17:34 +0800, Jingchang Lu wrote:
> Signed-off-by: Jingchang Lu
> ---
> drivers/clk/Kconfig | 7 ---
> drivers/clk/clk-ppc-corenet.c | 5 +
> 2 files changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index
On Tue, 2014-08-26 at 16:34 -0500, Aaron Sierra wrote:
> > > +static inline u32 fsl_ifc_version(struct fsl_ifc_regs *regs) {
> > > + return ioread32be(®s->ifc_rev) & FSL_IFC_VERSION_MASK;
> > > +}
> > > +
> > > +static inline int fsl_ifc_bank_count(struct fsl_ifc_regs *regs) {
> > > + return (fsl_i
The following commit prevents the MPC8548E on the XPedite5200 PrPMC
module from enumerating its PCI/PCI-X bus:
powerpc/fsl-pci: use 'Header Type' to identify PCIE mode
The previous patch prevents any Freescale PCI-X bridge from enumerating
the bus, if it is hardware strapped into Agent mode.
- Original Message -
> From: "Scott Wood"
> Sent: Tuesday, August 26, 2014 3:48:51 PM
>
> On Tue, 2014-08-26 at 12:31 -0500, Aaron Sierra wrote:
> > Freescale's QorIQ T Series processors support 8 IFC chip selects
> > within a memory map backward compatible with previous P Series
> > proc
- Original Message -
> From: "Scott Wood"
> Sent: Tuesday, August 26, 2014 3:52:56 PM
>
> On Mon, 2014-08-25 at 18:54 -0500, Aaron Sierra wrote:
> > The following commit prevents the MPC8548E on the XPedite5200 PrPMC
> > module from enumerating its PCI/PCI-X bus:
> >
> > powerpc/fsl-
On Mon, 2014-08-25 at 18:54 -0500, Aaron Sierra wrote:
> The following commit prevents the MPC8548E on the XPedite5200 PrPMC
> module from enumerating its PCI/PCI-X bus:
>
> powerpc/fsl-pci: use 'Header Type' to identify PCIE mode
>
> The previous patch prevents any Freescale PCI-X bridge fro
On Tue, 2014-08-26 at 12:31 -0500, Aaron Sierra wrote:
> Freescale's QorIQ T Series processors support 8 IFC chip selects
> within a memory map backward compatible with previous P Series
> processors which supported only 4 chip selects.
>
> Signed-off-by: Aaron Sierra
> ---
> drivers/memory/fsl_
Freescale's QorIQ T Series processors support 8 IFC chip selects
within a memory map backward compatible with previous P Series
processors which supported only 4 chip selects.
Signed-off-by: Aaron Sierra
---
drivers/memory/fsl_ifc.c| 2 +-
drivers/mtd/nand/fsl_ifc_nand.c | 17 ++
Hi Nathan,
On 26.08.2014 [08:10:14 -0500], Nathan Fontenot wrote:
> On 08/25/2014 02:22 AM, Li Zhong wrote:
> > With commit 2fabf084b, during boottime, cpu_numa_callback() is called
> > earlier(before their online) for each cpu, and verify_cpu_node_mapping()
> > uses cpu_to_node() to check whether
On 08/25/2014 02:22 AM, Li Zhong wrote:
> With commit 2fabf084b, during boottime, cpu_numa_callback() is called
> earlier(before their online) for each cpu, and verify_cpu_node_mapping()
> uses cpu_to_node() to check whether siblings are in the same node.
>
> It skips the checking for siblings th
From: Mike Qiu
The patch synchronizes firmware header file (opal.h) for PCI error
injection.
Signed-off-by: Mike Qiu
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/opal.h| 30 ++
arch/powerpc/platforms/powernv/opal-wrappers.S | 1 +
2 files cha
The frozen state on one specific PE is probably caused by error
injection, which is done with help of PAPR error injection registers.
According to the hardware spec, those registers should be cleared
automatically after one-shot frozen PE. However, that's not always
true, at least on P7IOC of Fireb
From: Mike Qiu
The patch adds debugfs file (/sys/kernel/debug/powerpc/PCI/
err_injct), which accepts following formated string, to support
error injection. It will be used to support userland utility
"errinjct" in future.
"pe_no:0:function:address:mask" - 32-bits PCI errors
"pe_no:1:func
Previously, we inject PCI errors through various debugfs entries in
/sys/kernel/debug/powerpc/PCI/. Unfortunately, the PCI errors
are injected with PHB granularity. It's hard to injection errors to
specified PE. The series of patches adds one more debugfs entry, which
allows to inject errors to
From: Mike Qiu
The patch introduces eeh_ops::err_inject(), which allows to inject
specified errors to indicated PE for testing purpose. The functionality
isn't support on pSeries platform. On PowerNV, the functionality
relies on OPAL API opal_pci_err_inject().
Signed-off-by: Mike Qiu
Signed-off
On 08/25/14 at 12:59pm, Vivek Goyal wrote:
> On Fri, Aug 22, 2014 at 06:39:47PM +, Geoff Levand wrote:
> > Hi,
> >
> > Here are a few minor fixups and enhancements for kexec support.
> >
> > Patch 3 and 4 that add preprocessor macros for the kimage list flags are
> > ones that I use in the a
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