SLOF currently calls hv-logical-load and hv-logical-store for every pixel
when enabling or disabling the cursor. This is suboptimal when writing one
char at a time to the console since terminal-write always toggles the cursor.
And this is precisely what grub is doing when the user wants to edit a
In 64 bit kernels, the Fixed Point Exception Register (XER) is a 64
bit field (e.g. in kvm_regs and kvm_vcpu_arch) and in most places it is
accessed as such.
This patch corrects places where it is accessed as a 32 bit field by a
64 bit kernel. In some cases this is via a 32 bit load or store
On Thu, Apr 30, 2015 at 09:29:22AM +0300, Igal.Liberman wrote:
From: Igal Liberman igal.liber...@freescale.com
Describe the PHY topology for all configurations supported by each board
Based on prior work by Andy Fleming aflem...@freescale.com
Signed-off-by: Igal Liberman
On Tue, May 26, 2015 at 10:35:08AM +0200, Alexander Graf wrote:
On 26.05.15 02:27, Sam Bobroff wrote:
In 64 bit kernels, the Fixed Point Exception Register (XER) is a 64
bit field (e.g. in kvm_regs and kvm_vcpu_arch) and in most places it is
accessed as such.
This patch corrects
Greg Kurz gk...@linux.vnet.ibm.com writes:
SLOF currently calls hv-logical-load and hv-logical-store for every pixel
when enabling or disabling the cursor. This is suboptimal when writing one
char at a time to the console since terminal-write always toggles the cursor.
And this is precisely
Hi Scott,
Eduardo indicated that calibration property should add fsl prefix.
I updated the patch.
Any other comments?
If not I will send V3 soon.
Thanks.
---
Best Regards,
Hongtao
-Original Message-
From: Jia Hongtao [mailto:hongtao@freescale.com]
Sent: Wednesday, April 15,
Hi,
I applied this patch (check if DEQ was already instantiated) on top of
sound: ppc: keywest: drop using attach adapter and sound works great.
Everything works as expected. Below is my dmesg output.
Regards,
Dan
On Sat, 5/23/15, Wolfram Sang w...@the-dreams.de wrote:
Due to changes in
On 26.05.15 02:27, Sam Bobroff wrote:
In 64 bit kernels, the Fixed Point Exception Register (XER) is a 64
bit field (e.g. in kvm_regs and kvm_vcpu_arch) and in most places it is
accessed as such.
This patch corrects places where it is accessed as a 32 bit field by a
64 bit kernel. In
Since commit 100832abf065bc18 (usb: isp1760: Make HCD support
optional), CONFIG_USB_ISP1760_HCD is automatically selected when
needed. Enabling that option in the defconfig is now a no-op, and no
longer enables ISP1760 HCD support.
Re-enable the ISP1760 driver in the defconfig by enabling
On Thu, May 21, 2015 at 2:13 PM, Suman Tripathi stripa...@apm.com wrote:
The sdhci framework disables SDR104/SDR50/DDR50 based on only quirk.
This patch adds the support to disable SDR104/SDR50/DDR50 based on
reading the capability register 0.
Signed-off-by: Suman Tripathi stripa...@apm.com
On Mon, May 25, 2015 at 08:24:25AM -0700, Nicolin Chen wrote:
On Mon, May 25, 2015 at 12:13:45PM -0300, Fabio Estevam wrote:
Hi Nicolin,
On Mon, May 25, 2015 at 12:11 PM, Nicolin Chen nicoleots...@gmail.com
wrote:
Hi Mark,
Is that possible for you to provisionally revert
On 05/26/2015 08:10 AM, Anton Blanchard wrote:
When we take a PMU exception or a software event we call
perf_read_regs(). This overloads regs-result with a boolean that
describes if we should use the sampled instruction address register
(SIAR) or the regs.
If the exception is in kernel, we
Hi ,
On Thu, May 21, 2015 at 2:13 PM, Suman Tripathi stripa...@apm.com wrote:
This patch adds the arasan mmc nodes to reuse the of-arasan
driver for APM X-Gene SoC.
Signed-off-by: Suman Tripathi stripa...@apm.com
---
---
arch/arm64/boot/dts/apm/apm-mustang.dts | 4 +++
On 21 May 2015 at 10:43, Suman Tripathi stripa...@apm.com wrote:
The sdhci framework disables SDR104/SDR50/DDR50 based on only quirk.
This patch adds the support to disable SDR104/SDR50/DDR50 based on
reading the capability register 0.
Signed-off-by: Suman Tripathi stripa...@apm.com
---
---
Hi Laurentiu,
+ if ((TRAP(regs) == 0xf00) regs-result)
+ return true;
+
+ return false;
Why not just
return (TRAP(regs) == 0xf00) regs-result;
Could do, it just read a little easier to my tired eyes.
Anton
___
From: Scott Wood ...
I'd also have thought that the 64bit C version above would be generally
'good'.
It doesn't generate the addc/addze sequence. At least with GCC 4.8.2,
it does something like:
mr tmp0, csum
li tmp1, 0
li tmp2, 0
addc
On Wed, May 20, 2015 at 11:03:25AM +0200, Torsten Duwe wrote:
On Tue, May 19, 2015 at 01:27:07PM +1000, Michael Ellerman wrote:
On Mon, 2015-05-18 at 14:29 +0200, Jiri Kosina wrote:
ftrace already handles recursion protection by itself (depending on the
per-ftrace-ops
On Tue, 2015-05-26 at 01:33 -0500, Jia Hongtao-B38951 wrote:
Hi Scott,
Eduardo indicated that calibration property should add fsl
prefix.
I updated the patch.
Any other comments?
If not I will send V3 soon.
Thanks.
I'd go with fsl,tmu-calibration rather than fsl,calibration but
not a
On Tue, 2015-05-26 at 13:57 +, David Laight wrote:
From: Scott Wood ...
I'd also have thought that the 64bit C version above would be
generally 'good'.
It doesn't generate the addc/addze sequence. At least with GCC
4.8.2,
it does something like:
mr tmp0, csum
On Tue, 2015-05-26 at 15:10 +1000, Anton Blanchard wrote:
When we take a PMU exception or a software event we call
perf_read_regs(). This overloads regs-result with a boolean that
describes if we should use the sampled instruction address register
(SIAR) or the regs.
If the exception is in
On Tue, May 26, 2015 at 07:02:48PM +0800, Zidan Wang wrote:
On Mon, May 25, 2015 at 08:24:25AM -0700, Nicolin Chen wrote:
On Mon, May 25, 2015 at 12:13:45PM -0300, Fabio Estevam wrote:
Hi Nicolin,
On Mon, May 25, 2015 at 12:11 PM, Nicolin Chen nicoleots...@gmail.com
wrote:
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