Re: [PATCH v2] powerpc/mm: export current mmu mode info

2016-09-22 Thread Hari Bathini
On Friday 23 September 2016 10:14 AM, Aneesh Kumar K.V wrote: Hari Bathini writes: Hi Aneesh, On Thursday 22 September 2016 09:54 PM, Aneesh Kumar K.V wrote: Hari Bathini writes: The kernel now supports both radix and hash MMU modes. Tools like crash and makedumpfile need to know the c

[PATCH v5 17/20] selftests/powerpc: Add checks for transactional VSXs in signal contexts

2016-09-22 Thread Cyril Bur
If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur --- tools/testi

[PATCH v5 13/20] selftests/powerpc: Check that signals always get delivered

2016-09-22 Thread Cyril Bur
Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/Makefile | 1 + tools/testing/selftests/powerpc/signal/Makefile| 12 +++ tools/testing/selftests/powerpc/signal/signal.S| 50 ++ tools/testing/selftests/powerpc/signal/signal.c| 111

[PATCH v5 12/20] selftests/powerpc: Add TM tcheck helpers in C

2016-09-22 Thread Cyril Bur
Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/tm/tm.h | 27 +++ 1 file changed, 27 insertions(+) diff --git a/tools/testing/selftests/powerpc/tm/tm.h b/tools/testing/selftests/powerpc/tm/tm.h index 60318ba..2c8da74 100644 --- a/tools/testing/selftests/powe

[PATCH v5 02/20] powerpc: Always restore FPU/VEC/VSX if hardware transactional memory in use

2016-09-22 Thread Cyril Bur
Comment from arch/powerpc/kernel/process.c:967: If userspace is inside a transaction (whether active or suspended) and FP/VMX/VSX instructions have ever been enabled inside that transaction, then we have to keep them enabled and keep the FP/VMX/VSX state loaded while ever the transaction conti

[PATCH v5 01/20] selftests/powerpc: Compile selftests against headers without AT_HWCAP2

2016-09-22 Thread Cyril Bur
It might be nice to compile selftests against older kernels and headers but which may not have HWCAP2. Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/utils.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/tools/testing/selftests/powerpc/utils.h b/tools/testing/selftest

[PATCH v5 03/20] powerpc: Add check_if_tm_restore_required() to giveup_all()

2016-09-22 Thread Cyril Bur
giveup_all() causes FPU/VMX/VSX facilities to be disabled in a threads MSR. If the thread performing the giveup was transactional, the kernel must record which facilities were in use before the giveup as the thread must have these facilities re-enabled on return to userspace. >From process.c: /*

[PATCH v5 10/20] selftests/powerpc: Introduce GPR asm helper header file

2016-09-22 Thread Cyril Bur
Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/gpr_asm.h | 96 +++ 1 file changed, 96 insertions(+) create mode 100644 tools/testing/selftests/powerpc/gpr_asm.h diff --git a/tools/testing/selftests/powerpc/gpr_asm.h b/tools/testing/selftests/powerpc/gp

[PATCH v5 06/20] powerpc: signals: Stop using current in signal code

2016-09-22 Thread Cyril Bur
Much of the signal code takes a pt_regs on which it operates. Over time the signal code has needed to know more about the thread than what pt_regs can supply, this information is obtained as needed by using 'current'. This approach is not strictly incorrect however it does mean that there is now a

[PATCH v5 04/20] powerpc: Return the new MSR from msr_check_and_set()

2016-09-22 Thread Cyril Bur
msr_check_and_set() always performs a mfmsr() to determine if it needs to perform an mtmsr(), as mfmsr() can be a costly operation msr_check_and_set() could return the MSR now on the CPU to avoid callers of msr_check_and_set having to make their own mfmsr() call. Signed-off-by: Cyril Bur --- arc

[PATCH v5 00/20] Consistent TM structures

2016-09-22 Thread Cyril Bur
v5: Rebased on powerpc-next to solve conflict with commit e1c0d66fcb179a1737b3d5cc11c6e37bcabbd861 Author: Simon Guo Date: Tue Jul 26 16:06:01 2016 +0800 powerpc: Set used_(vsr|vr|spe) in sigreturn path when MSR bits are active v4: Address review from Mikey, comment and commit me

[PATCH v5 20/20] powerpc: Remove do_load_up_transact_{fpu,altivec}

2016-09-22 Thread Cyril Bur
Previous rework of TM code leaves these functions unused Signed-off-by: Cyril Bur --- arch/powerpc/include/asm/tm.h | 5 - arch/powerpc/kernel/fpu.S | 26 -- arch/powerpc/kernel/vector.S | 25 - 3 files changed, 56 deletions(-) diff --gi

[PATCH v5 11/20] selftests/powerpc: Allow tests to extend their kill timeout

2016-09-22 Thread Cyril Bur
Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/harness.c | 9 +++-- tools/testing/selftests/powerpc/utils.h | 2 +- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/tools/testing/selftests/powerpc/harness.c b/tools/testing/selftests/powerpc/harness.c index 52f9b

[PATCH v5 19/20] powerpc: tm: Rename transct_(*) to ck(\1)_state

2016-09-22 Thread Cyril Bur
Make the structures being used for checkpointed state named consistently with the pt_regs/ckpt_regs. Signed-off-by: Cyril Bur --- arch/powerpc/include/asm/processor.h | 8 ++--- arch/powerpc/kernel/asm-offsets.c| 12 arch/powerpc/kernel/fpu.S| 2 +- arch/powerpc/kernel

[PATCH v5 18/20] powerpc: tm: Always use fp_state and vr_state to store live registers

2016-09-22 Thread Cyril Bur
There is currently an inconsistency as to how the entire CPU register state is saved and restored when a thread uses transactional memory (TM). Using transactional memory results in the CPU having duplicated (almost) all of its register state. This duplication results in a set of registers which c

[PATCH v5 14/20] selftests/powerpc: Add checks for transactional GPRs in signal contexts

2016-09-22 Thread Cyril Bur
If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur --- tools/testi

[PATCH v5 05/20] powerpc: Never giveup a reclaimed thread when enabling kernel {fp, altivec, vsx}

2016-09-22 Thread Cyril Bur
After a thread is reclaimed from its active or suspended transactional state the checkpointed state exists on CPU, this state (along with the live/transactional state) has been saved in its entirety by the reclaiming process. There exists a sequence of events that would cause the kernel to call on

[PATCH v5 09/20] selftests/powerpc: Move VMX stack frame macros to header file

2016-09-22 Thread Cyril Bur
Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/math/vmx_asm.S | 85 +- tools/testing/selftests/powerpc/vmx_asm.h | 98 ++ 2 files changed, 99 insertions(+), 84 deletions(-) create mode 100644 tools/testing/selftests/powerpc/vmx_asm.h

[PATCH v5 07/20] selftests/powerpc: Check for VSX preservation across userspace preemption

2016-09-22 Thread Cyril Bur
Ensure the kernel correctly switches VSX registers correctly. VSX registers are all volatile, and despite the kernel preserving VSX across syscalls, it doesn't have to. Test that during interrupts and timeslices ending the VSX regs remain the same. Signed-off-by: Cyril Bur --- tools/testing/self

[PATCH v5 15/20] selftests/powerpc: Add checks for transactional FPUs in signal contexts

2016-09-22 Thread Cyril Bur
If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur --- tools/testi

[PATCH v5 16/20] selftests/powerpc: Add checks for transactional VMXs in signal contexts

2016-09-22 Thread Cyril Bur
If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur --- tools/testi

[PATCH v5 08/20] selftests/powerpc: Rework FPU stack placement macros and move to header file

2016-09-22 Thread Cyril Bur
The FPU regs are placed at the top of the stack frame. Currently the position expected to be passed to the macro. The macros now should be passed the stack frame size and from there they can calculate where to put the regs, this makes the use simpler. Also move them to a header file to be used in

Re: [PATCH kernel] powerpc: Bump minimum zone order for 4K system page size

2016-09-22 Thread Balbir Singh
On 23/09/16 14:51, Alexey Kardashevskiy wrote: > The moderm kernel on powernv platform cannot possibly boot with values > less than 12 as the default DMA window of 2GB requires > (2<<30)/4096 TCEs which is 4MB of contiguous memory, log2(4M) == 22 > so anything less than 12 won't work. > > Signed

[PATCH kernel] powerpc: Bump minimum zone order for 4K system page size

2016-09-22 Thread Alexey Kardashevskiy
The moderm kernel on powernv platform cannot possibly boot with values less than 12 as the default DMA window of 2GB requires (2<<30)/4096 TCEs which is 4MB of contiguous memory, log2(4M) == 22 so anything less than 12 won't work. Signed-off-by: Alexey Kardashevskiy --- I am hitting this when sw

Re: [PATCH v2] powerpc/mm: export current mmu mode info

2016-09-22 Thread Aneesh Kumar K.V
Hari Bathini writes: > Hi Aneesh, > > > On Thursday 22 September 2016 09:54 PM, Aneesh Kumar K.V wrote: >> Hari Bathini writes: >> >>> The kernel now supports both radix and hash MMU modes. Tools like crash >>> and makedumpfile need to know the current MMU mode the kernel is using, >>> to debug/

Re: [PATCH] Work around for enabling CONFIG_CMDLINE on ppc64le

2016-09-22 Thread Akshay Adiga
Hi Michael, Anton found this bug and raised it against gcc v7.0 and a fix is available in upstream gcc. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71709 Currently, gcc v5.4.0 and v6.1.1 shipped with Ubuntu 16.04 and 16.10 respectively, are hitting this problem. I have also raise

[PATCH v6 2/2] QE: remove PPCisms for QE

2016-09-22 Thread Zhao Qiang
QE was supported on PowerPC, and dependent on PPC, Now it is supported on other platforms. so remove PPCisms. Signed-off-by: Zhao Qiang --- Changes for v2: - na Changes for v3: - add NO_IRQ Changes for v4: - modify spin_event_timeout to opencoded timeout loop - rem

[PATCH v6 1/2] qe: modify get_qe_base function

2016-09-22 Thread Zhao Qiang
modify get_qe_base function with of_address_to_resource instead of of_get_property and of_translate_address. Signed-off-by: Zhao Qiang --- Changes for v2: - na Changes for v3: - na Changes for v4: - na Changes for v5: - na Changes for v6: - na drivers/soc

RE: [PATCH v5 2/2] QE: remove PPCisms for QE

2016-09-22 Thread Qiang Zhao
On Fri, Sep 23, 2016 at 3:39 AM, Leo Li wrote: > -Original Message- > From: Leo Li [mailto:pku@gmail.com] > Sent: Friday, September 23, 2016 3:39 AM > To: Qiang Zhao > Cc: Scott Wood ; linuxppc-dev d...@lists.ozlabs.org>; lkml ; X.B. Xie > > Subject: Re: [PATCH v5 2/2] QE: remove PP

Re: [PATCH v5 2/2] QE: remove PPCisms for QE

2016-09-22 Thread Leo Li
On Wed, Sep 21, 2016 at 8:43 PM, Qiang Zhao wrote: > On Mon, Sep 22, 2016 at 2:19 AM, Leo Li wrote: >> -Original Message- >> From: Leo Li [mailto:pku@gmail.com] >> Sent: Thursday, September 22, 2016 2:19 AM >> To: Qiang Zhao >> Cc: Scott Wood ; linuxppc-dev > d...@lists.ozlabs.org>; l

Re: [PATCH v2] powerpc/mm: export current mmu mode info

2016-09-22 Thread Hari Bathini
Hi Aneesh, On Thursday 22 September 2016 09:54 PM, Aneesh Kumar K.V wrote: Hari Bathini writes: The kernel now supports both radix and hash MMU modes. Tools like crash and makedumpfile need to know the current MMU mode the kernel is using, to debug/analyze it. The current MMU mode depends o

Re: [PATCH v21 00/20] perf, tools: Add support for PMU events in JSON format

2016-09-22 Thread Jiri Olsa
On Thu, Sep 22, 2016 at 05:00:22PM +0200, Jiri Olsa wrote: > On Mon, Sep 19, 2016 at 09:28:20PM -0300, Arnaldo Carvalho de Melo wrote: > > Em Mon, Sep 19, 2016 at 09:02:58PM -0300, Arnaldo Carvalho de Melo escreveu: > > > Em Mon, Sep 19, 2016 at 08:37:53PM -0300, Arnaldo Carvalho de Melo > > > esc

Re: [PATCH v2] powerpc/mm: export current mmu mode info

2016-09-22 Thread Aneesh Kumar K.V
Hari Bathini writes: > The kernel now supports both radix and hash MMU modes. Tools like crash > and makedumpfile need to know the current MMU mode the kernel is using, > to debug/analyze it. The current MMU mode depends on hardware support > and also whether disable_radix cmdline parameter is p

[RESEND PATCH v2] powerpc/mm: export current mmu mode info

2016-09-22 Thread Hari Bathini
The kernel now supports both radix and hash MMU modes. Tools like crash and makedumpfile need to know the current MMU mode the kernel is using, to debug/analyze it. The current MMU mode depends on hardware support and also whether disable_radix cmdline parameter is passed to the kernel. The mmu_fe

Re: [PATCH v2] powerpc/mm: export current mmu mode info

2016-09-22 Thread Hari Bathini
On Thursday 22 September 2016 09:32 PM, Hari Bathini wrote: The kernel now supports both radix and hash MMU modes. Tools like crash and makedumpfile need to know the current MMU mode the kernel is using, to debug/analyze it. The current MMU mode depends on hardware support and also whether dis

Re: [PATCH] percpu: improve generic percpu modify-return implementation

2016-09-22 Thread Tejun Heo
Hello, On Thu, Sep 22, 2016 at 02:35:00PM +1000, Nicholas Piggin wrote: > Well thank you, how about you? Heh, can't complain. Hope to see you around sometime. It's been forever. > Trying a new mail client, sorry. It *seems* to be working now, how's > this? Hmm... Still encoded. > From d0cb90

[RFC PATCH] powerpc/mm: THP page cache support

2016-09-22 Thread Aneesh Kumar K.V
Update arch hook in the generic THP page cache code, that will deposit and withdarw preallocated page table. Archs like ppc64 use this preallocated table to store the hash pte slot information. This is an RFC patch and I am sharing this early to get feedback on the approach taken. I have used stre

[PATCH v2] powerpc/mm: export current mmu mode info

2016-09-22 Thread Hari Bathini
The kernel now supports both radix and hash MMU modes. Tools like crash and makedumpfile need to know the current MMU mode the kernel is using, to debug/analyze it. The current MMU mode depends on hardware support and also whether disable_radix cmdline parameter is passed to the kernel. The mmu_fe

Re: [PATCH v7 4/6] powerpc: lib/locks.c: Add cpu yield/wake helper function

2016-09-22 Thread Boqun Feng
Hi Xinhui, On Mon, Sep 19, 2016 at 05:23:55AM -0400, Pan Xinhui wrote: > Add two corresponding helper functions to support pv-qspinlock. > > For normal use, __spin_yield_cpu will confer current vcpu slices to the > target vcpu(say, a lock holder). If target vcpu is not specified or it > is in run

[PATCH v2 3/5] soc/bman: Add self-test for BMan driver

2016-09-22 Thread Claudiu Manoil
Add a self test for the DPAA 1.x Buffer Manager driver. This test ensures that the driver can properly acquire and release buffers using the BMan portal infrastructure. Signed-off-by: Roy Pledge Signed-off-by: Claudiu Manoil --- v2: none drivers/soc/fsl/qbman/Kconfig | 16 driver

[PATCH v2 5/5] arch/powerpc: Add CONFIG_FSL_DPAA to corenetXX_smp_defconfig

2016-09-22 Thread Claudiu Manoil
Enable the drivers on the powerpc arch. Signed-off-by: Roy Pledge Signed-off-by: Claudiu Manoil --- v2: none arch/powerpc/Makefile| 4 ++-- arch/powerpc/configs/dpaa.config | 1 + drivers/soc/Kconfig | 1 + drivers/soc/fsl/Makefile | 1 + 4 files changed, 5 ins

[PATCH v2 4/5] soc/qman: Add self-test for QMan driver

2016-09-22 Thread Claudiu Manoil
Add self tests for the DPAA 1.x Queue Manager driver. The tests ensure that the driver can properly enqueue and dequeue to/from frame queues using the QMan portal infrastructure. Signed-off-by: Roy Pledge Signed-off-by: Claudiu Manoil --- v2: none drivers/soc/fsl/qbman/Kconfig | 23

[PATCH v2 1/5] soc/fsl: Introduce DPAA 1.x BMan device driver

2016-09-22 Thread Claudiu Manoil
This driver enables the Freescale DPAA 1.x Buffer Manager block. BMan is a hardware accelerator that manages buffer pools. It allows CPUs and other accelerators connected to the SoC datapath to acquire and release buffers during data processing. Signed-off-by: Roy Pledge Signed-off-by: Claudiu M

[PATCH v2 0/5] Freescale DPAA 1.x QBMan Drivers

2016-09-22 Thread Claudiu Manoil
Add basic support for the Data Path Acceleration Architecture v1.x (DPAA 1.x) hardware infrastructure and accelerators found on multicore Freescale SoCs, commonly known as the QorIQ series. CC: Roy Pledge Claudiu Manoil (5): soc/fsl: Introduce DPAA 1.x BMan device driver soc/fsl: Introduce D

Re: [PATCH v21 00/20] perf, tools: Add support for PMU events in JSON format

2016-09-22 Thread Jiri Olsa
On Mon, Sep 19, 2016 at 09:28:20PM -0300, Arnaldo Carvalho de Melo wrote: > Em Mon, Sep 19, 2016 at 09:02:58PM -0300, Arnaldo Carvalho de Melo escreveu: > > Em Mon, Sep 19, 2016 at 08:37:53PM -0300, Arnaldo Carvalho de Melo escreveu: > > > yeah, changing that typedef + true def to plain include >

Re: [PATCH v7 0/6] perf annotate: Cross arch support + few fixes

2016-09-22 Thread Kim Phillips
On Thu, 22 Sep 2016 10:48:13 +0530 Ravi Bangoria wrote: > On Thursday 22 September 2016 01:04 AM, Kim Phillips wrote: > > On Wed, 21 Sep 2016 21:17:50 +0530 > > Ravi Bangoria wrote: > > > >> Kim, I don't have arm test machine. Can you please help me to test > >> this on arm. > > This works for m

Re: [PATCH v21 00/20] perf, tools: Add support for PMU events in JSON format

2016-09-22 Thread Arnaldo Carvalho de Melo
oops, Jiri wasn't CCed, fixing it... Em Mon, Sep 19, 2016 at 09:28:20PM -0300, Arnaldo Carvalho de Melo escreveu: > Em Mon, Sep 19, 2016 at 09:02:58PM -0300, Arnaldo Carvalho de Melo escreveu: > > Em Mon, Sep 19, 2016 at 08:37:53PM -0300, Arnaldo Carvalho de Melo escreveu: > > > yeah, changing tha

Re: [PATCH] powerpc/64: whitelist unresolved modversions CRCs

2016-09-22 Thread Michal Marek
On 2016-09-14 04:45, Nicholas Piggin wrote: > These are a symptom of CRC generation failure in generic > build code, and not powerpc specific. > > Signed-off-by: Nicholas Piggin > --- > > Hi Michal, > > Please merge this via your trees with Al's patches. Done, thanks for the patch. Michal

[PATCH] ppc64/book3s: export mmu type info

2016-09-22 Thread Hari Bathini
The kernel now supports both radix and hash MMU modes. Tools like crash and makedumpfile need to know, the current MMU mode the kernel is using to debug/analyze the kernel. The current MMU mode depends on H/W support and also whether disable_radix cmdline parameter is passed to the kernel. The mmu_

Re: [PATCH 4/4] drivers/pci/hotplug: Support surprise hotplug

2016-09-22 Thread Michael Ellerman
Bjorn Helgaas writes: > Hi Gavin, > > You don't need my ack for any of these, and I assume you'll merge them > through the powerpc tree. Thanks Bjorn, I wasn't sure if you wanted to ack it or not. I'll take the whole series via the powerpc tree. > Minor comments below, feel free to ignore them.

Re: [PATCH] Work around for enabling CONFIG_CMDLINE on ppc64le

2016-09-22 Thread Anton Blanchard
Hi, > But I can't merge that patch. > > Our options are one or both of: > - get GCC fixed and backport the fix to the compilers we care about. > - blacklist the broken compiler versions. > > Is there a GCC bug filed for this? Likely: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71709 We need

Re: [PATCH v7 6/6] powerpc: pSeries: Add pv-qspinlock build config/make

2016-09-22 Thread Michael Ellerman
xinhui writes: > hi, all > ok, this patch set depends on > https://patchwork.kernel.org/patch/8953981/ [V4] powerpc: Implement {cmp}xchg > for u8 and u16 AKA: https://patchwork.ozlabs.org/patch/615480/ Sorry I saw the discussion on that and thought there'd be a new version. But now I rea

Re: [PATCH] Work around for enabling CONFIG_CMDLINE on ppc64le

2016-09-22 Thread Michael Ellerman
Akshay Adiga writes: > Observed that boot arguments (passed as CONFIG_CMDLINE) are not being > picked up by kernel while using gcc-ppc64-linux-gnu v5.4.0 and v6.1.1. > While it works as expected with v5.3.1 . > > Found that in init/main.c in setup_command_line() the pointers passed to > strcpy(

Re: [PATCH v3 1/3] powerpc: port 64 bits pgtable_cache to 32 bits

2016-09-22 Thread Aneesh Kumar K.V
Christophe Leroy writes: Today powerpc64 uses a set of pgtable_caches while powerpc32 uses standard pages when using 4k pages and a single pgtable_cache if using other size pages. In preparation of implementing huge pages on the 8xx, this patch replaces the specific powerpc32 handling by the 6

[PATCH 6/6] powerpc/boot: Add support for XZ compression

2016-09-22 Thread Oliver O'Halloran
This patch adds an option to use XZ compression for the kernel image. Currently this is only enabled for PPC64 targets since the bulk of the 32bit platforms produce uboot images which do not use the wrapper. Signed-off-by: Oliver O'Halloran --- arch/powerpc/boot/Makefile | 3 +++ ar

[PATCH 4/6] powerpc/boot: remove legacy gzip wrapper

2016-09-22 Thread Oliver O'Halloran
This code is no longer used and can be removed. Signed-off-by: Oliver O'Halloran --- arch/powerpc/boot/cuboot-c2k.c | 1 - arch/powerpc/boot/gunzip_util.c | 204 arch/powerpc/boot/gunzip_util.h | 45 - 3 files changed, 250 deletions(-) delete

[PATCH 5/6] powerpc/boot: add xz support to the wrapper script

2016-09-22 Thread Oliver O'Halloran
This modifies the script so that the -Z option takes an argument to specify the compression type. It can either be 'gz', 'xz' or 'none'. The legazy --no-gzip and -z options are still supported and will set the compression to none and gzip respectively, but they are not documented. Only xz -6 is us

[PATCH 3/6] powerpc/boot: use the preboot decompression API

2016-09-22 Thread Oliver O'Halloran
Currently the powerpc boot wrapper has its own wrapper around zlib to handle decompressing gzipped kernels. The kernel decompressor library functions now provide a generic interface that can be used in the pre-boot environment. This allows boot wrappers to easily support different compression algor