Re: [PATCH] dpaa_eth: use AVOIDBLOCK for Tx confirmation queues

2017-04-01 Thread David Miller
From: Madalin Bucur Date: Thu, 30 Mar 2017 16:24:15 +0300 > The AVOIDBLOCK flag determines the Tx confirmation queues processing > to be redirected to any available CPU when the current one is slow > in processing them. This may result in a higher Tx confirmation > interrupt count but may reduce

Re: [PATCH] fsl/fman: take into account all RGMII modes

2017-04-01 Thread David Miller
From: Madalin Bucur Date: Thu, 30 Mar 2017 16:21:40 +0300 > Accept the internal delay RGMII variants. > > Signed-off-by: Madalin Bucur Applied, thanks.

[RESEND PATCH 0/5] Enable NX 842 compression engine on Power9

2017-04-01 Thread Haren Myneni
Sorry for reposting. Missed to specify dependency - VAS kernel changes. [PATCH 0/5] Enable NX 842 compression engine on Power9 P9 introduces Virtual Accelerator Switchboard (VAS) to communicate with NX 842 engine. icswx function is used to access NX before. On powerNV systems, NX-842 driver invok

[PATCH 5/5] crypto/nx: Add P9 NX specific error codes for 842 engine

2017-04-01 Thread Haren Myneni
[PATCH 5/5] crypto/nx: Add P9 NX specific error codes for 842 engine This patch adds changes for checking P9 specific 842 engine error codes. These errros are reported in co-processor status block (CSB) for failures. Signed-off-by: Haren Myneni --- arch/powerpc/include/asm/icswx.h | 3 +++ d

[PATCH 4/5] crypto/nx: Add P9 NX support for 842 compression engine.

2017-04-01 Thread Haren Myneni
[PATCH 4/5] crypto/nx: Add P9 NX support for 842 compression engine. This patch adds P9 NX support for 842 compression engine. Virtual Accelerator Switchboard (VAS) is used to access 842 engine on P9. For each NX engine per chip, setup receive window using vas_rx_win_open() which configures RxFIF

[PATCH 3/5] crypto/nx: Create nx842_delete_coproc function

2017-04-01 Thread Haren Myneni
[PATCH 3/5] crypto/nx: Create nx842_delete_coproc function Move deleting coprocessor info upon exit or failure to nx842_delete_coproc(). Signed-off-by: Haren Myneni --- drivers/crypto/nx/nx-842-powernv.c | 25 - 1 file changed, 12 insertions(+), 13 deletions(-) diff --g

[PATCH 2/5] crypto/nx: Create nx842_cfg_crb function

2017-04-01 Thread Haren Myneni
[PATCH 2/5] crypto/nx: Create nx842_cfg_crb function Configure CRB is moved to nx842_cfg_crb() so that it can be used for icswx function and VAS function which will be added later. Signed-off-by: Haren Myneni --- drivers/crypto/nx/nx-842-powernv.c | 57 +- 1

[PATCH 1/5] crypto/nx: Rename nx842_powernv_function as icswx function

2017-04-01 Thread Haren Myneni
[PATCH 1/5] crypto/nx: Rename nx842_powernv_function as icswx function nx842_powernv_function is points to nx842_icswx_function and will be point to VAS function which will be added later for P9 NX support. Signed-off-by: Haren Myneni --- drivers/crypto/nx/nx-842-powernv.c | 24

[PATCH 0/5] crypto/nx: Enable NX 842 compression engine on Power9

2017-04-01 Thread Haren Myneni
[PATCH 0/5] crypto/nx: Enable NX 842 compression engine on Power9 P9 introduces Virtual Accelerator Switchboard (VAS) to communicate with NX 842 engine. icswx function is used to access NX before. On powerNV systems, NX-842 driver invokes VAS functions for configuring RxFIFO (receive window) per

[PATCH 2/2] powerpc/mm/radix: Remove unnecessary ptesync

2017-04-01 Thread Aneesh Kumar K.V
For a tlbiel with pid, we need to issue tlbiel with set number encoded. We don't need to do ptesync for each of those. Instead we need one for the entire tlbiel pid operation. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/tlb-radix.c | 4 ++-- 1 file

[PATCH 1/2] powerpc/mm/radix: Don't do page walk cache flush when doing full mm flush

2017-04-01 Thread Aneesh Kumar K.V
For fullmm tlb flush, we do a flush with RIC_FLUSH_ALL which will invalidate all related caches (radix__tlb_flush()). Hence the pwc flush is not needed. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/tlb-radix.c | 12 1 file changed, 12 insertions(+) diff --git a/arch/powerpc/

Re: [PATCH v4 2/3] powerpc/xmon: drop the nobt option from xmon plus minor fixes

2017-04-01 Thread Michael Ellerman
"Guilherme G. Piccoli" writes: > On 03/30/2017 09:36 PM, Paul Mackerras wrote: >> On Wed, Mar 22, 2017 at 04:27:50PM -0300, Guilherme G. Piccoli wrote: >>> The xmon parameter nobt was added long time ago, by commit 26c8af5f01df >>> ("[POWERPC] print backtrace when entering xmon"). The problem tha

Re: [RFC PATCH 2/5] soc/fsl/qbman: Use shared-dma-pool for QMan private memory allocations

2017-04-01 Thread Scott Wood
On Fri, 2017-03-31 at 18:55 +0100, Robin Murphy wrote: > On 31/03/17 04:27, Michael Ellerman wrote: > > > > Robin Murphy writes: > > > > > > > > Hi Roy, > > > > > > On 29/03/17 22:13, Roy Pledge wrote: > > > > > > > > Use the shared-memory-pool mechanism for frame queue descriptor and > > > >