On Tue, 16 May 2017 14:19:43 +0530
"Gautham R. Shenoy" wrote:
> From: "Gautham R. Shenoy"
>
> The lower 8 bits of core_idle_state_ptr tracks the number of non-idle
> threads in the core. This is supposed to be initialized to bit-map
>
As with P7IOC and PHB3, add kernel-side support for decoding and printing
diagnostic data for PHB4.
Signed-off-by: Russell Currey
---
arch/powerpc/include/asm/opal-api.h | 75 -
arch/powerpc/platforms/powernv/pci.c | 105
Diagnostic data for PHBs currently works by allocated a fixed-sized buffer.
This is simple, but either wastes memory (though only a few kilobytes) or
in the case of PHB4 isn't enough to fit the whole data blob.
For machines that don't describe the diagnostic data size in the device
tree, use the
Dumping the PE State Tables (PEST) can be highly verbose if a number of PEs
are affected, especially in the case where the whole PHB is frozen and 512
lines get printed. Check for duplicates when dumping the PEST to reduce
useless output.
For example:
PE[0f8] A/B: 9726
Nicholas Piggin writes:
> On Mon, 29 May 2017 20:29:49 +1000
> Michael Ellerman wrote:
>> Nicholas Piggin writes:
...
>>
>> In practice it works because the base CPU spec that we initialise in
>> dt_cpu_ftrs.c is mostly OK, and skiboot
Balbir Singh writes:
> On Thu, 2017-05-11 at 21:24 +1000, Nicholas Piggin wrote:
>> diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c
>> b/arch/powerpc/kernel/dt_cpu_ftrs.c
>> index fcc7588a96d6..050925b5b451 100644
>> --- a/arch/powerpc/kernel/dt_cpu_ftrs.c
>> +++
On 05/27/2017 09:16 PM, Michal Suchanek wrote:
> - log an error message when registration fails and no error code listed
> in the switch is returned
> - translate the hv error code to posix error code and return it from
> fw_register
> - return the posix error code from fw_register to the
On Mon, 2017-05-29 at 20:02 +0530, Aneesh Kumar K.V wrote:
> kvmppc_do_h_enter() when get called in real mode.
>
> For now i have dropped hard_irq_disabled() and switched these usage to
> __find_linux_pte with explict comment around them stating they are
> called with MSR_EE = 0.
Shouldn't these
On Mon, 29 May 2017 11:53:10 +1000
Michael Ellerman wrote:
> We are running low on CPU feature bits, so we only want to use them when
> it's really necessary.
>
> CPU_FTR_SUBCORE is only used in one place, and only in C, so we don't
> need it in order to make asm patching
On Mon, 29 May 2017 17:32:00 +0200 (CEST)
Christophe Leroy wrote:
> As seen below, allthough the init sections have been freed, the
> associated memory area is still marked as executable in the
> page tables.
Good catch!
Acked-by: Balbir Singh
On 29/05/17 21:57, Vaibhav Jain wrote:
During an eeh call to cxl_remove can result in double free_irq of
psl,slice interrupts. This can happen if perst_reloads_same_image == 1
and call to cxl_configure_adapter() fails during slot_reset
callback. In such a case we see a kernel oops with following
On Mon, 29 May 2017 17:31:56 +0200 (CEST)
Christophe Leroy wrote:
> Signed-off-by: Christophe Leroy
> ---
...
> diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
> index de5a90e1ceaa..8e9bef964dbf 100644
> --- a/arch/powerpc/mm/mem.c
>
On Mon, 29 May 2017 20:29:49 +1000
Michael Ellerman wrote:
> Nicholas Piggin writes:
>
> > Provide a dt_cpu_ftrs= cmdline option to disable the dt_cpu_ftrs CPU
> > feature discovery, and fall back to the "cputable" based version.
>
> I don't think
On Tue, 30 May 2017 09:02:30 +1000
Balbir Singh wrote:
> On Mon, 2017-05-29 at 17:39 +1000, Nicholas Piggin wrote:
> > Very large kernels may require linker stubs for branches from HEAD
> > text code. The linker may place these stubs before the HEAD text
> > sections,
On Mon, 2017-05-29 at 17:39 +1000, Nicholas Piggin wrote:
> Very large kernels may require linker stubs for branches from HEAD
> text code. The linker may place these stubs before the HEAD text
> sections, which breaks the assumption that HEAD text is located at 0
> (or the .text section being
On Thu, 2017-05-11 at 21:24 +1000, Nicholas Piggin wrote:
> Provide a dt_cpu_ftrs= cmdline option to disable the dt_cpu_ftrs CPU
> feature discovery, and fall back to the "cputable" based version.
>
> Also allow control of advertising unknown features to userspace and
> with this parameter, and
On Mon, 2017-05-29 at 10:50 +0200, Christophe LEROY wrote:
>
> Le 25/05/2017 à 05:36, Balbir Singh a écrit :
> > arch_arm/disarm_probe use direct assignment for copying
> > instructions, replace them with patch_instruction
> >
> > Signed-off-by: Balbir Singh
> > ---
> >
To allow this driver to be used on non-powerpc platforms it needs to use
io accessors suitable for all platforms.
Signed-off-by: Chris Packham
---
Changes in v2:
- use readl/writel as suggested.
Changes in v3:
- None
drivers/edac/mv64x60_edac.c | 84
Check the return status of platform_driver_register() in
mv64x60_edac_init(). Only output messages and initialise the
edac_op_state if the registration is successful.
Signed-off-by: Chris Packham
---
Changes in v3:
- catch the retval of
Change this from mpc85xx_pci_err to mv64x60_pci_err. The former is
likely a hangover from when this driver was created.
Signed-off-by: Chris Packham
---
Changes in v3:
- None
drivers/edac/mv64x60_edac.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
I'm looking at making use of the mv64x60_edac driver for the armada processors.
It appears that at least the DRAM ECC error reporting is the same block from
the old Marvell Discovery class of processors. On the ARM side I need to get
the error interrupts exposed first before I can send my second
On 05/29/2017 06:26 AM, Murilo Opsfelder Araujo wrote:
drivers/watchdog/wdrtas.c uses symbols defined in arch/powerpc/kernel/rtas.c,
which are exported iff CONFIG_PPC_RTAS is selected. Building wdrtas.c without
setting CONFIG_PPC_RTAS throws the following errors:
ERROR: ".rtas_token"
drivers/watchdog/wdrtas.c uses symbols defined in arch/powerpc/kernel/rtas.c,
which are exported iff CONFIG_PPC_RTAS is selected. Building wdrtas.c without
setting CONFIG_PPC_RTAS throws the following errors:
ERROR: ".rtas_token" [drivers/watchdog/wdrtas.ko] undefined!
ERROR:
__set_fixmap() uses __fix_to_virt() then does the boundary checks
by it self. Instead, we can use fix_to_virt() which does the
verification at build time. For this, we need to use it inline
so that GCC can see the real value of idx at buildtime.
In the meantime, we remove the 'fixmaps' variable.
This function has not been used since commit 9494a1e8428ea
("powerpc: use generic fixmap.h)
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/pgtable_32.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/powerpc/mm/pgtable_32.c
get_pteptr() and __mapin_ram_chunk() are only used locally,
so define them static
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 3 ---
arch/powerpc/include/asm/nohash/32/pgtable.h | 3 ---
arch/powerpc/mm/pgtable_32.c
This patch implements STRICT_KERNEL_RWX on PPC32.
As for CONFIG_DEBUG_PAGEALLOC, it deactivates BAT and LTLB mappings
in order to allow page protection setup at the level of each page.
As BAT/LTLB mappings are deactivated, there might be a performance
impact. For this reason, we make it optional
As seen below, allthough the init sections have been freed, the
associated memory area is still marked as executable in the
page tables.
~ dmesg
[5.860093] Freeing unused kernel memory: 592K (c057 - c0604000)
~ cat /sys/kernel/debug/kernel_page_tables
---[ Start of kernel VM ]---
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 2 ++
arch/powerpc/include/asm/nohash/32/pgtable.h | 2 ++
arch/powerpc/mm/8xx_mmu.c| 2 +-
arch/powerpc/mm/dma-noncoherent.c| 2 +-
arch/powerpc/mm/mem.c
__change_page_attr() uses flush_tlb_page().
flush_tlb_page() uses tlbie instruction, which also invalidates
pinned TLBs, which is not what we expect.
This patch modifies the implementation to use flush_tlb_kernel_range()
instead. This will make use of tlbia which will preserve pinned TLBs.
This patch set implements STRICT_KERNEL_RWX on Powerpc32
after fixing a few issues related to kernel code page protection.
It superseeds the previous patch set identified "Fix kernel protection
and implement CONFIG_DEBUG_RODATA on PPC32"
This set is based on Balbir Singh
Benjamin Herrenschmidt writes:
> On Wed, 2017-05-17 at 08:57 +0530, Aneesh Kumar K.V wrote:
>> Benjamin Herrenschmidt writes:
>>
>> > On Tue, 2017-05-16 at 14:56 +0530, Aneesh Kumar K.V wrote:
>> > > +static inline pte_t *find_linux_pte(pgd_t
On Sat, May 27, 2017 at 08:16:15PM +0530, Bhumika Goyal wrote:
> Declare snd_kcontrol_new structures as const as they are only passed an
> argument to the function snd_ctl_new1. This argument is of type const,
> so snd_kcontrol_new structures having this property can be made const.
> Done using
During an eeh call to cxl_remove can result in double free_irq of
psl,slice interrupts. This can happen if perst_reloads_same_image == 1
and call to cxl_configure_adapter() fails during slot_reset
callback. In such a case we see a kernel oops with following back-trace:
Oops: Kernel access of bad
On Fri 26-05-17 12:45:55, Pasha Tatashin wrote:
> Hi Michal,
>
> I have considered your proposals:
>
> 1. Making memset(0) unconditional inside __init_single_page() is not going
> to work because it slows down SPARC, and ppc64. On SPARC even the BSTI
> optimization that I have proposed earlier
Hi Michael,
> So fix it by setting rc = 0 before returning in the success case.
>
> Fixes: 7b1f4020d0d1 ("spufs: get rid of dump_emit() wrappers")
> Signed-off-by: Michael Ellerman
Looks good to me, thanks.
Acked-by: Jeremy Kerr
Cheers,
Jeremy
Nicholas Piggin writes:
> Provide a dt_cpu_ftrs= cmdline option to disable the dt_cpu_ftrs CPU
> feature discovery, and fall back to the "cputable" based version.
I don't think this works properly.
> diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c
>
If a process dumps core while it has SPU contexts active then we have
code to also dump information about the SPU contexts.
Unfortunately it's been broken for 3 1/2 years, and we didn't notice. In
commit 7b1f4020d0d1 ("spufs: get rid of dump_emit() wrappers") the nread
variable was removed and rc
One of the new features of POWER9 is that the decrementer (the
facility that provides an interrupt after a programmable length of
time) has been increased in size from 32 bits to 56 bits, allowing
time intervals of up to about 814 days, compared to 4 seconds
previously. This patch series adds
This allows userspace (e.g. QEMU) to enable large decrementer mode for
the guest when running on a POWER9 host, by setting the LPCR_LD bit in
the guest LPCR value. With this, the guest exit code saves 64 bits of
the guest DEC value on exit. Other places that use the guest DEC
value check the
POWER9 introduces a new mode for the decrementer register, called
large decrementer mode, in which the decrementer counter is 56 bits
wide rather than 32, and reads are sign-extended rather than
zero-extended. For the decrementer, this new mode is optional and
controlled by a bit in the LPCR.
On Wed, May 24, 2017 at 10:01 AM, Christophe Leroy
wrote:
> of_mm_gpiochip_add_data() generates an Oops for NULL pointer dereference.
>
> of_mm_gpiochip_add_data() calls mm_gc->save_regs() before
> setting the data, therefore ->save_regs() cannot use gpiochip_get_data()
Le 25/05/2017 à 05:36, Balbir Singh a écrit :
arch_arm/disarm_probe use direct assignment for copying
instructions, replace them with patch_instruction
Signed-off-by: Balbir Singh
---
arch/powerpc/kernel/kprobes.c | 4 ++--
1 file changed, 2 insertions(+), 2
Le 25/05/2017 à 18:45, kbuild test robot a écrit :
Hi Balbir,
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.12-rc2 next-20170525]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
Very large kernels may require linker stubs for branches from HEAD
text code. The linker may place these stubs before the HEAD text
sections, which breaks the assumption that HEAD text is located at 0
(or the .text section being located at 0x7000/0x8000 on Book3S
kernels).
Provide an option to
Le 29/05/2017 à 00:58, Balbir Singh a écrit :
On Sun, 2017-05-28 at 16:29 +0200, christophe leroy wrote:
Le 25/05/2017 à 05:36, Balbir Singh a écrit :
Today our patching happens via direct copy and
patch_instruction. The patching code is well
contained in the sense that copying bits are
Use the normal kernel crash path in more cases (whenever we're not
the init task), because it generally leads to much better Linux crash
information.
POWER9 has introduced more machine check conditions that can be
triggered by programming errors (as opposed to hardware errors),
which need to be
The i-side 0111b case was missed by 7b9f71f974 ("powerpc/64s: POWER9
machine check handler").
It is possible to trigger this exception by branching to a foreign real
address (bits [8:12] != 0) with instruction relocation off, and verify
the exception cause is found after this patch.
Fixes:
Signed-off-by: Madalin Bucur
Signed-off-by: Camelia Groza
---
Documentation/networking/dpaa.txt | 194 ++
1 file changed, 194 insertions(+)
create mode 100644 Documentation/networking/dpaa.txt
diff --git
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