On Wed, 07 Jun 2017 00:58:04 PDT (-0700), Arnd Bergmann wrote:
> On Wed, Jun 7, 2017 at 9:15 AM, Geert Uytterhoeven
> wrote:
>> CC (hypervisor) console folks
>>
>> On Wed, Jun 7, 2017 at 1:00 AM, Palmer Dabbelt wrote:
>>> This patch adds a new driver
Hi Linus,
Please pull some more powerpc fixes for 4.12. Most of these actually came in
last week but got held up for some more testing.
The following changes since commit a093c92dc7f96a15de98ec8cfe38e6f7610a5969:
powerpc/debug: Add missing warn flag to WARN_ON's non-builtin path
(2017-06-16
The ELF_ET_DYN_BASE position was originally intended to keep loaders
away from ET_EXEC binaries. (For example, running "/lib/ld-linux.so.2
/bin/cat" might cause the subsequent load of /bin/cat into where the
loader had been loaded.) With the advent of PIE (ET_DYN binaries with
an INTERP Program
Now that explicitly executed loaders are loaded in the mmap region, we
have more freedom to decide where we position PIE binaries in the address
space to avoid possible collisions with mmap or stack regions.
4MB is chosen here mainly to have parity with x86, where this is the
traditional minimum
Now that explicitly executed loaders are loaded in the mmap region, we
have more freedom to decide where we position PIE binaries in the address
space to avoid possible collisions with mmap or stack regions.
For 64-bit, align to 4GB to allow runtimes to use the entire 32-bit
address space for
Now that explicitly executed loaders are loaded in the mmap region, we
have more freedom to decide where we position PIE binaries in the address
space to avoid possible collisions with mmap or stack regions.
For 64-bit, align to 4GB to allow runtimes to use the entire 32-bit
address space for
Now that explicitly executed loaders are loaded in the mmap region, we
have more freedom to decide where we position PIE binaries in the address
space to avoid possible collisions with mmap or stack regions.
For 64-bit, align to 4GB to allow runtimes to use the entire 32-bit
address space for
This is v2 (to refresh the 5 patches in -mm) for moving ELF_ET_DYN_BASE
safely lower. Changes are clarifications in the commit logs (suggested
by mpe), a compat think-o fix for arm64 (thanks to Ard), and to add
Rik and mpe's Acks.
Quoting patch 1/5:
The ELF_ET_DYN_BASE position was originally
On Fri, Jun 23, 2017 at 01:49:16PM -0500, Larry Finger wrote:
> > BTW, could you try to check what happens if you kill the
> > if (__builtin_constant_p(n) && (n <= 8))
> > bits in raw_copy_{to,from}_user()? The usefulness of those (in
> > __copy_from_user()
> > originally) had always been
On Fri, Jun 23, 2017 at 12:01 AM, Michael Ellerman wrote:
> Kees Cook writes:
>
>> Now that explicitly executed loaders are loaded in the mmap region,
>> position PIE binaries lower in the address space to avoid possible
>> collisions with mmap or
Em 2017-06-22 00:59, Michael Ellerman escreveu:
Hi Victor,
Someone refreshed my memory on this, coffee was involved ...
victora writes:
Hi Alistair/Jeremy,
I am working on a bug related to 1M hugepage size being registered on
Linux (Power 8 Baremetal - Garrison).
Thanks Horia.
I'm inclined to just use your patch verbatim. I can set you as author,
but no matter how I do it, I'll need your Signed-off-by.
Logan
On 23/06/17 12:51 AM, Horia Geantă wrote:
> On 6/22/2017 7:49 PM, Logan Gunthorpe wrote:
>> Now that ioread64 and iowrite64 are always available we
Hi Cyril,
On Fri, Jun 23, 2017 at 04:03:12PM +1000, Cyril Bur wrote:
> On Thu, 2017-06-22 at 17:27 -0300, Breno Leitao wrote:
> > Currently giveup_all() calls __giveup_fpu(), __giveup_altivec(), and
> > __giveup_vsx(). But __giveup_vsx() also calls __giveup_fpu() and
> > __giveup_altivec() again,
On Fri, 23 Jun 2017 00:33:45 +0530
"Naveen N. Rao" wrote:
> On 2017/06/22 06:29PM, Masami Hiramatsu wrote:
> > On Thu, 22 Jun 2017 00:20:27 +0530
> > "Naveen N. Rao" wrote:
> >
> > > When we derive event names, convert some
On Thu, 22 Jun 2017 22:33:25 +0530
"Naveen N. Rao" wrote:
> On 2017/06/22 06:07PM, Masami Hiramatsu wrote:
> > On Thu, 22 Jun 2017 00:20:28 +0530
> > "Naveen N. Rao" wrote:
> >
> > > KPROBES_ON_FTRACE is only available on
On 06/22/2017 02:20 PM, Benjamin Herrenschmidt wrote:
> On Thu, 2017-06-22 at 11:29 +0200, Cédric Le Goater wrote:
>> This is the framework for using XIVE in a PowerVM guest. The support
>> is very similar to the native one in a much simpler form.
>
> Looks really good. Minor nits & comments...
>
Hi Russell,
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.12-rc6 next-20170623]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Russell-Currey/powerpc-powernv-pci-Add
* shdci-st driver can be used for ppc476 fsp2 soc
Signed-off-by: Ivan Mikhaylov
---
drivers/mmc/host/Kconfig |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 2eb9701..e6c0d86 100644
---
* add mmc0 section into dts for arasan
* change defconfig appropriately
Signed-off-by: Ivan Mikhaylov
---
arch/powerpc/boot/dts/fsp2.dts | 19 +++
arch/powerpc/configs/44x/fsp2_defconfig |2 ++
2 files changed, 21 insertions(+), 0 deletions(-)
fsp2 based on powerpc 476fpe using eMMC arasan, so we added support
of this inside our dts and also enabled via additional
dependence for sdhci-st driver in Kconfig.
this code depends on commit c4b56b023daa91953e9ebe91143e6ca156f0bcb7
which is located in powerpc linux tree in 'next' branch.
Ivan
From: Paolo Abeni
Date: Fri, 23 Jun 2017 14:19:51 +0200
> Michael reported an UDP breakage caused by the commit b65ac44674dd
> ("udp: try to avoid 2 cache miss on dequeue").
> The function __first_packet_length() can update the checksum bits
> of the pending skb, making the
On Fri, 23 Jun 2017 15:06:37 +1000
Alexey Kardashevskiy wrote:
> On 23/06/17 07:11, Alex Williamson wrote:
> > On Thu, 15 Jun 2017 15:48:42 +1000
> > Alexey Kardashevskiy wrote:
> >
> >> Here is a patchset which Yongji was working on before
> >> leaving IBM
On 23 June 2017 at 14:02, Kees Cook wrote:
> On Fri, Jun 23, 2017 at 6:52 AM, Kees Cook wrote:
>> On Thu, Jun 22, 2017 at 11:57 PM, Ard Biesheuvel
>> wrote:
>>> Hi Kees,
>>>
>>> On 22 June 2017 at 18:06, Kees Cook
On Fri, Jun 23, 2017 at 6:52 AM, Kees Cook wrote:
> On Thu, Jun 22, 2017 at 11:57 PM, Ard Biesheuvel
> wrote:
>> Hi Kees,
>>
>> On 22 June 2017 at 18:06, Kees Cook wrote:
>>> Now that explicitly executed loaders are loaded
On Thu, Jun 22, 2017 at 11:57 PM, Ard Biesheuvel
wrote:
> Hi Kees,
>
> On 22 June 2017 at 18:06, Kees Cook wrote:
>> Now that explicitly executed loaders are loaded in the mmap region,
>> position PIE binaries lower in the address space to avoid
Michael reported an UDP breakage caused by the commit b65ac44674dd
("udp: try to avoid 2 cache miss on dequeue").
The function __first_packet_length() can update the checksum bits
of the pending skb, making the scratched area out-of-sync, and
setting skb->csum, if the skb was previously in need of
On Fri, 2017-06-23 at 16:59 +1000, Michael Ellerman wrote:
> Hannes Frederic Sowa writes:
>
> > On Thu, Jun 22, 2017, at 22:57, Paolo Abeni wrote:
> > >
> > > Can you please check if the following patch fixes the issue? Only
> > > compiled tested here.
> > >
> > >
On Fri, 2017-06-23 at 19:33 +1000, Michael Ellerman wrote:
> Michael Neuling writes:
>
> > On POWER9 the ERAT may be incorrect on wakeup from some stop states
> > that lose state. This causes random segvs and illegal instructions
> > when these stop states are enabled.
>
>
On Fri, 23 Jun 2017 19:33:23 +1000
Michael Ellerman wrote:
> Michael Neuling writes:
>
> > On POWER9 the ERAT may be incorrect on wakeup from some stop states
> > that lose state. This causes random segvs and illegal instructions
> > when these stop
On 06/22/2017 10:56 PM, Michael Neuling wrote:
> On POWER9 the ERAT may be incorrect on wakeup from some stop states
> that lose state. This causes random segvs and illegal instructions
> when these stop states are enabled.
>
> This patch invalidates the ERAT on wakeup on POWER9 to prevent this
>
Michael Neuling writes:
> On POWER9 the ERAT may be incorrect on wakeup from some stop states
> that lose state. This causes random segvs and illegal instructions
> when these stop states are enabled.
Incorrect how?
Because with the ERAT flush where you've put it, there's
On Tue, 2017-06-20 at 07:44:47 UTC, Santosh Sivaraj wrote:
> Since trace_clock is in a different file and already marked with notrace,
> enable tracing in time.c by removing it from the disabled list in Makefile.
> Also annotate clocksource read functions and sched_clock with notrace.
>
>
On Sat, 2017-05-27 at 08:04:52 UTC, Paul Mackerras wrote:
> This converts the powerpc VDSO time update function to use the new
> interface introduced in commit 576094b7f0aa ("time: Introduce new
> GENERIC_TIME_VSYSCALL", 2012-09-11). Where the old interface gave
> us the time as of the last
Flip the switch. Running around and screaming "IT'S ALIVE" is optional,
but recommended.
Signed-off-by: Oliver O'Halloran
---
v3: Only select when building for 64bit Book3-S
---
arch/powerpc/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/Kconfig
From: Anton Blanchard
Adds support for removing bolted (i.e kernel linear mapping) mappings on
powernv. This is needed to support memory hot unplug operations which
are required for the teardown of DAX/PMEM devices.
Reviewed-by: Balbir Singh
Reviewed-by:
Add support for the devmap bit on PTEs and PMDs for PPC64 Book3S. This
is used to differentiate device backed memory from transparent huge
pages since they are handled in more or less the same manner by the core
mm code.
Cc: Aneesh Kumar K.V
Signed-off-by:
Adds support to powerpc for the altmap feature of ZONE_DEVICE memory. An
altmap is a driver provided region that is used to provide the backing
storage for the struct pages of ZONE_DEVICE memory. In situations where
large amount of ZONE_DEVICE memory is being added to the system the
altmap reduces
Removes an indentation level and shuffles some code around to make the
following patch cleaner. No functional changes.
Signed-off-by: Oliver O'Halloran
---
v1 -> v2: Remove broken initialiser
---
arch/powerpc/mm/init_64.c | 48 ---
1
Currently ZONE_DEVICE depends on X86_64 and this will get unwieldly as
new architectures (and platforms) get ZONE_DEVICE support. Move to an
arch selected Kconfig option to save us the trouble.
Cc: linux...@kvack.org
Acked-by: Ingo Molnar
Acked-by: Balbir Singh
On Wed, 21 Jun 2017, Jiri Slaby wrote:
> diff --git a/arch/arm64/include/asm/futex.h b/arch/arm64/include/asm/futex.h
> index f32b42e8725d..5bb2fd4674e7 100644
> --- a/arch/arm64/include/asm/futex.h
> +++ b/arch/arm64/include/asm/futex.h
> @@ -48,20 +48,10 @@ do {
Kees Cook writes:
> Now that explicitly executed loaders are loaded in the mmap region,
> position PIE binaries lower in the address space to avoid possible
> collisions with mmap or stack regions. For 64-bit, align to 4GB to
> allow runtimes to use the entire 32-bit
Hannes Frederic Sowa writes:
> On Thu, Jun 22, 2017, at 22:57, Paolo Abeni wrote:
>>
>> Can you please check if the following patch fixes the issue? Only
>> compiled tested here.
>>
>> Thanks!!!
>> ---
>> diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c
>> index
On Thu, 2017-06-22 at 18:43 +0200, Paolo Abeni wrote:
> On Thu, 2017-06-22 at 23:06 +1000, Michael Ellerman wrote:
> > Paolo wrote:
> > > when udp_recvmsg() is executed, on x86_64 and other archs, most skb
> > > fields are on cold cachelines.
> > > If the skb are linear and the kernel don't need
Hi Kees,
On 22 June 2017 at 18:06, Kees Cook wrote:
> Now that explicitly executed loaders are loaded in the mmap region,
> position PIE binaries lower in the address space to avoid possible
> collisions with mmap or stack regions. For 64-bit, align to 4GB to
> allow
On 6/22/2017 7:49 PM, Logan Gunthorpe wrote:
> Now that ioread64 and iowrite64 are always available we don't
> need the ugly ifdefs to change their implementation when they
> are not.
>
Thanks Logan.
Note however this is not equivalent - it changes the behaviour, since
CAAM engine on
On 22/06/17 16:48, Madalin-cristian Bucur wrote:
This means all the QMan portal_isr() are distributed round-robin to all
affine portals. Is there some way to configure the software portal for a
specific network interface, e.g. use processors 0, 1, 2, 3 for one
interface,and 4, 5, 6, 7 for
On Thu, 2017-06-22 at 17:27 -0300, Breno Leitao wrote:
> Currently giveup_all() calls __giveup_fpu(), __giveup_altivec(), and
> __giveup_vsx(). But __giveup_vsx() also calls __giveup_fpu() and
> __giveup_altivec() again, in a redudant manner.
>
> Other than giving up FP and Altivec,
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