Re: RCU lockup issues when CONFIG_SOFTLOCKUP_DETECTOR=n - any one else seeing this?

2017-07-30 Thread Boqun Feng
On Fri, Jul 28, 2017 at 12:09:56PM -0700, Paul E. McKenney wrote: > On Fri, Jul 28, 2017 at 11:41:29AM -0700, Paul E. McKenney wrote: > > On Fri, Jul 28, 2017 at 07:55:30AM -0700, Paul E. McKenney wrote: > > > On Fri, Jul 28, 2017 at 08:54:16PM +0800, Boqun Feng wrote: > > [ . . . ] > > > > Even

Re: Linux 4.13: Reported regressions as of Sunday, 2017-07-30

2017-07-30 Thread Andy Shevchenko
On Sun, Jul 30, 2017 at 4:49 PM, Thorsten Leemhuis wrote: > Hi! Find below my first regression report for Linux 4.13. It lists 8 > regressions I'm currently aware of (a few others I had on my list got > fixed in the past few days). You can also find it at > http://bit.ly/lnxregrep413 where I try t

Linux 4.13: Reported regressions as of Sunday, 2017-07-30

2017-07-30 Thread Thorsten Leemhuis
Hi! Find below my first regression report for Linux 4.13. It lists 8 regressions I'm currently aware of (a few others I had on my list got fixed in the past few days). You can also find it at http://bit.ly/lnxregrep413 where I try to update it every now and then. As always: Are you aware of any ot

Re: [PATCH v3 7/7] ima: Support module-style appended signatures for appraisal

2017-07-30 Thread Mimi Zohar
On Thu, 2017-07-06 at 19:17 -0300, Thiago Jung Bauermann wrote: > This patch introduces the modsig keyword to the IMA policy syntax to > specify that a given hook should expect the file to have the IMA signature > appended to it. Here is how it can be used in a rule: > > appraise func=KEXEC_KERNEL

Re: RCU lockup issues when CONFIG_SOFTLOCKUP_DETECTOR=n - any one else seeing this?

2017-07-30 Thread Paul E. McKenney
On Sun, Jul 30, 2017 at 09:37:47PM +0800, Boqun Feng wrote: > On Fri, Jul 28, 2017 at 12:09:56PM -0700, Paul E. McKenney wrote: > > On Fri, Jul 28, 2017 at 11:41:29AM -0700, Paul E. McKenney wrote: > > > On Fri, Jul 28, 2017 at 07:55:30AM -0700, Paul E. McKenney wrote: > > > > On Fri, Jul 28, 2017

[PATCH 0/7] powerpc: Free up RPAGE_RSV bits

2017-07-30 Thread Ram Pai
RPAGE_RSV0..4 pte bits are currently used for hpte slot tracking. We need these bits for memory-protection keys. Luckily these four bits are relatively easier to move among all the other candidate bits. For 64K linux-ptes backed by 4k hptes, these bits are used for tracking the

[PATCH 1/7] powerpc: Free up four 64K PTE bits in 4K backed HPTE pages

2017-07-30 Thread Ram Pai
Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6, in the 4K backed HPTE pages.These bits continue to be used for 64K backed HPTE pages in this patch, but will be freed up in the next patch. The bit numbers are big-endian as defined in the ISA3.0 The patch does the following change to t

[PATCH 2/7] powerpc: Free up four 64K PTE bits in 64K backed HPTE pages

2017-07-30 Thread Ram Pai
Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6 in the 64K backed HPTE pages. This along with the earlier patch will entirely free up the four bits from 64K PTE. The bit numbers are big-endian as defined in the ISA3.0 This patch does the following change to 64K PTE backed by 64K H

[PATCH 3/7] powerpc: Swizzle around 4K PTE bits to free up bit 5 and bit 6

2017-07-30 Thread Ram Pai
We need PTE bits 3 ,4, 5, 6 and 57 to support protection-keys, because these are the bits we want to consolidate on across all configuration to support protection keys. Bit 3,4,5 and 6 are currently used on 4K-pte kernels. But bit 9 and 10 are available. Hence we use the two available bits

[PATCH 4/7] powerpc: capture the PTE format changes in the dump pte report

2017-07-30 Thread Ram Pai
The H_PAGE_F_SECOND,H_PAGE_F_GIX are not in the 64K main-PTE. capture these changes in the dump pte report. Reviewed-by: Aneesh Kumar K.V Signed-off-by: Ram Pai --- arch/powerpc/mm/dump_linuxpagetables.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/mm/

[PATCH 5/7] powerpc: introduce pte_set_hash_slot() helper

2017-07-30 Thread Ram Pai
Introduce pte_set_hash_slot().It sets the (H_PAGE_F_SECOND|H_PAGE_F_GIX) bits at the appropriate location in the PTE of 4K PTE. For 64K PTE, it sets the bits in the second part of the PTE. Though the implementation for the former just needs the slot parameter, it does tak

[PATCH 6/7] powerpc: introduce pte_get_hash_gslot() helper

2017-07-30 Thread Ram Pai
Introduce pte_get_hash_gslot()() which returns the slot number of the HPTE in the global hash table. This function will come in handy as we work towards re-arranging the PTE bits in the later patches. Reviewed-by: Aneesh Kumar K.V Signed-off-by: Ram Pai --- arch/powerpc/include/asm/book3s/64/h

[PATCH 7/7] powerpc: use helper functions to get and set hash slots

2017-07-30 Thread Ram Pai
replace redundant code in __hash_page_64K(), __hash_page_huge(), __hash_page_4K(), __hash_page_4K() and flush_hash_page() with helper functions pte_get_hash_gslot() and pte_set_hash_slot() Reviewed-by: Aneesh Kumar K.V Signed-off-by: Ram Pai --- arch/powerpc/mm/hash64_4k.c | 14 +

[RFC v7 00/25] powerpc: Memory Protection Keys

2017-07-30 Thread Ram Pai
Memory protection keys enable applications to protect its address space from inadvertent access from or corruption by itself. The overall idea: - A process allocates a key and associates it with an address range withinits address space. The process then can dyn

[RFC v7 01/25] powerpc: define an additional vma bit for protection keys.

2017-07-30 Thread Ram Pai
powerpc needs an additional vma bit to support 32 keys. Till the additional vma bit lands in include/linux/mm.h we have to define it in powerpc specific header file. This is needed to get pkeys working on power. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/pkeys.h | 18 ++

[RFC v7 02/25] powerpc: track allocation status of all pkeys

2017-07-30 Thread Ram Pai
Total 32 keys are available on power7 and above. However pkey 0,1 are reserved. So effectively we have 30 pkeys. On 4K kernels, we do not have 5 bits in the PTE to represent all the keys; we only have 3bits.Two of those keys are reserved; pkey 0 and pkey 1. So effectively we have 6 pkeys

[RFC v7 03/25] powerpc: helper function to read, write AMR, IAMR, UAMOR registers

2017-07-30 Thread Ram Pai
Implements helper functions to read and write the key related registers; AMR, IAMR, UAMOR. AMR register tracks the read,write permission of a key IAMR register tracks the execute permission of a key UAMOR register enables and disables a key Signed-off-by: Ram Pai --- arch/powerpc/include/asm/bo

[RFC v7 04/25] powerpc: helper functions to initialize AMR, IAMR and UAMOR registers

2017-07-30 Thread Ram Pai
Introduce helper functions that can initialize the bits in the AMR, IAMR and UAMOR register; the bits that correspond to the given pkey. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/pkeys.h |1 + arch/powerpc/mm/pkeys.c | 46 ++ 2 files

[RFC v7 05/25] powerpc: cleaup AMR, iAMR when a key is allocated or freed

2017-07-30 Thread Ram Pai
cleanup the bits corresponding to a key in the AMR, and IAMR register, when the key is newly allocated/activated or is freed. We dont want some residual bits cause the hardware enforce unintended behavior when the key is activated or freed. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/pke

[RFC v7 06/25] powerpc: implementation for arch_set_user_pkey_access()

2017-07-30 Thread Ram Pai
This patch provides the detailed implementation for a user to allocate a key and enable it in the hardware. It provides the plumbing, but it cannot be used till the system call is implemented. The next patch will do so. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/pkeys.h |9 +++

[RFC v7 07/25] powerpc: sys_pkey_alloc() and sys_pkey_free() system calls

2017-07-30 Thread Ram Pai
Finally this patch provides the ability for a process to allocate and free a protection key. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/systbl.h |2 ++ arch/powerpc/include/asm/unistd.h |4 +--- arch/powerpc/include/uapi/asm/unistd.h |2 ++ 3 files changed, 5 inser

[RFC v7 08/25] powerpc: ability to create execute-disabled pkeys

2017-07-30 Thread Ram Pai
powerpc has hardware support to disable execute on a pkey. This patch enables the ability to create execute-disabled keys. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/pkeys.h | 12 arch/powerpc/mm/pkeys.c |5 + 2 files changed, 17 insertions(+), 0 deletion

[RFC v7 09/25] powerpc: store and restore the pkey state across context switches

2017-07-30 Thread Ram Pai
Store and restore the AMR, IAMR and UAMOR register state of the task before scheduling out and after scheduling in, respectively. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/pkeys.h |5 + arch/powerpc/include/asm/processor.h |5 + arch/powerpc/kernel/process.c

[RFC v7 10/25] powerpc: introduce execute-only pkey

2017-07-30 Thread Ram Pai
This patch provides the implementation of execute-only pkey. The architecture-independent expects the ability to create and manage a special key which has execute-only permission. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/book3s/64/mmu.h |1 + arch/powerpc/include/asm/pkeys.h

[RFC v7 11/25] powerpc: ability to associate pkey to a vma

2017-07-30 Thread Ram Pai
arch-independent code expects the arch to map a pkey into the vma's protection bit setting. The patch provides that ability. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/mman.h |8 +++- arch/powerpc/include/asm/pkeys.h | 12 2 files changed, 19 insertions(+), 1

[RFC v7 12/25] powerpc: implementation for arch_override_mprotect_pkey()

2017-07-30 Thread Ram Pai
arch independent code calls arch_override_mprotect_pkey() to return a pkey that best matches the requested protection. This patch provides the implementation. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/mmu_context.h |5 +++ arch/powerpc/include/asm/pkeys.h | 17 ++-

[RFC v7 13/25] powerpc: map vma key-protection bits to pte key bits.

2017-07-30 Thread Ram Pai
map the key protection bits of the vma to the pkey bits in the PTE. The Pte bits used for pkey are 3,4,5,6 and 57. The first four bits are the same four bits that were freed up initially in this patch series. remember? :-) Without those four bits this patch would'nt be possible. BUT, O

[RFC v7 14/25] powerpc: sys_pkey_mprotect() system call

2017-07-30 Thread Ram Pai
Patch provides the ability for a process to associate a pkey with a address range. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/systbl.h |1 + arch/powerpc/include/asm/unistd.h |4 +--- arch/powerpc/include/uapi/asm/unistd.h |1 + 3 files changed, 3 insertions(+), 3

[RFC v7 15/25] powerpc: Program HPTE key protection bits

2017-07-30 Thread Ram Pai
Map the PTE protection key bits to the HPTE key protection bits, while creating HPTE entries. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/book3s/64/mmu-hash.h |5 + arch/powerpc/include/asm/mmu_context.h|6 ++ arch/powerpc/include/asm/pkeys.h | 13

[RFC v7 16/25] powerpc: helper to validate key-access permissions of a pte

2017-07-30 Thread Ram Pai
helper function that checks if the read/write/execute is allowed on the pte. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/book3s/64/pgtable.h |4 +++ arch/powerpc/include/asm/pkeys.h | 12 +++ arch/powerpc/mm/pkeys.c | 28 ++

[RFC v7 17/25] powerpc: check key protection for user page access

2017-07-30 Thread Ram Pai
Make sure that the kernel does not access user pages without checking their key-protection. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/book3s/64/pgtable.h | 14 ++ 1 files changed, 14 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h

[RFC v7 18/25] powerpc: Macro the mask used for checking DSI exception

2017-07-30 Thread Ram Pai
Replace the magic number used to check for DSI exception with a meaningful value. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/reg.h |7 ++- arch/powerpc/kernel/exceptions-64s.S |2 +- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/as

[RFC v7 19/25] powerpc: implementation for arch_vma_access_permitted()

2017-07-30 Thread Ram Pai
This patch provides the implementation for arch_vma_access_permitted(). Returns true if the requested access is allowed by pkey associated with the vma. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/mmu_context.h |5 +++- arch/powerpc/mm/pkeys.c| 43 ++

[RFC v7 20/25] powerpc: Handle exceptions caused by pkey violation

2017-07-30 Thread Ram Pai
Handle Data and Instruction exceptions caused by memory protection-key. The CPU will detect the key fault if the HPTE is already programmed with the key. However if the HPTE is not hashed, a key fault will not be detected by the hardware. The software will detect pkey violation in such a cas

[RFC v7 21/25] powerpc: capture AMR register content on pkey violation

2017-07-30 Thread Ram Pai
capture AMR register contents, and save it in paca whenever a pkey violation is detected. This value will be needed to deliver pkey-violation signal to the task. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/paca.h |3 +++ arch/powerpc/kernel/asm-offsets.c |5 + arch/powerpc

[RFC v7 22/25] powerpc: introduce get_pte_pkey() helper

2017-07-30 Thread Ram Pai
get_pte_pkey() helper returns the pkey associated with a address corresponding to a given mm_struct. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/book3s/64/mmu-hash.h |5 + arch/powerpc/mm/hash_utils_64.c | 25 + 2 files changed, 30 insertio

[RFC v7 23/25] powerpc: capture the violated protection key on fault

2017-07-30 Thread Ram Pai
Capture the protection key that got violated in paca. This value will be later used to inform the signal handler. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/paca.h |1 + arch/powerpc/kernel/asm-offsets.c |1 + arch/powerpc/mm/fault.c |8 3 files changed,

[RFC v7 24/25] powerpc: Deliver SEGV signal on pkey violation

2017-07-30 Thread Ram Pai
The value of the AMR register at the time of exception is made available in gp_regs[PT_AMR] of the siginfo. The value of the pkey, whose protection got violated, is made available in si_pkey field of the siginfo structure. Signed-off-by: Ram Pai --- arch/powerpc/include/uapi/asm/ptrace.h |1

[RFC v7 25/25] powerpc: Enable pkey subsystem

2017-07-30 Thread Ram Pai
PAPR defines 'ibm,processor-storage-keys' property. It exports two values.The first value indicates the number of data-access keys and the second indicates the number of instruction-access keys. Though this alludes that keys can be either data access or instructon access only, that is not the case

[PATCH v4 1/5] powerpc/lib/sstep: Add cmpb instruction emulation

2017-07-30 Thread Matt Brown
This patch adds emulation of the cmpb instruction, enabling xmon to emulate this instruction. Tested for correctness against the cmpb asm instruction on ppc64le. Signed-off-by: Matt Brown --- v2: - fixed opcode - fixed mask typecasting --- arch/powerpc/lib/sstep.c | 20 +

[PATCH v4 2/5] powerpc/lib/sstep: Add popcnt instruction emulation

2017-07-30 Thread Matt Brown
This adds emulations for the popcntb, popcntw, and popcntd instructions. Tested for correctness against the popcnt{b,w,d} instructions on ppc64le. Signed-off-by: Matt Brown --- v4: - change ifdef macro from __powerpc64__ to CONFIG_PPC64 - slight optimisations (now identic

[PATCH v4 3/5] powerpc/lib/sstep: Add bpermd instruction emulation

2017-07-30 Thread Matt Brown
This adds emulation for the bpermd instruction. Tested for correctness against the bpermd instruction on ppc64le. Signed-off-by: Matt Brown --- v4: - change ifdef macro from __powerpc64__ to CONFIG_PPC64 v2: - fixed opcode - added ifdef tags to do_bpermd func - fix

[PATCH v4 4/5] powerpc/lib/sstep: Add prty instruction emulation

2017-07-30 Thread Matt Brown
This adds emulation for the prtyw and prtyd instructions. Tested for logical correctness against the prtyw and prtyd instructions on ppc64le. Signed-off-by: Matt Brown --- v4: - use simpler xor method v3: - optimised using the Giles-Miller method of side-ways addition v2:

[PATCH v4 5/5] powerpc/lib/sstep: Add isel instruction emulation

2017-07-30 Thread Matt Brown
This adds emulation for the isel instruction. Tested for correctness against the isel instruction and its extended mnemonics (lt, gt, eq) on ppc64le. Signed-off-by: Matt Brown --- v4: - simplify if statement to ternary op (same as isel emulation in kernel/traps.c) v2: - fi

Re: [PATCH v4 1/5] powerpc/lib/sstep: Add cmpb instruction emulation

2017-07-30 Thread Cyril Bur
On Mon, 2017-07-31 at 10:58 +1000, Matt Brown wrote: > This patch adds emulation of the cmpb instruction, enabling xmon to > emulate this instruction. > Tested for correctness against the cmpb asm instruction on ppc64le. > > Signed-off-by: Matt Brown Reviewed-by: Cyril Bur > --- > v2: >

[PATCH V9 0/3] powernv : Add support for OPAL-OCC command/response interface

2017-07-30 Thread Shilpasri G Bhat
In P9, OCC (On-Chip-Controller) supports shared memory based commad-response interface. Within the shared memory there is an OPAL command buffer and OCC response buffer that can be used to send inband commands to OCC. The following commands are supported: 1) Set system powercap 2) Set CPU-GPU powe

[PATCH V9 1/3] powernv: powercap: Add support for powercap framework

2017-07-30 Thread Shilpasri G Bhat
Adds a generic powercap framework to change the system powercap inband through OPAL-OCC command/response interface. Signed-off-by: Shilpasri G Bhat --- Changes from V8: - Use __pa() while passing pointer in opal call - Use mutex_lock_interruptible() - Fix error codes returned to user - Allocate a

[PATCH V9 2/3] powernv: Add support to set power-shifting-ratio

2017-07-30 Thread Shilpasri G Bhat
This patch adds support to set power-shifting-ratio which hints the firmware how to distribute/throttle power between different entities in a system (e.g CPU v/s GPU). This ratio is used by OCC for power capping algorithm. Signed-off-by: Shilpasri G Bhat --- Changes from V8: - Use __pa() while pa

[PATCH V9 3/3] powernv: Add support to clear sensor groups data

2017-07-30 Thread Shilpasri G Bhat
Adds support for clearing different sensor groups. OCC inband sensor groups like CSM, Profiler, Job Scheduler can be cleared using this driver. The min/max of all sensors belonging to these sensor groups will be cleared. Signed-off-by: Shilpasri G Bhat --- Changes from V8: - Use mutex_lock_interr

Re: [PATCH v4 3/5] powerpc/lib/sstep: Add bpermd instruction emulation

2017-07-30 Thread Cyril Bur
On Mon, 2017-07-31 at 10:58 +1000, Matt Brown wrote: > This adds emulation for the bpermd instruction. > Tested for correctness against the bpermd instruction on ppc64le. > > Signed-off-by: Matt Brown Reviewed-by: Cyril Bur > --- > v4: > - change ifdef macro from __powerpc64__ to CONFIG_

Re: [PATCH v4 4/5] powerpc/lib/sstep: Add prty instruction emulation

2017-07-30 Thread Cyril Bur
On Mon, 2017-07-31 at 10:58 +1000, Matt Brown wrote: > This adds emulation for the prtyw and prtyd instructions. > Tested for logical correctness against the prtyw and prtyd instructions > on ppc64le. > > Signed-off-by: Matt Brown Reviewed-by: Cyril Bur > --- > v4: > - use simpler xor me

Re: [PATCH v4 5/5] powerpc/lib/sstep: Add isel instruction emulation

2017-07-30 Thread Cyril Bur
On Mon, 2017-07-31 at 10:58 +1000, Matt Brown wrote: > This adds emulation for the isel instruction. > Tested for correctness against the isel instruction and its extended > mnemonics (lt, gt, eq) on ppc64le. > > Signed-off-by: Matt Brown Reviewed-by: Cyril Bur > --- > v4: > - simplify i

Re: [PATCH v4 2/5] powerpc/lib/sstep: Add popcnt instruction emulation

2017-07-30 Thread Cyril Bur
On Mon, 2017-07-31 at 10:58 +1000, Matt Brown wrote: > This adds emulations for the popcntb, popcntw, and popcntd instructions. > Tested for correctness against the popcnt{b,w,d} instructions on ppc64le. > > Signed-off-by: Matt Brown Unlike the rest of this series, it isn't immediately clear tha

Re: [PATCH V9 1/3] powernv: powercap: Add support for powercap framework

2017-07-30 Thread Cyril Bur
On Mon, 2017-07-31 at 07:54 +0530, Shilpasri G Bhat wrote: > Adds a generic powercap framework to change the system powercap > inband through OPAL-OCC command/response interface. > > Signed-off-by: Shilpasri G Bhat > --- > Changes from V8: > - Use __pa() while passing pointer in opal call > - Use

Re: [PATCH 1/2] KVM: PPC: e500: fix some NULL dereferences on error

2017-07-30 Thread Paul Mackerras
On Thu, Jul 13, 2017 at 10:38:29AM +0300, Dan Carpenter wrote: > There are some error paths in kvmppc_core_vcpu_create_e500() where we > forget to set the error code. It means that we return ERR_PTR(0) which > is NULL and it results in a NULL pointer dereference in the caller. > > Signed-off-by:

Re: powerpc/tm: fix TM SPRs in code dump file

2017-07-30 Thread Michael Ellerman
On Wed, 2017-07-19 at 05:44:13 UTC, Gustavo Romero wrote: > Currently flush_tmregs_to_thread() does not update accordingly the thread > structures from live state before a core dump rendering wrong values of > THFAR, TFIAR, and TEXASR in core dump files. > > That commit fixes it by copying from li

Re: powerpc/powernv/pci: Return failure for some uses of dma_set_mask()

2017-07-30 Thread Michael Ellerman
On Wed, 2017-07-26 at 05:26:40 UTC, Alistair Popple wrote: > Commit 8e3f1b1d8255 ("powerpc/powernv/pci: Enable 64-bit devices to access > >4GB DMA space") introduced the ability for PCI device drivers to request a > DMA mask between 64 and 32 bits and actually get a mask greater than > 32-bits. How

Re: powerpc/boot: Fix 64-bit boot wrapper build with non-biarch compiler

2017-07-30 Thread Michael Ellerman
On Wed, 2017-07-26 at 13:19:04 UTC, Michael Ellerman wrote: > Historically the boot wrapper was always built 32-bit big endian, even > for 64-bit kernels. That was because old firmwares didn't necessarily > support booting a 64-bit image. Because of that arch/powerpc/boot/Makefile > uses CROSS32CC

Re: powerpc/smp: Call smp_ops->setup_cpu() directly on the boot CPU

2017-07-30 Thread Michael Ellerman
On Thu, 2017-07-27 at 13:23:37 UTC, Michael Ellerman wrote: > In smp_cpus_done() we need to call smp_ops->setup_cpu() for the boot > CPU, which means it has to run *on* the boot CPU. > > In the past we ensured it ran on the boot CPU by changing the CPU > affinity mask of current directly. That was