Josh Poimboeuf writes:
> On Tue, Nov 07, 2017 at 12:31:05PM +0100, Torsten Duwe wrote:
>> On Tue, Nov 07, 2017 at 07:34:29PM +1100, Michael Ellerman wrote:
>> > > So, just brainstorming a bit, here are the possible solutions I can
>> > > think of:
>> > >
>> > > a) Create a special klp stub for suc
Sukadev Bhattiprolu writes:
> diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
> index d861fcd..cb5f108 100644
> --- a/arch/powerpc/kernel/process.c
> +++ b/arch/powerpc/kernel/process.c
> @@ -1234,17 +1234,17 @@ struct task_struct *__switch_to(struct task_struct
> *pre
Josh Poimboeuf wrote:
On Tue, Nov 07, 2017 at 12:31:05PM +0100, Torsten Duwe wrote:
On Tue, Nov 07, 2017 at 07:34:29PM +1100, Michael Ellerman wrote:
> > So, just brainstorming a bit, here are the possible solutions I can
> > think of:
> >
> > a) Create a special klp stub for such calls (as in K
Sukadev Bhattiprolu writes:
> diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
> index 37ed60b..d861fcd 100644
> --- a/arch/powerpc/kernel/process.c
> +++ b/arch/powerpc/kernel/process.c
> @@ -1120,6 +1120,13 @@ static inline void restore_sprs(struct thread_struct
> *ol
IMC_MAX_PMU is used for static storage (per_nest_pmu_arr) which holds
nest pmu information. Current value for the macro is 32 based on
the initial number of nest pmu units supported by the nest microcode.
Currently 29 nest units are enabled based on the system configuration.
But going forward, micr
Add ldbar spr to sysfs. The spr holds thread level In-Memory Collection (IMC)
counter configuration data. Exposing this will help to understand the current
configuration of thread-level counters in the system.
Primarily, Bit 0 of ldbar says whether the counters are enabled o
Hi,
Kindly ignore this patch, I send a wrong version. Will send out the
right one.
Thanks,
Anju
On Thursday 09 November 2017 05:43 PM, Anju T Sudhakar wrote:
Add ldbar spr to sysfs. The spr holds thread level In-Memory Collection (IMC)
counter configuration data. Exposing this will help t
Add ldbar spr to sysfs. The spr holds thread level In-Memory Collection (IMC)
counter configuration data. Exposing this will help to understand the current
configuration of thread-level counters in the system.
Primarily, Bit 0 of ldbar says whether the counters are enabled o
SR-IOV can now be enabled in PowerNV platforms and Pseries
platforms. Therefore, the appropriate calls were moved to
machine dependent code instead of definition at compile time.
Signed-off-by: Bryant G. Ly
Signed-off-by: Juan J. Alvarez
---
arch/powerpc/include/asm/machdep.h | 7 +++
v1 - Initial patch
v2 - Addressed Bjorn's comment on creating a highly platform
dependent global exported symbol.
v3 - Based patch off linux-ppc/master
v4 - Using the sriov-drivers_autoprobe mechanism per Bjorn's request
v5 - Fixed comments and commit message
Bryant G. Ly (3):
powerpc/kerne
Add calls for PSeries platform to configure/deconfigure
SR-IOV.
Signed-off-by: Bryant G. Ly
Signed-off-by: Juan J. Alvarez
---
arch/powerpc/platforms/pseries/eeh_pseries.c | 24 +++
arch/powerpc/platforms/pseries/pci.c | 29
2 files chang
Add a pci_vf_drivers_autoprobe() interface. Setting autoprobe to false
on the PF prevents drivers from binding to VFs when they are enabled.
Signed-off-by: Bryant G. Ly
Signed-off-by: Juan J. Alvarez
Acked-by: Bjorn Helgaas
---
arch/powerpc/platforms/pseries/pci.c | 2 ++
drivers/pci/iov.c
On Thu, Nov 09, 2017 at 04:49:05PM +0530, Naveen N. Rao wrote:
> > > > > d) Have kpatch-build do some other kind of transformation? For
> > > > > example,
> > > > >maybe it could generate klp stubs which the callee calls into.
> > > > > Each
> > > > >klp stub could then do a proper glob
On Tuesday, November 07, 2017 03:05:05 PM Geert Uytterhoeven wrote:
> Dan's static analysis says:
>
> drivers/video/fbdev/controlfb.c:560 control_setup()
> error: buffer overflow 'control_mac_modes' 20 <= 21
>
> Indeed, control_mac_modes[] has only 20 elements, while VMODE_MAX is 22,
> wh
On Tue, 7 Nov 2017 17:01:58 +0300
"Kirill A. Shutemov" wrote:
> On Tue, Nov 07, 2017 at 07:15:58PM +0530, Aneesh Kumar K.V wrote:
> >
> > >
> > > If it is decided to keep these kind of heuristics, can we get just a
> > > small but reasonably precise description of each change to the
> > > int
After clarifying the intended semantics, the previous patch series
went the wrong way with MAP_FIXED handling, so I fixed that.
This series is not quite ready for merge. I prefer to see what x86
does exactly because it also has some fixes to make. But time is
becoming short before 4.14, so I'd lik
When allocating VA space with a hint that crosses 128TB, the SLB addr_limit
variable is not expanded if addr is not > 128TB, but the slice allocation
looks at task_size, which is 512TB. This results in slice_check_fit()
incorrectly succeeding because the slice_count truncates off bit 128 of the
req
Hash unconditionally resets the addr_limit to default (128TB) when
the mm context is initialised. If a process has > 128TB mappings when
it forks, the child will not get the 512TB addr_limit, so accesses to
valid > 128TB mappings will fail in the child.
Fix this by only resetting the addr_limit to
While mapping hints with a length that cross 128TB are disallowed,
MAP_FIXED allocations that cross 128TB are allowed. These are failing
on hash (on radix they succeed). Add an additional case for fixed
mappings to expand the addr_limit when crossing 128TB.
Cc: "Aneesh Kumar K.V"
Fixes: f4ea6dcb0
Radix VA space allocations test addresses against mm->task_size which is
512TB, even in cases where the intention is to limit allocation to below
128TB.
This results in mmap with a hint address below 128TB but address + length
above 128TB succeeding when it should fail (as hash does after the
prev
Radix keeps no meaningful state in addr_limit, so remove it from
radix code and rename to slb_addr_limit to make it clear it applies
to hash only.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 2 +-
arch/powerpc/include/asm/book3s/64/mmu.h | 2 +-
arch
Hi Ram,
On Mon, Nov 06, 2017 at 12:57:36AM -0800, Ram Pai wrote:
> @@ -206,12 +209,14 @@ void signal_handler(int signum, siginfo_t *si, void
> *vucontext)
>
> trapno = uctxt->uc_mcontext.gregs[REG_TRAPNO];
> ip = uctxt->uc_mcontext.gregs[REG_IP_IDX];
> - fpregset = uctxt->uc_mco
This patch implements and enables VDP support for the ibmvnic driver.
Moreover, it includes the implementation of suitable structs, signal
transmission/handling and functions which allows the retrival of firmware
information from the ibmvnic card through the ethtool command.
Signed-off-by: Desne
Em Wed, Nov 08, 2017 at 12:19:38PM -0800, Sukadev Bhattiprolu escreveu:
> Hi Arnaldo,
>
> Please pull an update to the JSON files for POWER9 PMU events.
>
> The following changes since commit 148b43a3540bf25875bb5ab695a446950dc8d559:
>
> tools headers: Synchronize kernel ABI headers wrt SPDX t
On 11/09/2017 11:00 AM, Desnes Augusto Nunes do Rosario wrote:
This patch implements and enables VDP support for the ibmvnic driver.
Moreover, it includes the implementation of suitable structs, signal
transmission/handling and functions which allows the retrival of firmware
information fro
On Fri, Nov 10, 2017 at 04:15:26AM +1100, Nicholas Piggin wrote:
> So these semantics are what we're going with? Anything that does mmap() is
> guaranteed of getting a 47-bit pointer and it can use the top 17 bits for
> itself? Is intended to be cross-platform or just x86 and power specific?
It is
On 11/09/2017 01:00 PM, Desnes Augusto Nunes do Rosario wrote:
> This patch implements and enables VDP support for the ibmvnic driver.
> Moreover, it includes the implementation of suitable structs, signal
> transmission/handling and functions which allows the retrival of firmware
> information f
Anju T Sudhakar writes:
> IMC_MAX_PMU is used for static storage (per_nest_pmu_arr) which holds
> nest pmu information. Current value for the macro is 32 based on
> the initial number of nest pmu units supported by the nest microcode.
> Currently 29 nest units are enabled based on the system conf
On 10/25/2017 01:27 PM, Guilherme G. Piccoli wrote:
> During a kdump kernel boot in PowerPC, we request a reset of the PHBs
> to the FW. It makes sense, since if we are booting a kdump kernel it
> means we had some trouble before and we cannot rely in the adapters'
> health; they could be in a bad
On Mon, Nov 06, 2017 at 05:22:18PM -0800, Ram Pai wrote:
> On Mon, Nov 06, 2017 at 10:28:41PM +0100, Florian Weimer wrote:
> > * Ram Pai:
> >
> > > Testing:
> > > ---
> > > This patch series has passed all the protection key
> > > tests available in the selftest directory.The
> > > tests are u
On Thu, Nov 09, 2017 at 04:47:15PM -0200, Breno Leitao wrote:
> Hi Ram,
>
> On Mon, Nov 06, 2017 at 12:57:36AM -0800, Ram Pai wrote:
> > @@ -206,12 +209,14 @@ void signal_handler(int signum, siginfo_t *si, void
> > *vucontext)
> >
> > trapno = uctxt->uc_mcontext.gregs[REG_TRAPNO];
> > i
Hello,
A reworked version. There is a new dereference_symbol_descriptor()
function now, where "the magic happens", so I don't touch kallsyms_lookup()
and module_address_lookup() anymore.
All Ack-s/Tested-by-s were dropped, since the patch set has been
reworked. I'm kindly
There are two format specifiers to print out a pointer in symbolic
format: '%pS/%ps' and '%pF/%pf'. On most architectures, the two
mean exactly the same thing, but some architectures (ia64, ppc64,
parisc64) use an indirect pointer for C function pointers, where
the function pointer points to a func
We are moving towards separate kernel and module function descriptor
dereference callbacks. This patch enables it for IA64.
For pointers that belong to the kernel
- Added __start_opd and __end_opd pointers, to track the kernel
.opd section address range;
- Added dereference_kernel_function_d
We are moving towards separate kernel and module function descriptor
dereference callbacks. This patch enables it for powerpc64.
For pointers that belong to the kernel
- Added __start_opd and __end_opd pointers, to track the kernel
.opd section address range;
- Added dereference_kernel_funct
We are moving towards separate kernel and module function descriptor
dereference callbacks. This patch enables it for parisc64.
For pointers that belong to the kernel
- Added __start_opd and __end_opd pointers, to track the kernel
.opd section address range;
- Added dereference_kernel_functi
dereference_symbol_descriptor() invokes appropriate ARCH specific
function descriptor dereference callbacks:
- dereference_kernel_function_descriptor() if the pointer is a
kernel symbol;
- dereference_module_function_descriptor() if the pointer is a
module symbol.
This is the last step needed
We deprecated '%pF/%pf' printk specifiers, since '%pS/%ps' is now smart
enough to handle function pointer dereference on platforms where such
dereference is required.
Signed-off-by: Sergey Senozhatsky
Signed-off-by: Joe Perches
Cc: Andy Whitcroft
Reviewed-by: Petr Mladek
---
scripts/checkpatc
On Friday 10 November 2017 02:32 AM, Michael Ellerman wrote:
Anju T Sudhakar writes:
IMC_MAX_PMU is used for static storage (per_nest_pmu_arr) which holds
nest pmu information. Current value for the macro is 32 based on
the initial number of nest pmu units supported by the nest microcode.
Cu
On Thu, 9 Nov 2017 11:44:21 -0800
Matthew Wilcox wrote:
> On Fri, Nov 10, 2017 at 04:15:26AM +1100, Nicholas Piggin wrote:
> > So these semantics are what we're going with? Anything that does mmap() is
> > guaranteed of getting a 47-bit pointer and it can use the top 17 bits for
> > itself? Is in
On Fri, Nov 10, 2017 at 2:19 AM, Josh Poimboeuf wrote:
> On Thu, Nov 09, 2017 at 04:49:05PM +0530, Naveen N. Rao wrote:
>> > > > > d) Have kpatch-build do some other kind of transformation? For
>> > > > > example,
>> > > > >maybe it could generate klp stubs which the callee calls into.
>>
Depend on http://patchwork.ozlabs.org/patch/815382/
Bao Xiaowei (3):
ARMv8: dts: ls1046a: add the property of IB and OB
ARMv8: layerscape: add the pcie ep function support
ARMv8: pcie: make the DWC EP driver support for layerscape
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 6 ++
dr
Add the property of inbound and outbound windows number for ep
driver.
Signed-off-by: Bao Xiaowei
Acked-by: Minghuan Lian
---
v2:
- no change
v3:
- modify the commit message
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/
Add the pcie controller ep function support of layerscape base on
pcie ep framework.
Signed-off-by: Bao Xiaowei
---
v2:
- fix the ioremap function used but no ioumap issue
- optimize the code structure
- add code comments
v3:
- fix the msi outband window request failed issue
drivers
Layerscape pcie controllers support RC or EP mode, Add the EP mode
support in Kconfig, the driver will support both RC and EP mode, and
the driver is able to judge the pcie controllers work on RC or EP mode.
Signed-off-by: Bao Xiaowei
Acked-by: Minghuan Lian
---
v2:
no change
v3:
no change
On Fri, Nov 10, 2017 at 01:06:25PM +1100, Balbir Singh wrote:
> On Fri, Nov 10, 2017 at 2:19 AM, Josh Poimboeuf wrote:
> > FWIW, I think it won't matter anyway. I'm currently pursuing the option
> > of inserting nops after local calls, because it has less runtime
> > complexity than using a stub.
> -Original Message-
> From: Bao Xiaowei [mailto:xiaowei@nxp.com]
> Sent: Friday, November 10, 2017 10:49 AM
> To: robh...@kernel.org; mark.rutl...@arm.com; catalin.mari...@arm.com;
> will.dea...@arm.com; bhelg...@google.com; shawn...@kernel.org;
> Madalin-cristian Bucur ; Sumit Garg
Depend on http://patchwork.ozlabs.org/patch/815382/
Bao Xiaowei (3):
ARMv8: dts: ls1046a: add the property of IB and OB
ARMv8: layerscape: add the pcie ep function support
ARMv8: pcie: make the DWC EP driver support for layerscape
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 6 ++
dr
Add the property of inbound and outbound windows number for ep
driver.
Signed-off-by: Bao Xiaowei
Acked-by: Minghuan Lian
---
v2:
- no change
v3:
- modify the commit message
v4:
- no change
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff -
Add the pcie controller ep function support of layerscape base on
pcie ep framework.
Signed-off-by: Bao Xiaowei
---
v2:
- fix the ioremap function used but no ioumap issue
- optimize the code structure
- add code comments
v3:
- fix the msi outband window request failed issue
v4:
- optimiz
Layerscape pcie controllers support RC or EP mode, Add the EP mode
support in Kconfig, the driver will support both RC and EP mode, and
the driver is able to judge the pcie controllers work on RC or EP mode.
Signed-off-by: Bao Xiaowei
Acked-by: Minghuan Lian
---
v2:
no change
v3:
no change
"Naveen N. Rao" writes:
> On 2017/06/19 03:21PM, Aneesh Kumar K.V wrote:
>> > @@ -1445,8 +1446,8 @@ do_hash_page:
>> > handle_page_fault:
>> >andis. r0,r4,DSISR_DABRMATCH@h
>> >bne-handle_dabr_fault
>> > - ld r4,_DAR(r1)
>> > - ld r5,_DSISR(r1)
>> > + mr r5,r4
>> >
While computing slice mask for the free area we need make sure we only search
in the addr limit applicable for this mmap. We update the slb_addr_limit
after we request for a mmap above 128TB. But the following mmap request
with hint addr below 128TB should still limit its search to below 128TB. ie.
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