From: yuan linyu
then all arch boot parameter handled in the same way in start_kernel()
Signed-off-by: yuan linyu
---
v2:
fix kbuild issue of parisc
arch/alpha/kernel/setup.c | 4 +---
arch/arc/kernel/setup.c| 5 +
arch/arm/kernel/setup.c| 7 +--
Ram Pai writes:
> On Wed, Apr 04, 2018 at 06:41:01PM -0300, Thiago Jung Bauermann wrote:
>>
>> Hello Ram,
>>
>> Ram Pai writes:
>>
>> > Applications need the ability to associate an address-range with some
>> > key and latter revert to its initial default key. Pkey-0 comes close to
>> > providi
__printf is useful to verify format and arguments. Fix arg mismatch
reported by gcc, remove the following warnings (with W=1):
arch/powerpc/kernel/prom_init.c:1467:31: error: format ‘%x’ expects argument
of type ‘unsigned int’, but argument 2 has type ‘long unsigned int’
[-Werror=format=]
ar
On Fri, Apr 6, 2018 at 5:33 PM, LEROY Christophe
wrote:
> Mathieu Malaterre a écrit :
>
>> Add gcc attribute unused for `l` variable, replace `path` variable
>> directly
>> with prom_scratch. Fix warnings treated as errors with W=1:
>>
>> arch/powerpc/kernel/prom_init.c:607:6: error: variable ‘
On Thu, Apr 5, 2018 at 10:21 PM, Oliver O'Halloran wrote:
> We want to be able to cross reference the region and bus devices
> with the device tree node that they were spawned from. libNVDIMM
> handles creating the actual devices for these internally, so we
> need to pass in a pointer to the relev
On Wed, Apr 04, 2018 at 06:41:01PM -0300, Thiago Jung Bauermann wrote:
>
> Hello Ram,
>
> Ram Pai writes:
>
> > Applications need the ability to associate an address-range with some
> > key and latter revert to its initial default key. Pkey-0 comes close to
> > providing this function but falls
On Fri, Apr 06, 2018 at 06:22:11PM +0100, Mark Rutland wrote:
> Digging a bit, I also thing that our ct_user_exit and ct_user_enter
> usage is on dodgy ground today.
>
> For example, in el0_dbg we call do_debug_exception() *before* calling
> ct_user_exit. Which I believe means we'd use RCU while s
On Fri, Apr 06, 2018 at 06:30:50PM +0100, James Morse wrote:
> Hi Mark,
>
> On 06/04/18 18:22, Mark Rutland wrote:
> > Digging a bit, I also thing that our ct_user_exit and ct_user_enter
> > usage is on dodgy ground today.
>
> [...]
>
> > I think similar applies to SDEI; we don't negotiate with
Hi Mark,
On 06/04/18 18:22, Mark Rutland wrote:
> Digging a bit, I also thing that our ct_user_exit and ct_user_enter
> usage is on dodgy ground today.
[...]
> I think similar applies to SDEI; we don't negotiate with RCU prior to
> invoking handlers, which might need RCU.
The arch code's __sdei
On Fri, Apr 06, 2018 at 07:54:02PM +0300, Yury Norov wrote:
> In general, kick_all_cpus_sync() is needed to switch contexts. But exit from
> userspace is anyway the switch of context. And while in userspace, we cannot
> do something wrong on kernel side. For me it means that we can safely drop
> IP
Acked-by: Dale Farnsworth
On Thu, Apr 5, 2018 at 6:17 PM, Mark Greer wrote:
> There are no longer any platforms that use Marvell's mv64x60's i2c
> controller so remove its driver.
>
> Signed-off-by: Mark Greer
> ---
> arch/powerpc/boot/Makefile | 2 +-
> arch/powerpc/boot/mv64x60_i2c.c
Acked-by: Remi Machet
-Original Message-
From: Mark Greer
Sent: Thursday, April 5, 2018 9:17 PM
To: Benjamin Herrenschmidt ; Paul Mackerras
; Michael Ellerman
Cc: Remi Machet ; Dale Farnsworth ;
linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org; Mark Greer
Subject: [PATCH 1/
This adds a test to verify proper functioning of the rfi flush
capability implemented to mitigate meltdown. The test works by measuring
the number of L1d cache misses encountered while loading data from
memory. Across a system call, since the L1d cache is flushed when
rfi_flush is enabled, the numb
On Fri, Apr 06, 2018 at 11:02:56AM +0100, James Morse wrote:
> Hi Yury,
>
> An ISB at the beginning of the vectors? This is odd, taking an IRQ to get in
> here would be a context-synchronization-event too, so the ISB is superfluous.
>
> The ARM-ARM has a list of 'Context-Synchronization event's
> I thought the cache-aligned might make sense, since usually we'd expect the
> failure to be at a cache-line level, but our copy_tofrom_user does accurate
> accounting
That's one of the wrinkles in the current x86 memcpy_mcsafe(). It starts by
checking alignment of the source address, and moves a
Mathieu Malaterre a écrit :
Add gcc attribute unused for `l` variable, replace `path` variable directly
with prom_scratch. Fix warnings treated as errors with W=1:
arch/powerpc/kernel/prom_init.c:607:6: error: variable ‘l’ set but
not used [-Werror=unused-but-set-variable]
arch/powerpc/k
On 03/04/2018 02:11, David Rientjes wrote:
> On Tue, 13 Mar 2018, Laurent Dufour wrote:
>
>> This change is inspired by the Peter's proposal patch [1] which was
>> protecting the VMA using SRCU. Unfortunately, SRCU is not scaling well in
>> that particular case, and it is introducing major perfo
From: yuan linyu
then all arch boot parameter handled in the same way in start_kernel()
Signed-off-by: yuan linyu
---
arch/alpha/kernel/setup.c | 4 +---
arch/arc/kernel/setup.c| 5 +
arch/arm/kernel/setup.c| 7 +--
arch/arm64/kernel/setup.c
On Thu, Apr 05, 2018 at 08:17:58PM +0300, Yury Norov wrote:
> This series enables delaying of kernel memory synchronization
> for CPUs running in extended quiescent state (EQS) till the exit
> of that state.
>
> ARM64 uses IPI mechanism to notify all cores in SMP system that
> kernel text is chan
On Thu, Apr 05, 2018 at 08:17:56PM +0300, Yury Norov wrote:
> Kernel text patching framework relies on IPI to ensure that other
> SMP cores observe the change. Target core calls isb() in IPI handler
> path, but not at the beginning of el1_irq entry. There's a chance
> that modified instruction will
Hi Yury,
On 05/04/18 18:17, Yury Norov wrote:
> This series enables delaying of kernel memory synchronization
> for CPUs running in extended quiescent state (EQS) till the exit
> of that state.
>
> ARM64 uses IPI mechanism to notify all cores in SMP system that
> kernel text is changed; and IPI
Hi Yury,
On 05/04/18 18:17, Yury Norov wrote:
> Kernel text patching framework relies on IPI to ensure that other
> SMP cores observe the change. Target core calls isb() in IPI handler
(Odd, if its just to synchronize the CPU, taking the IPI should be enough).
> path, but not at the beginning o
On Fri, Apr 6, 2018 at 11:26 AM, Nicholas Piggin wrote:
> On Thu, 05 Apr 2018 16:40:26 -0400
> Jeff Moyer wrote:
>
>> Nicholas Piggin writes:
>>
>> > On Thu, 5 Apr 2018 15:53:07 +1000
>> > Balbir Singh wrote:
>> >> I'm thinking about it, I wonder what "bytes remaining" mean in pmem
>> >> conte
On Fri, 2018-04-06 at 00:16 -0700, Christoph Hellwig wrote:
> On Fri, Apr 06, 2018 at 08:23:10AM +0530, Anshuman Khandual wrote:
> > On 04/06/2018 02:48 AM, Benjamin Herrenschmidt wrote:
> > > On Thu, 2018-04-05 at 21:34 +0300, Michael S. Tsirkin wrote:
> > > > > In this specific case, because that
On Fri, Apr 06, 2018 at 08:23:10AM +0530, Anshuman Khandual wrote:
> On 04/06/2018 02:48 AM, Benjamin Herrenschmidt wrote:
> > On Thu, 2018-04-05 at 21:34 +0300, Michael S. Tsirkin wrote:
> >>> In this specific case, because that would make qemu expect an iommu,
> >>> and there isn't one.
> >>
> >>
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