On Wed, 2018-05-02 at 16:34 +1000, Sam Bobroff wrote:
> The current failure message includes the number of failures that have
> occurred in the last hour (for a device) but it does not indicate
> how many failures will be tolerated before the device is permanently
> disabled.
>
> Include the
On Fri, 04 May 2018 15:16:37 +1000
Michael Ellerman wrote:
> Nicholas Piggin writes:
>
> > Use the more refined and tested event polling loop from opal_put_chars
> > as the fallback console flush in the opal-kmsg path. This loop is used
> > by the
Nicholas Piggin writes:
> Use the more refined and tested event polling loop from opal_put_chars
> as the fallback console flush in the opal-kmsg path. This loop is used
> by the console driver today, whereas the opal-kmsg fallback is not
> likely to have been used for years.
Sam Bobroff writes:
> diff --git a/arch/powerpc/kernel/eeh_driver.c
> b/arch/powerpc/kernel/eeh_driver.c
> index f63a01d336ee..b3edd0df04b8 100644
> --- a/arch/powerpc/kernel/eeh_driver.c
> +++ b/arch/powerpc/kernel/eeh_driver.c
> @@ -210,6 +206,23 @@ static void
Sam Bobroff writes:
> diff --git a/arch/powerpc/kernel/eeh_driver.c
> b/arch/powerpc/kernel/eeh_driver.c
> index 188d15c4fe3a..f33dd68a9ca2 100644
> --- a/arch/powerpc/kernel/eeh_driver.c
> +++ b/arch/powerpc/kernel/eeh_driver.c
> @@ -39,6 +39,29 @@ struct eeh_rmv_data {
Sam Bobroff writes:
> Correct two cases where eeh_pcid_get() is used to reference the driver's
> module but the reference is dropped before the driver pointer is used.
>
> In eeh_rmv_device() also refactor a little so that only two calls to
> eeh_pcid_put() are needed,
Sam Bobroff writes:
> Add a single log line at the end of successful EEH recovery, so that
> it's clear that event processing has finished.
>
> Signed-off-by: Sam Bobroff
> ---
> arch/powerpc/kernel/eeh_driver.c | 1 +
> 1 file changed, 1
Stewart Smith writes:
...
>
> Slightly stupid question: should we be disabling these here or should
> Linux be better and deciding what states to use?
>
> I'm inclined to say this is a Linux problem as it should make the
> decision of what hardware feature to used
Michal Suchánek writes:
> On Tue, 01 May 2018 21:11:06 +1000
> Michael Ellerman wrote:
>> Michal Suchánek writes:
>> > On Tue, 24 Apr 2018 14:15:57 +1000
>> > Michael Ellerman wrote:
>> >
>> >> From: Michal
On Wed, May 2, 2018 at 3:20 PM, Michael Ellerman wrote:
> From: Al Viro
Maybe add:
Link: https://github.com/linuxppc/linux/issues/131
For the series: compile, build without error (W=1), and works on my system.
> Signed-off-by: Al Viro
On Thu, May 03, 2018 at 02:25:18PM +0200, Laurent Dufour wrote:
> On 23/04/2018 09:42, Minchan Kim wrote:
> > On Tue, Apr 17, 2018 at 04:33:18PM +0200, Laurent Dufour wrote:
> >> When handling speculative page fault, the vma->vm_flags and
> >> vma->vm_page_prot fields are read once the page table
Alexei Starovoitov wrote:
On 3/1/18 12:51 AM, Naveen N. Rao wrote:
Daniel Borkmann wrote:
Worst case if there's nothing better, potentially what one could do in
bpf_prog_get_info_by_fd() is to dump an array of full addresses and
have the imm part as the index pointing to one of them, just
On 30/04/2018 20:43, Punit Agrawal wrote:
> Hi Laurent,
>
> I am looking to add support for speculative page fault handling to
> arm64 (effectively porting this patch) and had a few questions.
> Apologies if I've missed an obvious explanation for my queries. I'm
> jumping in bit late to the
On 01/05/2018 15:16, Minchan Kim wrote:
> On Mon, Apr 30, 2018 at 05:14:27PM +0200, Laurent Dufour wrote:
>>
>>
>> On 23/04/2018 08:42, Minchan Kim wrote:
>>> On Tue, Apr 17, 2018 at 04:33:14PM +0200, Laurent Dufour wrote:
From: Peter Zijlstra
Wrap the VMA
Em Fri, Sep 22, 2017 at 01:20:43PM +0200, Christophe Leroy escreveu:
> After update of kernel, perf tool doesn't run anymore on my
> 32MB RAM powerpc board, but still runs on a 128MB RAM board:
Cleaning up my inbox, found this one, simple enough, still applies,
applied.
These all needs to be
Sam Bobroff writes:
> diff --git a/arch/powerpc/kernel/eeh_driver.c
> b/arch/powerpc/kernel/eeh_driver.c
> index eb4feee81ff4..1c4336dcf9f5 100644
> --- a/arch/powerpc/kernel/eeh_driver.c
> +++ b/arch/powerpc/kernel/eeh_driver.c
> @@ -54,6 +54,25 @@ static int
On Tue, 24 Apr 2018 14:15:56 +1000
Michael Ellerman wrote:
> From: Michal Suchanek
>
> Note that unlike RFI which is patched only in kernel the nospec state
> reflects settings at the time the module was loaded.
>
> Iterating all modules and re-patching
Darren Stevens writes:
> diff --git a/arch/powerpc/platforms/pasemi/setup.c
> b/arch/powerpc/platforms/pasemi/setup.c
> index c4a3e93..c583c17 100644
> --- a/arch/powerpc/platforms/pasemi/setup.c
> +++ b/arch/powerpc/platforms/pasemi/setup.c
> @@ -183,6 +184,99 @@
Darren Stevens writes:
> diff --git a/arch/powerpc/platforms/pasemi/setup.c
> b/arch/powerpc/platforms/pasemi/setup.c
> index c583c17..8d3664f 100644
> --- a/arch/powerpc/platforms/pasemi/setup.c
> +++ b/arch/powerpc/platforms/pasemi/setup.c
> @@ -73,6 +73,19 @@ static
Hi Darren,
Thanks for the patch, sorry it's taken so long to get merged.
Darren Stevens writes:
> The A-Eon Amigaone X1000's Nemo motherboard has an AMD SB600
> connected to one of the PCI-e root ports on its PaSemi
> Pwrficient 1628M SoC. Normally the SB600
In p8_aes_xts_init() we do a printk(KERN_INFO ...) to report the
fallback implementation we're using. However with a slow console this
can significantly affect the speed of crypto operations. So remove it.
Fixes: c07f5d3da643 ("crypto: vmx - Adding support for XTS")
Cc: sta...@vger.kernel.org #
In the vmx AES init routines we do a printk(KERN_INFO ...) to report
the fallback implementation we're using.
However with a slow console this can significantly affect the speed of
crypto operations. Using 'cryptsetup benchmark' the removal of the
printk() leads to a ~5x speedup for aes-cbc
On 23/04/2018 09:42, Minchan Kim wrote:
> On Tue, Apr 17, 2018 at 04:33:18PM +0200, Laurent Dufour wrote:
>> When handling speculative page fault, the vma->vm_flags and
>> vma->vm_page_prot fields are read once the page table lock is released. So
>> there is no more guarantee that these fields
On Thu, 03 May 2018 20:03:55 +1000
Stewart Smith wrote:
> Nicholas Piggin writes:
> > On Thu, 3 May 2018 14:36:47 +0530
> > Akshay Adiga wrote:
> >
> >> On Tue, May 01, 2018 at 01:47:23PM +1000, Nicholas Piggin
Nicholas Piggin writes:
> On Thu, 3 May 2018 14:36:47 +0530
> Akshay Adiga wrote:
>
>> On Tue, May 01, 2018 at 01:47:23PM +1000, Nicholas Piggin wrote:
>> > On Mon, 30 Apr 2018 14:42:08 +0530
>> > Akshay Adiga
On Thu, May 03, 2018 at 04:26:12PM +1000, Paul Mackerras wrote:
> On Wed, Apr 25, 2018 at 07:54:44PM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > This patch reconstructs LOAD_VSX/STORE_VSX instruction MMIO emulation with
> > analyse_intr() input. It
On Thu, May 03, 2018 at 04:17:15PM +1000, Paul Mackerras wrote:
> On Wed, Apr 25, 2018 at 07:54:43PM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > This patch reconstructs LOAD_VMX/STORE_VMX instruction MMIO emulation with
> > analyse_intr() input.
On Thu, 3 May 2018 14:36:47 +0530
Akshay Adiga wrote:
> On Tue, May 01, 2018 at 01:47:23PM +1000, Nicholas Piggin wrote:
> > On Mon, 30 Apr 2018 14:42:08 +0530
> > Akshay Adiga wrote:
> >
> > > Powersaving for stop0_lite and
On Thu, May 03, 2018 at 04:10:49PM +1000, Paul Mackerras wrote:
> On Wed, Apr 25, 2018 at 07:54:42PM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > This patch reconstructs LOAD_FP/STORE_FP instruction MMIO emulation with
> > analyse_intr() input. It
On Thu, May 03, 2018 at 04:08:17PM +1000, Paul Mackerras wrote:
> On Wed, Apr 25, 2018 at 07:54:41PM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > Currently HV will save math regs(FP/VEC/VSX) when trap into host. But
> > PR KVM will only save math
On Thu, May 03, 2018 at 04:03:46PM +1000, Paul Mackerras wrote:
> On Wed, Apr 25, 2018 at 07:54:40PM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > This patch reconstructs non-SIMD LOAD/STORE instruction MMIO emulation
> > with analyse_intr() input. It
On Tue, May 01, 2018 at 01:47:23PM +1000, Nicholas Piggin wrote:
> On Mon, 30 Apr 2018 14:42:08 +0530
> Akshay Adiga wrote:
>
> > Powersaving for stop0_lite and stop1_lite is observed to be quite similar
> > and both states resume without state loss. Using
On Thu, May 03, 2018 at 03:50:47PM +1000, Paul Mackerras wrote:
> On Wed, Apr 25, 2018 at 07:54:37PM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > stwsiwx will place contents of word element 1 of VSR into word
> > storage of EA. So the element size of
On Thu, May 03, 2018 at 03:58:14PM +1000, Paul Mackerras wrote:
> On Wed, Apr 25, 2018 at 07:54:38PM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > To optimize kvm emulation code with analyse_instr, adds new
> > mmio_update_ra flag to aid with GPR RA
On Thu, May 03, 2018 at 03:48:26PM +1000, Paul Mackerras wrote:
> On Wed, Apr 25, 2018 at 07:54:36PM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > When KVM emulates VMX store, it will invoke kvmppc_get_vmx_data() to
> > retrieve VMX reg val.
On Thu, May 03, 2018 at 03:46:01PM +1000, Paul Mackerras wrote:
> On Wed, Apr 25, 2018 at 07:54:35PM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > This patch moves nip/ctr/lr/xer registers from scattered places in
> > kvm_vcpu_arch to pt_regs
On Thu, May 03, 2018 at 03:34:01PM +1000, Paul Mackerras wrote:
> On Wed, Apr 25, 2018 at 07:54:34PM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > Current regs are scattered at kvm_vcpu_arch structure and it will
> > be more neat to organize them into
On Thu, May 03, 2018 at 03:31:17PM +1000, Paul Mackerras wrote:
> On Wed, Apr 25, 2018 at 07:54:33PM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > We already have analyse_instr() which analyzes instructions for the
> > instruction
> > type, size,
On Wed, Apr 25, 2018 at 07:54:33PM +0800, wei.guo.si...@gmail.com wrote:
> From: Simon Guo
>
> We already have analyse_instr() which analyzes instructions for the
> instruction
> type, size, addtional flags, etc. What kvmppc_emulate_loadstore() did is
> somehow
>
On Wed, Apr 25, 2018 at 07:54:41PM +0800, wei.guo.si...@gmail.com wrote:
> From: Simon Guo
>
> Currently HV will save math regs(FP/VEC/VSX) when trap into host. But
> PR KVM will only save math regs when qemu task switch out of CPU.
>
> To emulate FP/VEC/VSX load, PR
On Wed, Apr 25, 2018 at 07:54:37PM +0800, wei.guo.si...@gmail.com wrote:
> From: Simon Guo
>
> stwsiwx will place contents of word element 1 of VSR into word
> storage of EA. So the element size of stwsiwx should be 4.
>
> This patch correct the size from 8 to 4.
>
>
On Wed, Apr 25, 2018 at 07:54:39PM +0800, wei.guo.si...@gmail.com wrote:
> From: Simon Guo
>
> Some VSX instruction like lxvwsx will splat word into VSR. This patch
> adds VSX copy type KVMPPC_VSX_COPY_WORD_LOAD_DUMP to support this.
>
> Signed-off-by: Simon Guo
On Wed, Apr 25, 2018 at 07:54:40PM +0800, wei.guo.si...@gmail.com wrote:
> From: Simon Guo
>
> This patch reconstructs non-SIMD LOAD/STORE instruction MMIO emulation
> with analyse_intr() input. It utilizes the BYTEREV/UPDATE/SIGNEXT
> properties exported by
On Wed, Apr 25, 2018 at 07:54:36PM +0800, wei.guo.si...@gmail.com wrote:
> From: Simon Guo
>
> When KVM emulates VMX store, it will invoke kvmppc_get_vmx_data() to
> retrieve VMX reg val. kvmppc_get_vmx_data() will check mmio_host_swabbed
> to decide which double word of
On Wed, Apr 25, 2018 at 07:54:34PM +0800, wei.guo.si...@gmail.com wrote:
> From: Simon Guo
>
> Current regs are scattered at kvm_vcpu_arch structure and it will
> be more neat to organize them into pt_regs structure.
>
> Also it will enable reconstruct MMIO emulation
On Wed, Apr 25, 2018 at 07:54:35PM +0800, wei.guo.si...@gmail.com wrote:
> From: Simon Guo
>
> This patch moves nip/ctr/lr/xer registers from scattered places in
> kvm_vcpu_arch to pt_regs structure.
>
> cr register is "unsigned long" in pt_regs and u32 in vcpu->arch.
>
On Wed, Apr 25, 2018 at 07:54:42PM +0800, wei.guo.si...@gmail.com wrote:
> From: Simon Guo
>
> This patch reconstructs LOAD_FP/STORE_FP instruction MMIO emulation with
> analyse_intr() input. It utilizes the FPCONV/UPDATE properties exported by
> analyse_instr() and
On Wed, Apr 25, 2018 at 07:54:44PM +0800, wei.guo.si...@gmail.com wrote:
> From: Simon Guo
>
> This patch reconstructs LOAD_VSX/STORE_VSX instruction MMIO emulation with
> analyse_intr() input. It utilizes VSX_FPCONV/VSX_SPLAT/SIGNEXT exported
> by analyse_instr() and
On Wed, Apr 25, 2018 at 07:54:43PM +0800, wei.guo.si...@gmail.com wrote:
> From: Simon Guo
>
> This patch reconstructs LOAD_VMX/STORE_VMX instruction MMIO emulation with
> analyse_intr() input. When emulating the store, the VMX reg will need to
> be flushed so that the
On Wed, Apr 25, 2018 at 07:54:38PM +0800, wei.guo.si...@gmail.com wrote:
> From: Simon Guo
>
> To optimize kvm emulation code with analyse_instr, adds new
> mmio_update_ra flag to aid with GPR RA update.
>
> This patch arms RA update at load/store emulation path for
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