Arnd Bergmann writes:
> Add the io_uring and pidfd_send_signal system calls to all architectures.
>
> These system calls are designed to handle both native and compat tasks,
> so all entries are the same across architectures, only arm-compat and
> the generic tale still use an old format.
>
> Sign
Hello,
I'm working in a startup called HabanaLabs, and we have an ASIC
accelerator for AI called Goya. It is assembled on a PCIe Gen4 card.
Driver is going to be in kernel 5.1
We are trying to plug the card into a Power8 machine and load the
driver, and we get a failure during the loading of the d
Greg KH writes:
> On Fri, Mar 29, 2019 at 03:51:16PM +0100, Greg KH wrote:
>> On Fri, Mar 29, 2019 at 10:25:48PM +1100, Michael Ellerman wrote:
>> > -BEGIN PGP SIGNED MESSAGE-
>> > Hash: SHA1
>> >
>> > Hi Greg,
>> >
>> > Please queue up these powerpc patches for 4.14 if you have no objec
Mahesh Jagannath Salgaonkar writes:
> On 3/29/19 5:50 AM, Michael Ellerman wrote:
>> Hi Mahesh,
>>
>> Thanks for doing this series.
>>
>> Mahesh J Salgaonkar writes:
>>> From: Mahesh Salgaonkar
>>>
>>> Also add cpu number while displaying mce log. This will help cleaner logs
>>> when mce hits
On Fri, 2019-03-08 at 15:33:24 UTC, "Gautham R. Shenoy" wrote:
> From: "Gautham R. Shenoy"
>
> In cpu_to_drc_index() in the case when FW_FEATURE_DRC_INFO is absent,
> we currently use of_read_property() to obtain the pointer to the array
> corresponding to the property "ibm,drc-indexes". The elem
On Fri, 2019-03-22 at 12:37:24 UTC, Michael Ellerman wrote:
> Chandan reported that fstests' generic/026 test hit a crash:
>
> BUG: Unable to handle kernel data access at 0xc0062ac4
> Faulting instruction address: 0xc0092240
> Oops: Kernel access of bad area, sig: 11 [#1]
>
On Tue, 2019-03-26 at 12:30:31 UTC, Mahesh J Salgaonkar wrote:
> From: Mahesh Salgaonkar
>
> On pseries, TLB multihit are reported as D-Cache Multihit. This is because
> the wrongly populated mc_err_types[] array. Per PAPR, TLB error type is 0x04
> and mc_err_types[4] points to "D-Cache" instead
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi Linus,
Please pull some more powerpc fixes for 5.1:
The following changes since commit 8c2ffd9174779014c3fe1f96d9dc3641d9175f00:
Linux 5.1-rc2 (2019-03-24 14:02:26 -0700)
are available in the git repository at:
https://git.kernel.org/pub/sc
The pull request you sent on Sun, 31 Mar 2019 21:26:08 +1100:
> https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
> tags/powerpc-5.1-4
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/6536c5f2c8cf79db0d37e79afcdb227dc854509c
Thank you!
--
Deet-doot-do
On Sun, Mar 31, 2019 at 5:47 PM Michael Ellerman wrote:
>
> Arnd Bergmann writes:
> > Add the io_uring and pidfd_send_signal system calls to all architectures.
> >
> > These system calls are designed to handle both native and compat tasks,
> > so all entries are the same across architectures, onl
This is the logical continuation of the "lib/sort & lib/list_sort:
faster and smaller" series by George Spelvin (added to linux-next
recently).
Since Spectre mitigations have made indirect function calls more
expensive, and the previous patch series implements the default
simple byte copies withou
Replace swap_eh_frame_hdr_table_entries with built-in one, because
swap_eh_frame_hdr_table_entries does a simple byte to byte swap.
Since Spectre mitigations have made indirect function calls more
expensive, and the default simple byte copies swap is implemented
without them, an "optimized" custom
Replace relaswap with built-in one, because relaswap
does a simple byte to byte swap.
Since Spectre mitigations have made indirect function calls more
expensive, and the default simple byte copies swap is implemented
without them, an "optimized" custom swap function is now
a waste of time as well
Replace dx_leaf_sort_swap, swap_refcount_rec and swap_xe functions
with built-in one, because they do only a simple byte to byte swap.
Since Spectre mitigations have made indirect function calls more
expensive, and the default simple byte copies swap is implemented
without them, an "optimized" cus
Replace swap_dirty_idx function with built-in one,
because swap_dirty_idx does only a simple byte to byte swap.
Since Spectre mitigations have made indirect function calls more
expensive, and the default simple byte copies swap is implemented
without them, an "optimized" custom swap function is no
Replace int type with size_t type of the size argument
in the swap function, also affect all its dependencies.
It's always been weird that sort() takes a size_t element size,
but passes an int size to (*swap)(). Not a bug because we don't
sort objects >2GB large, but it's ugly.
Signed-off-by: And
Currenty pmu driver file for each ppc64 generation processor
has a __init call in itself. Refactor the code by moving the
__init call to core-books.c. This also clean's up compat mode
pmu driver registration.
Suggested-by: Michael Ellerman
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/inc
Most of the power processor generation performance monitoring
unit (PMU) driver code is bundled in the kernel and one of those
is enabled/registered based on the oprofile_cpu_type check at
the boot.
But things get little tricky incase of "compat" mode boot.
IBM POWER System Server based processors
On 30/3/19 2:44 am, Yue Haibing wrote:
From: YueHaibing
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/misc/ocxl/link.c: In function 'xsl_fault_handler':
drivers/misc/ocxl/link.c:187:17: warning: variable 'tid' set but not used
[-Wunused-but-set-variable]
drivers/misc/ocxl/link.c:187:
The call to of_get_cpu_node returns a node pointer with refcount
incremented thus it must be explicitly decremented after the last
usage.
Detected by coccinelle with the following warnings:
./drivers/cpufreq/pasemi-cpufreq.c:212:1-7: ERROR: missing of_node_put;
acquired a node pointer with refcou
The call to of_find_node_by_name returns a node pointer with refcount
incremented thus it must be explicitly decremented after the last
usage.
Detected by coccinelle with the following warnings:
./drivers/cpufreq/pmac32-cpufreq.c:557:2-8: ERROR: missing of_node_put;
acquired a node pointer with r
On 03/22/2019 06:56 PM, Daniel Lezcano wrote:
On 22/03/2019 10:45, Rafael J. Wysocki wrote:
On Fri, Mar 22, 2019 at 8:31 AM Abhishek Goel
wrote:
Currently, the cpuidle governors (menu /ladder) determine what idle state
an idling CPU should enter into based on heuristics that depend on the
i
This move the dependency to DEV_DAX_PMEM_COMPAT such that only
if DEV_DAX_PMEM is built as module we can allow the compat support.
This allows to test the new code easily in a emulation setup where we
often build things without module support.
Signed-off-by: Aneesh Kumar K.V
---
Changes from V1:
This adds a flag so that the DAWR can be enabled on P9 via:
echo Y > /sys/kernel/debug/powerpc/dawr_enable_dangerous
The DAWR was previously force disabled on POWER9 in:
9654153158 powerpc: Disable DAWR in the base POWER9 CPU features
Also see Documentation/powerpc/DAWR-POWER9.txt
This is a d
Those not of us not drowning in POWER might not know what this means.
Signed-off-by: Joel Stanley
---
Documentation/powerpc/DAWR-POWER9.txt | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Documentation/powerpc/DAWR-POWER9.txt
b/Documentation/powerpc/DAWR-POWER9.txt
i
PM_BR_CMPL_ALT event is not supported and remove from the power9 event list
Fixes: 24bedcb7c811 ('powerpc/perf: Fix branch event code for power9')
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/perf/power9-events-list.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/powerpc/perf/
On Mon, 2019-04-01 at 16:41 +1030, Joel Stanley wrote:
> Those not of us not drowning in POWER might not know what this means.
Hehe... thanks!
> Signed-off-by: Joel Stanley
Acked-by: Michael Neuling
> ---
> Documentation/powerpc/DAWR-POWER9.txt | 8
> 1 file changed, 4 insertions(+)
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