Naveen N. Rao's on May 18, 2019 5:02 am:
> With -mprofile-kernel, gcc emits 'mflr r0', followed by 'bl _mcount' to
> enable function tracing and profiling. So far, with dynamic ftrace, we
> used to only patch out the branch to _mcount(). However, Nick Piggin
> points out that "mflr is executed by t
Michael Ellerman's on May 17, 2019 11:29 pm:
> From: "Aneesh Kumar K.V"
>
> Accesses by userspace to random addresses outside the user or kernel
> address range will generate an SLB fault. When we handle that fault we
> classify the effective address into several classes, eg. user, kernel
> linea
On 05/16/2019 12:17 PM, Nathan Lynch wrote:
> Tyrel Datwyler writes:
>> The current dlpar_cpu_readd() takes in a cpu_id and uses that to look up
>> the cpus device_node so that we can get at the ibm,my-drc-index
>> property. The only user of cpu readd is an OF notifier call back. This
>> call back
On Fri, May 17, 2019 at 03:09:22AM +, S.j. Wang wrote:
> There is chip errata ERR008000, the reference doc is
> (https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf),
>
> The issue is "While using ESAI transmit or receive and
> an underrun/overrun happens, channel swap may occur.
> The only recove
In commit a0572f687fb3c ("ftrace: Allow ftrace_replace_code() to be
schedulable), the generic ftrace_replace_code() function was modified to
accept a flags argument in place of a single 'enable' flag. However, the
x86 version of this function was not updated. Fix the same.
Fixes: a0572f687fb3c ("f
With -mprofile-kernel, gcc emits 'mflr r0', followed by 'bl _mcount' to
enable function tracing and profiling. So far, with dynamic ftrace, we
used to only patch out the branch to _mcount(). However, Nick Piggin
points out that "mflr is executed by the branch unit that can only
execute one per cycl
While over-riding ftrace_replace_code(), we still want to reuse the
existing __ftrace_replace_code() function. Rename the function and
make it available for other kernel code.
Signed-off-by: Naveen N. Rao
---
include/linux/ftrace.h | 1 +
kernel/trace/ftrace.c | 8
2 files changed, 5 i
Since ftrace_replace_code() is a __weak function and can be overridden,
we need to expose the flags that can be set. So, move the flags enum to
the header file.
Signed-off-by: Naveen N. Rao
---
include/linux/ftrace.h | 5 +
kernel/trace/ftrace.c | 5 -
2 files changed, 5 insertions(+),
On powerpc64, -mprofile-kernel results in two instructions being
emitted: 'mflr r0' and 'bl _mcount'. So far, we were only nop'ing out
the branch to _mcount(). This series implements an approach to also nop
out the preceding mflr.
Patches 1-3 are generic changes. Patch 2 is a fix for x86, but h
Nicholas Piggin wrote:
Naveen N. Rao's on May 17, 2019 4:22 am:
While enabling ftrace, we will first need to patch the preceding 'mflr
r0' (which would now be a 'nop') with 'b +8', then use
synchronize_rcu_tasks() and finally patch in 'bl _mcount()' followed by
'mflr r0'.
I think that's wha
https://bugzilla.kernel.org/show_bug.cgi?id=203517
Erhard F. (erhar...@mailbox.org) changed:
What|Removed |Added
Attachment #282807|0 |1
is obsolete|
https://bugzilla.kernel.org/show_bug.cgi?id=203517
--- Comment #6 from Erhard F. (erhar...@mailbox.org) ---
Created attachment 282807
--> https://bugzilla.kernel.org/attachment.cgi?id=282807&action=edit
kernel .config (5.1.3, Talos II)
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On 5/17/19 8:19 PM, Vaibhav Jain wrote:
Hi Aneesh,
Apart from a minor review comment for changes to nd_pfn_validate() the
patch looks good to me.
Also, I Tested this patch on a PPC64 qemu guest with virtual nvdimm and
verified that default alignment of newly created devdax namespace was
64KiB i
Hi Aneesh,
Apart from a minor review comment for changes to nd_pfn_validate() the
patch looks good to me.
Also, I Tested this patch on a PPC64 qemu guest with virtual nvdimm and
verified that default alignment of newly created devdax namespace was
64KiB instead of 16MiB. Below are the test result
If we couldn't fully init a context, we were leaking memory.
Fixes: b9721d275cc2 ("ocxl: Allow external drivers to use OpenCAPI contexts")
Signed-off-by: Frederic Barrat
---
drivers/misc/ocxl/context.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/misc/ocxl/context.c b/drivers/misc
From: "Aneesh Kumar K.V"
Accesses by userspace to random addresses outside the user or kernel
address range will generate an SLB fault. When we handle that fault we
classify the effective address into several classes, eg. user, kernel
linear, kernel virtual etc.
For addresses that are completely
Add support for disabling the kernel implemented spectre v2 mitigation
(count cache flush on context switch) via the nospectre_v2 and
mitigations=off cmdline options.
Suggested-by: Michael Ellerman
Signed-off-by: Christopher M. Riedl
Reviewed-by: Andrew Donnellan
---
v3->v4:
add support
On Wed, 15 May 2019 10:54:42 +
Sasha Levin wrote:
> Hi,
>
Hi,
> [This is an automated email]
>
> This commit has been processed because it contains a "Fixes:" tag,
> fixing commit: eac1e731b59e powerpc/xive: guest exploitation of the XIVE
> interrupt controller.
>
> The bot has tested t
srikanth writes:
> Hello,
>
> On power9 host, performing memory hotunplug from ppc64le guest results
> in kernel oops.
Thanks for the report.
Did this used to work in the past? If so what is the last version that
worked?
> Kernel used : https://github.com/torvalds/linux/tree/v5.1 built using
"Aneesh Kumar K.V" writes:
> On 5/16/19 8:17 PM, Michael Ellerman wrote:
>> "Aneesh Kumar K.V" writes:
>>> This makes sure we don't enable HugeTLB if the cache is not configured.
>>> I am still not sure about this. IMHO hugetlb support should be a hardware
>>> support derivative and any cache all
On Fri, 17 May 2019 at 10:59, Arnd Bergmann wrote:
>
> On Fri, May 17, 2019 at 5:21 AM Xiaowei Bao wrote:
> > -Original Message-
> > From: Arnd Bergmann
> > On Wed, May 15, 2019 at 9:36 AM Xiaowei Bao wrote:
> > > Signed-off-by: Xiaowei Bao
> > > ---
> > > arch/arm64/boot/dts/freescal
On 5/17/19 9:29 AM, Aneesh Kumar K.V wrote:
On 5/16/19 8:17 PM, Michael Ellerman wrote:
"Aneesh Kumar K.V" writes:
This makes sure we don't enable HugeTLB if the cache is not configured.
I am still not sure about this. IMHO hugetlb support should be a
hardware
support derivative and any cache
Aneesh Kumar K.V's on May 16, 2019 11:36 pm:
> On 5/16/19 10:34 AM, Nicholas Piggin wrote:
>> Aneesh Kumar K.V's on May 14, 2019 4:02 pm:
>>> Avoids confusion when printing Oops message like below
>>>
>>> Faulting instruction address: 0xc008bdb4
>>> Oops: Kernel access of bad area, sig:
Naveen N. Rao's on May 17, 2019 4:22 am:
> Nicholas Piggin wrote:
>> Naveen N. Rao's on May 14, 2019 6:32 pm:
>>> Michael Ellerman wrote:
"Naveen N. Rao" writes:
> Michael Ellerman wrote:
>> Nicholas Piggin writes:
>>> The new mprofile-kernel mcount sequence is
>>>
>>>
On Fri, May 17, 2019 at 5:21 AM Xiaowei Bao wrote:
> -Original Message-
> From: Arnd Bergmann
> On Wed, May 15, 2019 at 9:36 AM Xiaowei Bao wrote:
> > Signed-off-by: Xiaowei Bao
> > ---
> > arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 52
> >
> > 1 files
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