Re: Re: [PATCH v3 7/9] KVM: PPC: Ultravisor: Restrict LDBAR access

2019-06-15 Thread Ram Pai
On Sat, Jun 15, 2019 at 05:43:34PM +1000, Paul Mackerras wrote: > On Thu, Jun 06, 2019 at 02:36:12PM -0300, Claudio Carvalho wrote: > > When the ultravisor firmware is available, it takes control over the > > LDBAR register. In this case, thread-imc updates and save/restore > > operations on the LD

Re: [PATCH] powerpc/pseries: fix oops in hotplug memory notifier

2019-06-15 Thread Tyrel Datwyler
On 06/13/2019 06:05 PM, Nathan Lynch wrote: > Nathan Lynch writes: > >> Tyrel Datwyler writes: >> >>> Maybe we are ok with this behavior as I haven't dug deep enough into the >>> memory >>> subsystem here to really understand what the memory code is updating, but >>> it is >>> concerning that

Re: [GIT PULL] Please pull powerpc/linux.git powerpc-5.2-4 tag

2019-06-15 Thread pr-tracker-bot
The pull request you sent on Sat, 15 Jun 2019 23:34:46 +1000: > https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git > tags/powerpc-5.2-4 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/fa1827d7731ac24f44309ddc2ca806650912bf0e Thank you! -- Deet-doot-do

[PATCH] powerpc/4xx/uic: clear pending interrupt after irq type/pol change

2019-06-15 Thread Christian Lamparter
When testing out gpio-keys with a button, a spurious interrupt (and therefore a key press or release event) gets triggered as soon as the driver enables the irq line for the first time. This patch clears any potential bogus generated interrupt that was caused by the switching of the associated irq

Re: [PATCH] powerpc/mm/32s: only use MMU to mark initmem NX if STRICT_KERNEL_RWX

2019-06-15 Thread Andreas Schwab
On Jun 15 2019, Christophe Leroy wrote: > Andreas Schwab a écrit : > >> If STRICT_KERNEL_RWX is disabled, never use the MMU to mark initmen >> nonexecutable. > > I dont understand, can you elaborate ? It breaks suspend. > This area is mapped with BATs so using change_page_attr() is pointless.

Re: [PATCH 1/3] powerpc/cacheinfo: add cacheinfo_teardown, cacheinfo_rebuild

2019-06-15 Thread Michael Ellerman
On Wed, 2019-06-12 at 04:45:04 UTC, Nathan Lynch wrote: > Allow external callers to force the cacheinfo code to release all its > references to cache nodes, e.g. before processing device tree updates > post-migration, and to rebuild the hierarchy afterward. > > CPU online/offline must be blocked b

Re: [PATCH] powerpc/pseries: fix oops in hotplug memory notifier

2019-06-15 Thread Michael Ellerman
On Fri, 2019-06-07 at 05:04:07 UTC, Nathan Lynch wrote: > During post-migration device tree updates, we can oops in > pseries_update_drconf_memory if the source device tree has an > ibm,dynamic-memory-v2 property and the destination has a > ibm,dynamic_memory (v1) property. The notifier processes a

Re: [PATCH] ocxl: do not use C++ style comments in uapi header

2019-06-15 Thread Michael Ellerman
On Tue, 2019-06-04 at 11:16:32 UTC, Masahiro Yamada wrote: > Linux kernel tolerates C++ style comments these days. Actually, the > SPDX License tags for .c files start with //. > > On the other hand, uapi headers are written in more strict C, where > the C++ comment style is forbidden. > > Signed

Re: [PATCH v2] powerpc: pseries/hvconsole: fix stack overread via udbg

2019-06-15 Thread Michael Ellerman
On Mon, 2019-06-03 at 06:56:57 UTC, Daniel Axtens wrote: > While developing kasan for 64-bit book3s, I hit the following stack > over-read. > > It occurs because the hypercall to put characters onto the terminal > takes 2 longs (128 bits/16 bytes) of characters at a time, and so > hvc_put_chars wo

[GIT PULL] Please pull powerpc/linux.git powerpc-5.2-4 tag

2019-06-15 Thread Michael Ellerman
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 Hi Linus, Please pull some more powerpc fixes for 5.2: The following changes since commit cd6c84d8f0cdc911df435bb075ba22ce3c605b07: Linux 5.2-rc2 (2019-05-26 16:49:19 -0700) are available in the git repository at: https://git.kernel.org/pub/sc

Re: [PATCH] powerpc/mm/32s: only use MMU to mark initmem NX if STRICT_KERNEL_RWX

2019-06-15 Thread Christophe Leroy
Andreas Schwab a écrit : If STRICT_KERNEL_RWX is disabled, never use the MMU to mark initmen nonexecutable. I dont understand, can you elaborate ? This area is mapped with BATs so using change_page_attr() is pointless. Christophe Also move a misplaced paren that makes the condition alway

Re: [PATCH v5 13/16] powerpc/mm/32s: Use BATs for STRICT_KERNEL_RWX

2019-06-15 Thread Christophe Leroy
Andreas Schwab a écrit : This breaks suspend (or resume) on the iBook G4. no_console_suspend doesn't give any clues, the display just stays dark. Can you send your .config Thanks Christophe Andreas. -- Andreas Schwab, sch...@linux-m68k.org GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510

[PATCH] powerpc/mm/32s: only use MMU to mark initmem NX if STRICT_KERNEL_RWX

2019-06-15 Thread Andreas Schwab
If STRICT_KERNEL_RWX is disabled, never use the MMU to mark initmen nonexecutable. Also move a misplaced paren that makes the condition always true. Fixes: 63b2bc619565 ("powerpc/mm/32s: Use BATs for STRICT_KERNEL_RWX") Signed-off-by: Andreas Schwab --- arch/powerpc/mm/pgtable_32.c | 4 +++- 1

Re: [PATCH v5 13/16] powerpc/mm/32s: Use BATs for STRICT_KERNEL_RWX

2019-06-15 Thread Andreas Schwab
On Feb 21 2019, Christophe Leroy wrote: > diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c > index a000768a5cc9..6e56a6240bfa 100644 > --- a/arch/powerpc/mm/pgtable_32.c > +++ b/arch/powerpc/mm/pgtable_32.c > @@ -353,7 +353,10 @@ void mark_initmem_nx(void) > unsigned

Re: [PATCH v5 13/16] powerpc/mm/32s: Use BATs for STRICT_KERNEL_RWX

2019-06-15 Thread Andreas Schwab
This breaks suspend (or resume) on the iBook G4. no_console_suspend doesn't give any clues, the display just stays dark. Andreas. -- Andreas Schwab, sch...@linux-m68k.org GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1 "And now for something completely different."

crypto/NX: Set receive window credits to max number of CRBs in RxFIFO

2019-06-15 Thread Haren Myneni
System gets checkstop if RxFIFO overruns with more requests than the maximum possible number of CRBs in FIFO at the same time. So find max CRBs from FIFO size and set it to receive window credits. CC: sta...@vger.kernel.org # v4.14+ Signed-off-by:Haren Myneni diff --git a/drivers/crypto/

Issue with sg_copy_to_buffer() ? (was Re: [PATCH v3 2/4] crypto: talitos - fix hash on SEC1.)

2019-06-15 Thread Christophe Leroy
Le 15/06/2019 à 10:18, Christophe Leroy a écrit : @@ -2058,7 +2065,18 @@ static int ahash_process_req(struct ahash_request *areq, unsigned int nbytes)   sg_copy_to_buffer(areq->src, nents,     ctx_buf + req_ctx->nbuf, offset);   req_ctx->nbuf += offset; -  

Re: [PATCH v3 2/4] crypto: talitos - fix hash on SEC1.

2019-06-15 Thread Christophe Leroy
Le 14/06/2019 à 13:32, Horia Geanta a écrit : On 6/13/2019 3:48 PM, Christophe Leroy wrote: @@ -336,15 +336,18 @@ static void flush_channel(struct device *dev, int ch, int error, int reset_ch) tail = priv->chan[ch].tail; while (priv->chan[ch].fifo[tail].desc) {

Re: [PATCH v1 1/6] mm: Section numbers use the type "unsigned long"

2019-06-15 Thread Christophe Leroy
Le 14/06/2019 à 21:00, Andrew Morton a écrit : On Fri, 14 Jun 2019 12:01:09 +0200 David Hildenbrand wrote: We are using a mixture of "int" and "unsigned long". Let's make this consistent by using "unsigned long" everywhere. We'll do the same with memory block ids next. ... - int i,

Re: [PATCH v3 8/9] KVM: PPC: Ultravisor: Enter a secure guest

2019-06-15 Thread Paul Mackerras
On Thu, Jun 06, 2019 at 02:36:13PM -0300, Claudio Carvalho wrote: > From: Sukadev Bhattiprolu > > To enter a secure guest, we have to go through the ultravisor, therefore > we do a ucall when we are entering a secure guest. > > This change is needed for any sort of entry to the secure guest from

Re: [PATCH v3 9/9] KVM: PPC: Ultravisor: Check for MSR_S during hv_reset_msr

2019-06-15 Thread Paul Mackerras
On Thu, Jun 06, 2019 at 02:36:14PM -0300, Claudio Carvalho wrote: > From: Michael Anderson > > - Check for MSR_S so that kvmppc_set_msr will include. Prior to this Will include what? "it" maybe? >change return to guest would not have the S bit set. > > - Patch based on comment from Paul

Re: [PATCH v3 7/9] KVM: PPC: Ultravisor: Restrict LDBAR access

2019-06-15 Thread Paul Mackerras
On Thu, Jun 06, 2019 at 02:36:12PM -0300, Claudio Carvalho wrote: > When the ultravisor firmware is available, it takes control over the > LDBAR register. In this case, thread-imc updates and save/restore > operations on the LDBAR register are handled by ultravisor. > > Signed-off-by: Claudio Carv

Re: [PATCH v3 5/9] KVM: PPC: Ultravisor: Use UV_WRITE_PATE ucall to register a PATE

2019-06-15 Thread Paul Mackerras
On Thu, Jun 06, 2019 at 02:36:10PM -0300, Claudio Carvalho wrote: > From: Michael Anderson > > When running under an ultravisor, the ultravisor controls the real > partition table and has it in secure memory where the hypervisor can't > access it, and therefore we (the HV) have to do a ucall when

Re: [PATCH v3 4/9] KVM: PPC: Ultravisor: Add generic ultravisor call handler

2019-06-15 Thread Paul Mackerras
On Thu, Jun 06, 2019 at 02:36:09PM -0300, Claudio Carvalho wrote: > From: Ram Pai > > Add the ucall() function, which can be used to make ultravisor calls > with varied number of in and out arguments. Ultravisor calls can be made > from the host or guests. > > This copies the implementation of p

Re: [PATCH v3 3/9] powerpc: Introduce FW_FEATURE_ULTRAVISOR

2019-06-15 Thread Paul Mackerras
On Thu, Jun 06, 2019 at 02:36:08PM -0300, Claudio Carvalho wrote: > This feature tells if the ultravisor firmware is available to handle > ucalls. Everything in this patch that depends on CONFIG_PPC_UV should just depend on CONFIG_PPC_POWERNV instead. The reason is that every host kernel needs to