Re: [PATCH v3 02/27] mm/memory_hotplug: Allow check_hotplug_memory_addressable to be called from drivers

2020-02-20 Thread Andrew Donnellan
On 21/2/20 2:26 pm, Alastair D'Silva wrote: From: Alastair D'Silva When setting up OpenCAPI connected persistent memory, the range check may not be performed until quite late (or perhaps not at all, if the user does not establish a DAX device). This patch makes the range check callable so we

[PATCH v2 8/8] perf/tools/pmu-events/powerpc: Add hv_24x7 socket/chip level metric events

2020-02-20 Thread Kajol Jain
The hv_24×7 feature in IBM® POWER9™ processor-based servers provide the facility to continuously collect large numbers of hardware performance metrics efficiently and accurately. This patch adds hv_24x7 metric file for different Socket/chip resources. Result: power9 platform: command:# ./perf

[PATCH v2 7/8] tools/perf: Enable Hz/hz prinitg for --metric-only option

2020-02-20 Thread Kajol Jain
Commit 54b5091606c18 ("perf stat: Implement --metric-only mode") added function 'valid_only_metric()' which drops "Hz" or "hz", if it is part of "ScaleUnit". This patch enable it since hv_24x7 supports couple of frequency events. Signed-off-by: Kajol Jain --- tools/perf/util/stat-display.c | 2

[PATCH v2 6/8] perf/tools: Enhance JSON/metric infrastructure to handle "?"

2020-02-20 Thread Kajol Jain
Patch enhances current metric infrastructure to handle "?" in the metric expression. The "?" can be use for parameters whose value not known while creating metric events and which can be replace later at runtime to the proper value. It also add flexibility to create multiple events out of single

[PATCH v2 5/8] powerpc/hv-24x7: Update post_mobility_fixup() to handle migration

2020-02-20 Thread Kajol Jain
Function 'read_sys_info_pseries()' is added to get system parameter values like number of sockets and chips per socket. and it gets these details via rtas_call with token "PROCESSOR_MODULE_INFO". Incase lpar migrate from one system to another, system parameter details like chips per sockets or

[PATCH v2 4/8] Documentation/ABI: Add ABI documentation for chips and sockets

2020-02-20 Thread Kajol Jain
Add documentation for the following sysfs files: /sys/devices/hv_24x7/interface/chips, /sys/devices/hv_24x7/interface/sockets Signed-off-by: Kajol Jain --- .../testing/sysfs-bus-event_source-devices-hv_24x7 | 14 ++ 1 file changed, 14 insertions(+) diff --git

[PATCH v2 3/8] powerpc/hv-24x7: Add sysfs files inside hv-24x7 device to show processor details

2020-02-20 Thread Kajol Jain
To expose the system dependent parameter like total number of sockets and numbers of chips per socket, patch adds two sysfs files. "sockets" and "chips" are added to /sys/devices/hv_24x7/interface/ of the "hv_24x7" pmu. Signed-off-by: Kajol Jain --- arch/powerpc/perf/hv-24x7.c | 22

[PATCH v2 2/8] powerpc/hv-24x7: Add rtas call in hv-24x7 driver to get processor details

2020-02-20 Thread Kajol Jain
For hv_24x7 socket/chip level events, specific chip-id to which the data requested should be added as part of pmu events. But number of chips/socket in the system details are not exposed. Patch implements read_sys_info_pseries() to get system parameter values like number of sockets and chips per

[PATCH v2 1/8] powerpc/perf/hv-24x7: Fix inconsistent output values incase multiple hv-24x7 events run

2020-02-20 Thread Kajol Jain
Commit 2b206ee6b0df ("powerpc/perf/hv-24x7: Display change in counter values")' added to print _change_ in the counter value rather then raw value for 24x7 counters. Incase of transactions, the event count is set to 0 at the beginning of the transaction. It also sets the event's prev_count to the

[PATCH v2 0/8] powerpc/perf: Add json file metric support for the hv_24x7 socket/chip level events

2020-02-20 Thread Kajol Jain
The hv_24×7 feature in IBM® POWER9™ processor-based servers provide the facility to continuously collect large numbers of hardware performance metrics efficiently and accurately. First patch of the patchset fix inconsistent results we are getting when we run multiple 24x7 events. Patchset adds

Re: [PATCH v3 04/27] ocxl: Remove unnecessary externs

2020-02-20 Thread Andrew Donnellan
On 21/2/20 2:26 pm, Alastair D'Silva wrote: From: Alastair D'Silva Function declarations don't need externs, remove the existing ones so they are consistent with newer code Signed-off-by: Alastair D'Silva Acked-by: Andrew Donnellan -- Andrew Donnellan OzLabs, ADL Canberra

Re: [PATCH v3 27/27] MAINTAINERS: Add myself & nvdimm/ocxl to ocxl

2020-02-20 Thread Andrew Donnellan
On 21/2/20 2:27 pm, Alastair D'Silva wrote: From: Alastair D'Silva The OpenCAPI Persistent Memory driver will be maintained as part ofi the ppc tree. I'm also adding myself as an author of the driver & contributor to the generic ocxl driver. Signed-off-by: Alastair D'Silva You need to

[PATCH v2 5/5] Documentation: Document sysfs interfaces purr, spurr, idle_purr, idle_spurr

2020-02-20 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" Add documentation for the following sysfs interfaces: /sys/devices/system/cpu/cpuX/purr /sys/devices/system/cpu/cpuX/spurr /sys/devices/system/cpu/cpuX/idle_purr /sys/devices/system/cpu/cpuX/idle_spurr Signed-off-by: Gautham R. Shenoy ---

[PATCH v2 3/5] powerpc/pseries: Account for SPURR ticks on idle CPUs

2020-02-20 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" On Pseries LPARs, to calculate utilization, we need to know the [S]PURR ticks when the CPUs were busy or idle. Via idle_loop_prolog(), idle_loop_epilog(), we track the idle PURR ticks in the VPA variable "wait_state_cycles". This patch extends the support to account

[PATCH v2 0/5] Track and expose idle PURR and SPURR ticks

2020-02-20 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" Hi, This is the second version of the patches to track and expose idle PURR and SPURR ticks. These patches are required by tools such as lparstat to compute system utilization for capacity planning purposes. v1 can be found here:

[PATCH v2 4/5] powerpc/sysfs: Show idle_purr and idle_spurr for every CPU

2020-02-20 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" On Pseries LPARs, to calculate utilization, we need to know the [S]PURR ticks when the CPUs were busy or idle. The total PURR and SPURR ticks are already exposed via the per-cpu sysfs files "purr" and "spurr". This patch adds support for exposing the idle PURR and

[PATCH v2 1/5] powerpc: Move idle_loop_prolog()/epilog() functions to header file

2020-02-20 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" Currently prior to entering an idle state on a Linux Guest, the pseries cpuidle driver implement an idle_loop_prolog() and idle_loop_epilog() functions which ensure that idle_purr is correctly computed, and the hypervisor is informed that the CPU cycles have been

[PATCH v2 2/5] powerpc/idle: Add accessor function to always read latest idle PURR

2020-02-20 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" Currently when CPU goes idle, we take a snapshot of PURR via idle_loop_prolog() which is used at the CPU idle exit to compute the idle PURR cycles via the function idle_loop_epilog(). Thus, the value of idle PURR cycle thus read before idle_loop_prolog() and after

[PATCH v3 03/27] powerpc: Map & release OpenCAPI LPC memory

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva This patch adds platform support to map & release LPC memory. Signed-off-by: Alastair D'Silva --- arch/powerpc/include/asm/pnv-ocxl.h | 4 +++ arch/powerpc/platforms/powernv/ocxl.c | 43 +++ 2 files changed, 47 insertions(+) diff --git

[PATCH v3 04/27] ocxl: Remove unnecessary externs

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva Function declarations don't need externs, remove the existing ones so they are consistent with newer code Signed-off-by: Alastair D'Silva --- arch/powerpc/include/asm/pnv-ocxl.h | 32 ++--- include/misc/ocxl.h | 6 +++--- 2 files

[PATCH v3 16/27] powerpc/powernv/pmem: Register a character device for userspace to interact with

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva This patch introduces a character device (/dev/ocxl-scmX) which further patches will use to interact with userspace. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c| 116 +- .../platforms/powernv/pmem/ocxl_internal.h

[PATCH v3 12/27] powerpc/powernv/pmem: Add register addresses & status values to the header

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva These values have been taken from the device specifications. Signed-off-by: Alastair D'Silva --- .../platforms/powernv/pmem/ocxl_internal.h| 72 +++ 1 file changed, 72 insertions(+) diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h

[PATCH v3 21/27] powerpc/powernv/pmem: Add an IOCTL to request controller health & perf data

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva When health & performance data is requested from the controller, it responds with an error log containing the requested information. This patch allows the request to me issued via an IOCTL. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c

[PATCH v3 19/27] powerpc/powernv/pmem: Add an IOCTL to report controller statistics

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva The controller can report a number of statistics that are useful in evaluating the performance and reliability of the card. This patch exposes this information via an IOCTL. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c | 185

[PATCH v3 22/27] powerpc/powernv/pmem: Implement the heartbeat command

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva The heartbeat admin command is a simple admin command that exercises the communication mechanisms within the controller. This patch issues a heartbeat command to the card during init to ensure we can communicate with the card's controller. Signed-off-by: Alastair D'Silva

[PATCH v3 25/27] powerpc/powernv/pmem: Expose the serial number in sysfs

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva This information will be used by ndctl in userspace to help users identify the device. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/Makefile | 2 +- arch/powerpc/platforms/powernv/pmem/ocxl.c| 5 +++

[PATCH v3 23/27] powerpc/powernv/pmem: Add debug IOCTLs

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva These IOCTLs provide low level access to the card to aid in debugging controller/FPGA firmware. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/Kconfig | 6 + arch/powerpc/platforms/powernv/pmem/ocxl.c | 249

[PATCH v3 20/27] powerpc/powernv/pmem: Forward events to userspace

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva Some of the interrupts that the card generates are better handled by the userspace daemon, in particular: Controller Hardware/Firmware Fatal Controller Dump Available Error Log available This patch allows a userspace application to register an eventfd with the driver via

[PATCH v3 10/27] powerpc: Add driver for OpenCAPI Persistent Memory

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva This driver exposes LPC memory on OpenCAPI pmem cards as an NVDIMM, allowing the existing nvram infrastructure to be used. Namespace metadata is stored on the media itself, so scm_reserve_metadata() maps 1 section's worth of PMEM storage at the start to hold this. The

[PATCH v3 17/27] powerpc/powernv/pmem: Implement the Read Error Log command

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva The read error log command extracts information from the controller's internal error log. This patch exposes this information in 2 ways: - During probe, if an error occurs & a log is available, print it to the console - After probe, make the error log available to

[PATCH v3 08/27] ocxl: Emit a log message showing how much LPC memory was detected

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva This patch emits a message showing how much LPC memory & special purpose memory was detected on an OCXL device. Signed-off-by: Alastair D'Silva --- drivers/misc/ocxl/config.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/misc/ocxl/config.c

[PATCH v3 27/27] MAINTAINERS: Add myself & nvdimm/ocxl to ocxl

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva The OpenCAPI Persistent Memory driver will be maintained as part ofi the ppc tree. I'm also adding myself as an author of the driver & contributor to the generic ocxl driver. Signed-off-by: Alastair D'Silva --- MAINTAINERS | 3 +++ 1 file changed, 3 insertions(+) diff

[PATCH v3 14/27] powerpc/powernv/pmem: Add support for Admin commands

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva This patch requests the metadata required to issue admin commands, as well as some helper functions to construct and check the completion of the commands. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c| 65

[PATCH v3 15/27] powerpc/powernv/pmem: Add support for near storage commands

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva Similar to the previous patch, this adds support for near storage commands. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c| 6 +++ .../platforms/powernv/pmem/ocxl_internal.c| 41 +++

[PATCH v3 18/27] powerpc/powernv/pmem: Add controller dump IOCTLs

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva This patch adds IOCTLs to allow userspace to request & fetch dumps of the internal controller state. This is useful during debugging or when a fatal error on the controller has occurred. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c |

[PATCH v3 11/27] powerpc: Enable the OpenCAPI Persistent Memory driver for powernv_defconfig

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva This patch enables the OpenCAPI Persistent Memory driver, as well as DAX support, for the 'powernv' platform. DAX is not a strict requirement for the functioning of the driver, but it is likely that a user will want to create a DAX device on top of their persistent memory

[PATCH v3 24/27] powerpc/powernv/pmem: Expose SMART data via ndctl

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva This patch retrieves proprietary formatted SMART data and makes it available via ndctl. A later contribution will be made to ndctl to parse this data. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c| 128 ++

[PATCH v3 13/27] powerpc/powernv/pmem: Read the capability registers & wait for device ready

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva This patch reads timeouts & firmware version from the controller, and uses those timeouts to wait for the controller to report that it is ready before handing the memory over to libnvdimm. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/Makefile

[PATCH v3 05/27] ocxl: Address kernel doc errors & warnings

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva This patch addresses warnings and errors from the kernel doc scripts for the OpenCAPI driver. It also makes minor tweaks to make the docs more consistent. Signed-off-by: Alastair D'Silva --- drivers/misc/ocxl/config.c| 24

[PATCH v3 26/27] powerpc/powernv/pmem: Expose the firmware version in sysfs

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva This information will be used by ndctl in userspace to help users identify the device. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl_sysfs.c | 9 + 1 file changed, 9 insertions(+) diff --git

[PATCH v3 07/27] ocxl: Add functions to map/unmap LPC memory

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva Add functions to map/unmap LPC memory Signed-off-by: Alastair D'Silva --- drivers/misc/ocxl/core.c | 51 +++ drivers/misc/ocxl/ocxl_internal.h | 3 ++ include/misc/ocxl.h | 21 + 3 files changed, 75

[PATCH v3 09/27] ocxl: Save the device serial number in ocxl_fn

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva This patch retrieves the serial number of the card and makes it available to consumers of the ocxl driver via the ocxl_fn struct. Signed-off-by: Alastair D'Silva Acked-by: Frederic Barrat Acked-by: Andrew Donnellan --- drivers/misc/ocxl/config.c | 46

[PATCH v3 06/27] ocxl: Tally up the LPC memory on a link & allow it to be mapped

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva Tally up the LPC memory on an OpenCAPI link & allow it to be mapped Signed-off-by: Alastair D'Silva --- drivers/misc/ocxl/core.c | 10 ++ drivers/misc/ocxl/link.c | 53 +++ drivers/misc/ocxl/ocxl_internal.h | 33

[PATCH v3 00/27] Add support for OpenCAPI Persistent Memory devices

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva This series adds support for OpenCAPI Persistent Memory devices, exposing them as nvdimms so that we can make use of the existing infrastructure. Alastair D'Silva (27): powerpc: Add OPAL calls for LPC memory alloc/release mm/memory_hotplug: Allow

[PATCH v3 01/27] powerpc: Add OPAL calls for LPC memory alloc/release

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva Add OPAL calls for LPC memory alloc/release Signed-off-by: Alastair D'Silva Acked-by: Andrew Donnellan Acked-by: Frederic Barrat --- arch/powerpc/include/asm/opal-api.h| 2 ++ arch/powerpc/include/asm/opal.h| 3 +++

[PATCH v3 02/27] mm/memory_hotplug: Allow check_hotplug_memory_addressable to be called from drivers

2020-02-20 Thread Alastair D'Silva
From: Alastair D'Silva When setting up OpenCAPI connected persistent memory, the range check may not be performed until quite late (or perhaps not at all, if the user does not establish a DAX device). This patch makes the range check callable so we can perform the check while probing the

Re: [PATCH] evh_bytechan: fix out of bounds accesses

2020-02-20 Thread Stephen Rothwell
Hi all, On Thu, 16 Jan 2020 11:37:14 +1100 Stephen Rothwell wrote: > > On Wed, 15 Jan 2020 14:01:35 -0600 Scott Wood wrote: > > > > On Thu, 2020-01-16 at 06:42 +1100, Stephen Rothwell wrote: > > > Hi Timur, > > > > > > On Wed, 15 Jan 2020 07:25:45 -0600 Timur Tabi wrote: > > > > > > >

Re: [PATCH] selftest/lkdtm: Don't pollute 'git status'

2020-02-20 Thread Kees Cook
On Thu, Feb 06, 2020 at 08:11:39AM +, Christophe Leroy wrote: > Commit 46d1a0f03d66 ("selftests/lkdtm: Add tests for LKDTM targets") > added generation of lkdtm test scripts. > > Ignore those generated scripts when performing 'git status' > > Fixes: 46d1a0f03d66 ("selftests/lkdtm: Add tests

Re: [PATCH kernel 5/5] vfio/spapr_tce: Advertise and allow a huge DMA windows at 4GB

2020-02-20 Thread Alex Williamson
On Tue, 18 Feb 2020 18:36:50 +1100 Alexey Kardashevskiy wrote: > So far the only option for a big 64big DMA window was a window located > at 0x800... (1<<59) which creates problems for devices > supporting smaller DMA masks. > > This exploits a POWER9 PHB option to allow the second

Re: [PATCH] powerpc/8xx: Fix clearing of bits 20-23 in ITLB miss

2020-02-20 Thread Leonardo Bras
On Tue, 2020-02-11 at 01:28 -0300, Leonardo Bras wrote: > Looks a valid change. > rlwimi r10, r10, 0, 0x0f00 means: > r10 = ((r10 << 0) & 0x0f00) | (r10 & ~0x0f00) which ends up being > r10 = r10 > > On ISA, rlwinm is recommended for clearing high order bits. > rlwinm r10, r10, 0, ~0x0f00

Re: [PATCH] KVM: PPC: Book3S HV: Treat TM-related invalid form instructions on P9 like the valid ones

2020-02-20 Thread Gustavo Romero
Hi Leonardo, Thanks a lot for the review. On 02/20/2020 02:51 PM, Leonardo Bras wrote: +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + Could not see where is this used. This is used by pr_warn_ratelimited() below so the module name is printed before the message, for instance:

Re: [PATCH] selftest/lkdtm: Don't pollute 'git status'

2020-02-20 Thread Shuah Khan
On 2/20/20 7:58 AM, Christophe Leroy wrote: ping On 02/06/2020 08:11 AM, Christophe Leroy wrote: Commit 46d1a0f03d66 ("selftests/lkdtm: Add tests for LKDTM targets") added generation of lkdtm test scripts. Ignore those generated scripts when performing 'git status' Fixes: 46d1a0f03d66

[powerpc:fixes] BUILD SUCCESS 9eb425b2e04e0e3006adffea5bf5f227a896f128

2020-02-20 Thread kbuild test robot
pariscallnoconfig parisc allyesconfig pariscgeneric-32bit_defconfig pariscgeneric-64bit_defconfig x86_64 randconfig-a001-20200220 x86_64 randconfig-a002-20200220 x86_64

Re: [PATCH] KVM: PPC: Book3S HV: Treat TM-related invalid form instructions on P9 like the valid ones

2020-02-20 Thread Leonardo Bras
Hello Gustavo, comments inline: On Tue, 2020-02-18 at 16:13 -0500, Gustavo Romero wrote: > diff --git a/arch/powerpc/kvm/book3s_hv_tm.c b/arch/powerpc/kvm/book3s_hv_tm.c > index 0db937497169..cc90b8b82329 100644 > --- a/arch/powerpc/kvm/book3s_hv_tm.c > +++ b/arch/powerpc/kvm/book3s_hv_tm.c > @@

Re: MCE handler gets NIP wrong on MPC8378

2020-02-20 Thread Christophe Leroy
Le 20/02/2020 à 18:34, Radu Rendec a écrit : On 02/20/2020 at 11:25 AM Christophe Leroy wrote: Le 20/02/2020 à 17:02, Radu Rendec a écrit : On 02/20/2020 at 3:38 AM Christophe Leroy wrote: On 02/19/2020 10:39 PM, Radu Rendec wrote: On 02/19/2020 at 4:21 PM Christophe Leroy wrote:

Re: MCE handler gets NIP wrong on MPC8378

2020-02-20 Thread Radu Rendec
On 02/20/2020 at 11:25 AM Christophe Leroy wrote: > Le 20/02/2020 à 17:02, Radu Rendec a écrit : > > On 02/20/2020 at 3:38 AM Christophe Leroy wrote: > >> On 02/19/2020 10:39 PM, Radu Rendec wrote: > >>> On 02/19/2020 at 4:21 PM Christophe Leroy wrote: > > Interesting. > > > > 0x900

Re: MCE handler gets NIP wrong on MPC8378

2020-02-20 Thread Christophe Leroy
Le 20/02/2020 à 17:02, Radu Rendec a écrit : On 02/20/2020 at 3:38 AM Christophe Leroy wrote: On 02/19/2020 10:39 PM, Radu Rendec wrote: On 02/19/2020 at 4:21 PM Christophe Leroy wrote: Interesting. 0x900 is the adress of the timer interrupt. Would the MCE occur just after the timer

Re: [PATCH AUTOSEL 5.5 096/542] powerpc/powernv/ioda: Fix ref count for devices with their own PE

2020-02-20 Thread Sasha Levin
On Mon, Feb 17, 2020 at 09:49:41AM +0100, Frederic Barrat wrote: Le 14/02/2020 à 16:41, Sasha Levin a écrit : From: Frederic Barrat [ Upstream commit 05dd7da76986937fb288b4213b1fa10dbe0d1b33 ] Hi, Upstream commit 05dd7da76986937fb288b4213b1fa10dbe0d1b33 doesn't really need to go to

Re: MCE handler gets NIP wrong on MPC8378

2020-02-20 Thread Radu Rendec
On 02/20/2020 at 3:38 AM Christophe Leroy wrote: > On 02/19/2020 10:39 PM, Radu Rendec wrote: > > On 02/19/2020 at 4:21 PM Christophe Leroy wrote: > >>> Interesting. > >>> > >>> 0x900 is the adress of the timer interrupt. > >>> > >>> Would the MCE occur just after the timer interrupt ? > > > > I

Re: [PATCH] selftest/lkdtm: Don't pollute 'git status'

2020-02-20 Thread Christophe Leroy
ping On 02/06/2020 08:11 AM, Christophe Leroy wrote: Commit 46d1a0f03d66 ("selftests/lkdtm: Add tests for LKDTM targets") added generation of lkdtm test scripts. Ignore those generated scripts when performing 'git status' Fixes: 46d1a0f03d66 ("selftests/lkdtm: Add tests for LKDTM targets")

Re: [PATCH v3 6/6] powerpc/fsl_booke/kaslr: rename kaslr-booke32.rst to kaslr-booke.rst and add 64bit part

2020-02-20 Thread Christophe Leroy
Le 06/02/2020 à 03:58, Jason Yan a écrit : Now we support both 32 and 64 bit KASLR for fsl booke. Add document for 64 bit part and rename kaslr-booke32.rst to kaslr-booke.rst. Signed-off-by: Jason Yan Cc: Scott Wood Cc: Diana Craciun Cc: Michael Ellerman Cc: Christophe Leroy Cc:

Re: [PATCH v3 5/6] powerpc/fsl_booke/64: clear the original kernel if randomized

2020-02-20 Thread Christophe Leroy
Le 06/02/2020 à 03:58, Jason Yan a écrit : The original kernel still exists in the memory, clear it now. No such problem with PPC32 ? Or is that common ? Christophe Signed-off-by: Jason Yan Cc: Scott Wood Cc: Diana Craciun Cc: Michael Ellerman Cc: Christophe Leroy Cc: Benjamin

Re: [PATCH v3 3/6] powerpc/fsl_booke/64: implement KASLR for fsl_booke64

2020-02-20 Thread Christophe Leroy
Le 06/02/2020 à 03:58, Jason Yan a écrit : The implementation for Freescale BookE64 is similar as BookE32. One difference is that Freescale BookE64 set up a TLB mapping of 1G during booting. Another difference is that ppc64 needs the kernel to be 64K-aligned. So we can randomize the kernel in

Re: [PATCH v3 2/6] powerpc/fsl_booke/64: introduce reloc_kernel_entry() helper

2020-02-20 Thread Christophe Leroy
Le 06/02/2020 à 03:58, Jason Yan a écrit : Like the 32bit code, we introduce reloc_kernel_entry() helper to prepare for the KASLR 64bit version. And move the C declaration of this function out of CONFIG_PPC32 and use long instead of int for the parameter 'addr'. Signed-off-by: Jason Yan Cc:

Re: [PATCH v3 1/6] powerpc/fsl_booke/kaslr: refactor kaslr_legal_offset() and kaslr_early_init()

2020-02-20 Thread Christophe Leroy
Le 06/02/2020 à 03:58, Jason Yan a écrit : Some code refactor in kaslr_legal_offset() and kaslr_early_init(). No functional change. This is a preparation for KASLR fsl_booke64. Signed-off-by: Jason Yan Cc: Scott Wood Cc: Diana Craciun Cc: Michael Ellerman Cc: Christophe Leroy Cc:

Re: [PATCH v3 1/5] powerpc: Rename current_stack_pointer() to current_stack_frame()

2020-02-20 Thread Christophe Leroy
Le 20/02/2020 à 12:51, Michael Ellerman a écrit : current_stack_pointer(), which was called __get_SP(), used to just return the value in r1. But that caused problems in some cases, so it was turned into a function in commit bfe9a2cfe91a ("powerpc: Reimplement __get_SP() as a function not a

Re: [PATCH v5 01/10] capabilities: introduce CAP_PERFMON to kernel and user space

2020-02-20 Thread Alexey Budankov
On 07.02.2020 16:39, Alexey Budankov wrote: > > On 07.02.2020 14:38, Thomas Gleixner wrote: >> Alexey Budankov writes: >>> On 22.01.2020 17:25, Alexey Budankov wrote: On 22.01.2020 17:07, Stephen Smalley wrote: >> It keeps the implementation simple and readable. The implementation is

[Bug 206525] BUG: KASAN: stack-out-of-bounds in test_bit+0x30/0x44 (kernel 5.6-rc1)

2020-02-20 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=206525 --- Comment #6 from Nikolay Aleksandrov (niko...@cumulusnetworks.com) --- Note that the bug wasn't introduced by my commit, but instead has been there since: commit 4f520900522f Author: Richard Guy Briggs Date: Tue Apr 22 21:31:54 2014

[PATCH v3 5/5] powerpc/irq: Use current_stack_pointer in do_IRQ()

2020-02-20 Thread Michael Ellerman
From: Christophe Leroy Until commit 7306e83ccf5c ("powerpc: Don't use CURRENT_THREAD_INFO to find the stack"), the current stack base address was obtained by calling current_thread_info(). That inline function was simply masking out the value of r1. In that commit, it was changed to using

[PATCH v3 4/5] powerpc/irq: use IS_ENABLED() in check_stack_overflow()

2020-02-20 Thread Michael Ellerman
From: Christophe Leroy Instead of #ifdef, use IS_ENABLED(CONFIG_DEBUG_STACKOVERFLOW). This enable GCC to check for code validity even when the option is not selected. Signed-off-by: Christophe Leroy Signed-off-by: Michael Ellerman Link:

[PATCH v3 3/5] powerpc/irq: Use current_stack_pointer in check_stack_overflow()

2020-02-20 Thread Michael Ellerman
From: Christophe Leroy The purpose of check_stack_overflow() is to verify that the stack has not overflowed. To really know whether the stack pointer is still within boundaries, the check must be done directly on the value of r1. So use current_stack_pointer, which returns the current value of

[PATCH v3 2/5] powerpc: Add current_stack_pointer as a register global

2020-02-20 Thread Michael Ellerman
From: Christophe Leroy current_stack_frame() doesn't return the stack pointer, but the caller's stack frame. See commit bfe9a2cfe91a ("powerpc: Reimplement __get_SP() as a function not a define") and commit acf620ecf56c ("powerpc: Rename __get_SP() to current_stack_pointer()") for details. In

[PATCH v3 1/5] powerpc: Rename current_stack_pointer() to current_stack_frame()

2020-02-20 Thread Michael Ellerman
current_stack_pointer(), which was called __get_SP(), used to just return the value in r1. But that caused problems in some cases, so it was turned into a function in commit bfe9a2cfe91a ("powerpc: Reimplement __get_SP() as a function not a define"). Because it's a function in a separate

[PATCH] powerpc: Include .BTF section

2020-02-20 Thread Naveen N. Rao
Selecting CONFIG_DEBUG_INFO_BTF results in the below warning from ld: ld: warning: orphan section `.BTF' from `.btf.vmlinux.bin.o' being placed in section `.BTF' Include .BTF section in vmlinux explicitly to fix the same. Signed-off-by: Naveen N. Rao --- arch/powerpc/kernel/vmlinux.lds.S |

[PATCH 5/8] powerpc/uapi: Introduce uapi header 'papr_scm_dsm.h' for papr_scm DSMs

2020-02-20 Thread Vaibhav Jain
Define and add a new uapi header for papr_scm describing device specific methods (DSMs) and structs for libndctl. PAPR-SCM specific implementation in libndctl will use these commands/structs to interact with papr_scm kernel module. Currently only DSMs to retrieve health and performance statistics

[PATCH 8/8] powerpc/papr_scm: Implement support for DSM_PAPR_SCM_HEALTH

2020-02-20 Thread Vaibhav Jain
The DSM 'DSM_PAPR_SCM_HEALTH' should return a 'struct nd_papr_scm_dimm_health_stat' containing information in dimm health back to user space in response to ND_CMD_CALL. We implement this DSM by implementing a new function papr_scm_get_health() that queries the DIMM health information and then

[PATCH 7/8] powerpc/papr_scm: Re-implement 'papr_flags' using 'nd_papr_scm_dimm_health_stat'

2020-02-20 Thread Vaibhav Jain
Previous commit [1] introduced 'struct nd_papr_scm_dimm_health_stat' for communicating health status of an nvdimm to libndctl. This struct however can also be used to cache the nvdimm health information in 'struct papr_scm_priv' instead of two '__be64' values. Benefit of this re-factoring will be

[PATCH 6/8] powerpc/papr_scm: Add support for handling PAPR DSM commands

2020-02-20 Thread Vaibhav Jain
Implement support for handling PAPR DSM commands in papr_scm module. We advertise support for ND_CMD_CALL for the dimm command mask and implement necessary scaffolding in the module to handle ND_CMD_CALL ioctl and DSM commands that we receive. The layout of the DSM commands as we expect from

[PATCH 4/8] UAPI: ndctl: Introduce NVDIMM_FAMILY_PAPR_SCM as a new NVDIMM DSM family

2020-02-20 Thread Vaibhav Jain
Add PAPR-scm family of DSM command-set to the white list of NVDIMM command sets. Signed-off-by: Vaibhav Jain --- include/uapi/linux/ndctl.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/uapi/linux/ndctl.h b/include/uapi/linux/ndctl.h index de5d90212409..99fb60600ef8 100644 ---

[PATCH 3/8] powerpc/papr_scm: Fetch dimm performance stats from PHYP

2020-02-20 Thread Vaibhav Jain
Implement support for fetching dimm performance metrics via H_SCM_PERFORMANCE_HEALTH hcall as documented in Ref[1]. The hcall returns a structure as described in Ref[1] and defined as newly introduced 'struct papr_scm_perf_stats'. The struct has a header followed by key-value pairs of performance

[PATCH 2/8] powerpc/papr_scm: Provide support for fetching dimm health information

2020-02-20 Thread Vaibhav Jain
Implement support for fetching dimm health information via H_SCM_HEALTH hcall as documented in Ref[1]. The hcall returns a pair of 64-bit big-endian integers which are then stored in 'struct papr_scm_priv' and subsequently exposed to userspace via dimm attribute 'papr_flags'. 'papr_flags' sysfs

[PATCH 1/8] powerpc: Add asm header 'papr_scm.h' describing the papr-scm interface

2020-02-20 Thread Vaibhav Jain
Add a new powerpc specific asm header named 'papr-scm.h' that descibes the interface between PHYP and guest kernel running as an LPAR. The HCALLs specific to managing SCM are descibed in Ref[1]. The asm header introduced by this patch however describes the data structures exchanged between PHYP

[PATCH 0/7] powerpc/papr_scm: Add support for reporting nvdimm health

2020-02-20 Thread Vaibhav Jain
The PAPR standard[1][3] provides suitable mechanisms to query the health and performance stats of an NVDIMM via various hcalls as described in Ref[2]. Until now these stats were never available nor exposed to the user-space tools like 'ndctl'. This is partly due to PAPR platform not having support

Re: [PATCH 8/8] perf/tools/pmu-events/powerpc: Add hv_24x7 socket/chip level metric events

2020-02-20 Thread maddy
On 2/14/20 4:33 PM, Kajol Jain wrote: The hv_24×7 feature in IBM® POWER9™ processor-based servers provide the facility to continuously collect large numbers of hardware performance metrics efficiently and accurately. This patch adds hv_24x7 json metric file for different Socket/chip

Re: [RESEND PATCH v2 9/9] ath5k: Constify ioreadX() iomem argument (as in generic implementation)

2020-02-20 Thread Jiri Slaby
On 19. 02. 20, 18:50, Krzysztof Kozlowski wrote: > The ioreadX() helpers have inconsistent interface. On some architectures > void *__iomem address argument is a pointer to const, on some not. > > Implementations of ioreadX() do not modify the memory under the address > so they can be converted

[PATCH 5/6] mm/mmu_gather: invalidate TLB correctly on batch allocation failure and flush

2020-02-20 Thread Santosh Sivaraj
From: Peter Zijlstra Architectures for which we have hardware walkers of Linux page table should flush TLB on mmu gather batch allocation failures and batch flush. Some architectures like POWER supports multiple translation modes (hash and radix) and in the case of POWER only radix translation

[PATCH 6/6] asm-generic/tlb: avoid potential double flush

2020-02-20 Thread Santosh Sivaraj
From: Peter Zijlstra Aneesh reported that: tlb_flush_mmu() tlb_flush_mmu_tlbonly() tlb_flush() <-- #1 tlb_flush_mmu_free() tlb_table_flush() tlb_table_invalidate() tlb_flush_mmu_tlbonly()

[PATCH 4/6] powerpc/mmu_gather: enable RCU_TABLE_FREE even for !SMP case

2020-02-20 Thread Santosh Sivaraj
From: "Aneesh Kumar K.V" Patch series "Fixup page directory freeing", v4. This is a repost of patch series from Peter with the arch specific changes except ppc64 dropped. ppc64 changes are added here because we are redoing the patch series on top of ppc64 changes. This makes it easy to

[PATCH 3/6] asm-generic/tlb, arch: Invert CONFIG_HAVE_RCU_TABLE_INVALIDATE

2020-02-20 Thread Santosh Sivaraj
From: Peter Zijlstra Make issuing a TLB invalidate for page-table pages the normal case. The reason is twofold: - too many invalidates is safer than too few, - most architectures use the linux page-tables natively and would thus require this. Make it an opt-out, instead of an opt-in. No

[PATCH 2/6] asm-generic/tlb: Track which levels of the page tables have been cleared

2020-02-20 Thread Santosh Sivaraj
From: Will Deacon It is common for architectures with hugepage support to require only a single TLB invalidation operation per hugepage during unmap(), rather than iterating through the mapping at a PAGE_SIZE increment. Currently, however, the level in the page table where the unmap() operation

[PATCH 1/6] asm-generic/tlb: Track freeing of page-table directories in struct mmu_gather

2020-02-20 Thread Santosh Sivaraj
From: Peter Zijlstra Some architectures require different TLB invalidation instructions depending on whether it is only the last-level of page table being changed, or whether there are also changes to the intermediate (directory) entries higher up the tree. Add a new bit to the flags bitfield

[PATCH 0/6] Memory corruption may occur due to incorrent tlb flush

2020-02-20 Thread Santosh Sivaraj
The TLB flush optimisation (a46cc7a90f: powerpc/mm/radix: Improve TLB/PWC flushes) may result in random memory corruption. Any concurrent page-table walk could end up with a Use-after-Free. Even on UP this might give issues, since mmu_gather is preemptible these days. An interrupt or preempted

Re: MCE handler gets NIP wrong on MPC8378

2020-02-20 Thread Christophe Leroy
On 02/19/2020 10:39 PM, Radu Rendec wrote: On 02/19/2020 at 4:21 PM Christophe Leroy wrote: Radu Rendec a écrit : On 02/19/2020 at 10:11 AM Radu Rendec wrote: On 02/18/2020 at 1:08 PM Christophe Leroy wrote: Le 18/02/2020 à 18:07, Radu Rendec a écrit : The saved NIP seems to be

[PATCH] powerpc/xive: Enforce load-after-store ordering when StoreEOI is active

2020-02-20 Thread Cédric Le Goater
When an interrupt has been handled, the OS notifies the interrupt controller with a EOI sequence. On a POWER9 system using the XIVE interrupt controller, this can be done with a load or a store operation on the ESB interrupt management page of the interrupt. The StoreEOI operation has less latency