Re: [PATCH v4 2/2] powerpc/rtas: Implement reentrant rtas call

Excerpts from Leonardo Bras's message of May 15, 2020 9:51 am: > Implement rtas_call_reentrant() for reentrant rtas-calls: > "ibm,int-on", "ibm,int-off",ibm,get-xive" and "ibm,set-xive". > > On LoPAPR Version 1.1 (March 24, 2016), from 7.3.10.1 to 7.3.10.4, > items 2 and 3 say: > > 2 - For the P

Re: [PATCH] tty: hvc: Fix data abort due to race in hvc_open

On Thu, May 14, 2020 at 04:22:10PM -0700, rana...@codeaurora.org wrote: > On 2020-05-13 00:04, Greg KH wrote: > > On Tue, May 12, 2020 at 02:39:50PM -0700, rana...@codeaurora.org wrote: > > > On 2020-05-12 01:25, Greg KH wrote: > > > > On Tue, May 12, 2020 at 09:22:15AM +0200, Jiri Slaby wrote: > >

Re: [PATCH v8 08/30] powerpc: Use a function for getting the instruction op code

mpe, as suggested by Christophe could you please add this. diff --git a/arch/powerpc/include/asm/inst.h b/arch/powerpc/include/asm/inst.h --- a/arch/powerpc/include/asm/inst.h +++ b/arch/powerpc/include/asm/inst.h @@ -2,6 +2,8 @@ #ifndef _ASM_INST_H #define _ASM_INST_H +#include + /* * Instr

Re: [PATCH v8 23/30] powerpc: Add prefixed instructions to instruction data type

Hey mpe, fixes for the issues highlighted by Christophe, except KUAP as discussed. Will make the optprobe change as a preceding patch. diff --git a/arch/powerpc/include/asm/inst.h b/arch/powerpc/include/asm/inst.h --- a/arch/powerpc/include/asm/inst.h +++ b/arch/powerpc/include/asm/inst.h @@ -11,9

Re: [PATCH v8 24/30] powerpc: Test prefixed code patching

Hey mpe could you add this please. diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c --- a/arch/powerpc/lib/code-patching.c +++ b/arch/powerpc/lib/code-patching.c @@ -707,7 +707,7 @@ static void __init test_translate_branch(void) vfree(buf); } -#ifdef __powerpc

Re: [PATCH v8 25/30] powerpc: Test prefixed instructions in feature fixups

Hey mpe, could you add this thanks. diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c --- a/arch/powerpc/lib/feature-fixups.c +++ b/arch/powerpc/lib/feature-fixups.c @@ -689,7 +689,7 @@ static void test_lwsync_macros(void) } } -#ifdef __powerpc64__ +#ifdef CO

Re: [PATCH v8 29/30] powerpc sstep: Add support for prefixed load/stores

mpe, and this thanks. diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c --- a/arch/powerpc/lib/sstep.c +++ b/arch/powerpc/lib/sstep.c @@ -1204,7 +1204,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, struct ppc_inst instr) { unsigned

Re: [PATCH v8 30/30] powerpc sstep: Add support for prefixed fixed-point arithmetic

mpe, and this thanks. --- diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c --- a/arch/powerpc/lib/sstep.c +++ b/arch/powerpc/lib/sstep.c @@ -1343,7 +1343,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, rd = (suffix >> 21) & 0x1f; op->r

Re: [PATCH 2/3] ASoC: fsl_esai: Add support for imx8qm

On Tue, May 12, 2020 at 8:38 PM Mark Brown wrote: > > On Tue, May 12, 2020 at 10:48:41AM +0800, Shengjiu Wang wrote: > > On Wed, May 6, 2020 at 10:33 AM Shengjiu Wang > > wrote: > > > On Fri, May 1, 2020 at 6:23 PM Mark Brown wrote: > > > > > > EDMA requires the period size to be multiple of ma

[PATCH v2 1/2] ASoC: fsl_esai: introduce SoC specific data

Introduce a SoC specific data structure which contains the differences between the different SoCs. This makes it easier to support more differences without having to introduce a new if/else each time. Signed-off-by: Shengjiu Wang Acked-by: Nicolin Chen --- sound/soc/fsl/fsl_esai.c | 46

[PATCH v2 0/2] ASoC: fsl_esai: Add support for imx8qm

Add support for imx8qm. Shengjiu Wang (2): ASoC: fsl_esai: introduce SoC specific data ASoC: fsl_esai: Add new compatible string for imx8qm Changes in v2 - drop the 0002 patch in v1, the dma relate limitation should be done in dma driver, or define a new DMA API for it. .../devicetree/bi

[PATCH v2 2/2] ASoC: fsl_esai: Add new compatible string for imx8qm

Add new compatible string "fsl,imx8qm-esai" in the binding document. Signed-off-by: Shengjiu Wang Acked-by: Rob Herring --- Documentation/devicetree/bindings/sound/fsl,esai.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/sound/fsl,esai.txt b/Documentat

Re: [PATCH v2 0/2] ASoC: fsl_esai: Add support for imx8qm

On Fri, 15 May 2020 18:10:49 +0800, Shengjiu Wang wrote: > Add support for imx8qm. > > Shengjiu Wang (2): > ASoC: fsl_esai: introduce SoC specific data > ASoC: fsl_esai: Add new compatible string for imx8qm > > Changes in v2 > - drop the 0002 patch in v1, the dma relate limitation should >

[PATCH 01/29] arm: fix the flush_icache_range arguments in set_fiq_handler

The arguments passed look bogus, try to fix them to something that seems to make sense. Signed-off-by: Christoph Hellwig --- arch/arm/kernel/fiq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c index cd1234c103fcd..98ca3e3fa8

sort out the flush_icache_range mess v2

Hi all, flush_icache_range is mostly used for kernel address, except for the following cases: - the nommu brk and mmap implementations, - the read_code helper that is only used for binfmt_flat, binfmt_elf_fdpic, and binfmt_aout including the broken ia32 compat version - binfmt_flat itself,

[PATCH 02/29] nds32: unexport flush_icache_page

flush_icache_page is only used by mm/memory.c. Signed-off-by: Christoph Hellwig --- arch/nds32/mm/cacheflush.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/nds32/mm/cacheflush.c b/arch/nds32/mm/cacheflush.c index 254703653b6f5..8f168b33065fa 100644 --- a/arch/nds32/mm/cacheflush.c +++

[PATCH 03/29] powerpc: unexport flush_icache_user_range

flush_icache_user_range is only used by copy_to_user_page, which is only used by core VM code. Signed-off-by: Christoph Hellwig --- arch/powerpc/mm/mem.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c index 041ed7cfd341a..f0d1bf0a8e14f 100644 ---

[PATCH 04/29] unicore32: remove flush_cache_user_range

flush_cache_user_range is an ARMism not used by any generic or unicore32 specific code. Signed-off-by: Christoph Hellwig --- arch/unicore32/include/asm/cacheflush.h | 8 1 file changed, 8 deletions(-) diff --git a/arch/unicore32/include/asm/cacheflush.h b/arch/unicore32/include/asm/ca

[PATCH 05/29] asm-generic: fix the inclusion guards for cacheflush.h

cacheflush.h uses a somewhat to generic include guard name that clashes with various arch files. Use a more specific one. Signed-off-by: Christoph Hellwig --- include/asm-generic/cacheflush.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/asm-generic/cacheflus

[PATCH 06/29] asm-generic: don't include in cacheflush.h

This seems to lead to some crazy include loops when using asm-generic/cacheflush.h on more architectures, so leave it to the arch header for now. Signed-off-by: Christoph Hellwig --- arch/um/include/asm/tlb.h | 2 ++ arch/x86/include/asm/cacheflush.h | 2 ++ drivers/nvdimm/pmem.c

[PATCH 07/29] asm-generic: improve the flush_dcache_page stub

There is a magic ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE cpp symbol that guards non-stub availability of flush_dcache_pagge. Use that to check if flush_dcache_pagg is implemented. Signed-off-by: Christoph Hellwig --- include/asm-generic/cacheflush.h | 6 +++--- 1 file changed, 3 insertions(+), 3 dele

[PATCH 08/29] alpha: use asm-generic/cacheflush.h

Alpha needs almost no cache flushing routines of its own. Rely on asm-generic/cacheflush.h for the defaults. Signed-off-by: Christoph Hellwig --- arch/alpha/include/asm/cacheflush.h | 28 ++-- 1 file changed, 6 insertions(+), 22 deletions(-) diff --git a/arch/alpha/incl

[PATCH 10/29] c6x: use asm-generic/cacheflush.h

C6x needs almost no cache flushing routines of its own. Rely on asm-generic/cacheflush.h for the defaults. Signed-off-by: Christoph Hellwig --- arch/c6x/include/asm/cacheflush.h | 19 +-- 1 file changed, 1 insertion(+), 18 deletions(-) diff --git a/arch/c6x/include/asm/cacheflu

[PATCH 11/29] hexagon: use asm-generic/cacheflush.h

Hexagon needs almost no cache flushing routines of its own. Rely on asm-generic/cacheflush.h for the defaults. Signed-off-by: Christoph Hellwig --- arch/hexagon/include/asm/cacheflush.h | 19 +-- 1 file changed, 5 insertions(+), 14 deletions(-) diff --git a/arch/hexagon/include

[PATCH 09/29] arm64: use asm-generic/cacheflush.h

ARM64 needs almost no cache flushing routines of its own. Rely on asm-generic/cacheflush.h for the defaults. Signed-off-by: Christoph Hellwig --- arch/arm64/include/asm/cacheflush.h | 46 - 1 file changed, 5 insertions(+), 41 deletions(-) diff --git a/arch/arm64/inc

[PATCH 15/29] openrisc: use asm-generic/cacheflush.h

OpenRISC needs almost no cache flushing routines of its own. Rely on asm-generic/cacheflush.h for the defaults. Signed-off-by: Christoph Hellwig --- arch/openrisc/include/asm/cacheflush.h | 31 +- 1 file changed, 6 insertions(+), 25 deletions(-) diff --git a/arch/openri

[PATCH 13/29] microblaze: use asm-generic/cacheflush.h

Microblaze needs almost no cache flushing routines of its own. Rely on asm-generic/cacheflush.h for the defaults. Signed-off-by: Christoph Hellwig --- arch/microblaze/include/asm/cacheflush.h | 29 ++-- 1 file changed, 2 insertions(+), 27 deletions(-) diff --git a/arch/micr

[PATCH 12/29] ia64: use asm-generic/cacheflush.h

IA64 needs almost no cache flushing routines of its own. Rely on asm-generic/cacheflush.h for the defaults. Signed-off-by: Christoph Hellwig --- arch/ia64/include/asm/cacheflush.h | 28 +++- 1 file changed, 3 insertions(+), 25 deletions(-) diff --git a/arch/ia64/include

[PATCH 14/29] m68knommu: use asm-generic/cacheflush.h

m68knommu needs almost no cache flushing routines of its own. Rely on asm-generic/cacheflush.h for the defaults. Signed-off-by: Christoph Hellwig Acked-by: Greg Ungerer --- arch/m68k/include/asm/cacheflush_no.h | 19 ++- 1 file changed, 2 insertions(+), 17 deletions(-) diff --

[PATCH 16/29] powerpc: use asm-generic/cacheflush.h

Power needs almost no cache flushing routines of its own. Rely on asm-generic/cacheflush.h for the defaults. Also remove the pointless __KERNEL__ ifdef while we're at it. Signed-off-by: Christoph Hellwig --- arch/powerpc/include/asm/cacheflush.h | 42 +++ 1 file changed

[PATCH 17/29] riscv: use asm-generic/cacheflush.h

RISC-V needs almost no cache flushing routines of its own. Rely on asm-generic/cacheflush.h for the defaults. Also remove the pointless __KERNEL__ ifdef while we're at it. Signed-off-by: Christoph Hellwig Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt --- arch/riscv/include/asm/cachefl

[PATCH 18/29] arm,sparc,unicore32: remove flush_icache_user_range

flush_icache_user_range is only used by , so remove it from the architectures that implement it, but don't use . Signed-off-by: Christoph Hellwig --- arch/arm/include/asm/cacheflush.h | 3 --- arch/sparc/include/asm/cacheflush_32.h | 2 -- arch/sparc/include/asm/cacheflush_64.h | 1 - ar

[PATCH 20/29] asm-generic: add a flush_icache_user_range stub

Define flush_icache_user_range to flush_icache_range unless the architecture provides its own implementation. Signed-off-by: Christoph Hellwig --- include/asm-generic/cacheflush.h | 4 1 file changed, 4 insertions(+) diff --git a/include/asm-generic/cacheflush.h b/include/asm-generic/cache

[PATCH 19/29] mm: rename flush_icache_user_range to flush_icache_user_page

The function currently known as flush_icache_user_range only operates on a single page. Rename it to flush_icache_user_page as we'll need the name flush_icache_user_range for something else soon. Signed-off-by: Christoph Hellwig Acked-by: Geert Uytterhoeven --- arch/alpha/include/asm/cacheflus

[PATCH 21/29] sh: implement flush_icache_user_range

The SuperH implementation of flush_icache_range seems to be able to cope with user addresses. Just define flush_icache_user_range to flush_icache_range. Signed-off-by: Christoph Hellwig --- arch/sh/include/asm/cacheflush.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/sh/include/asm/

[PATCH 22/29] xtensa: implement flush_icache_user_range

The Xtensa implementation of flush_icache_range seems to be able to cope with user addresses. Just define flush_icache_user_range to flush_icache_range. Signed-off-by: Christoph Hellwig --- arch/xtensa/include/asm/cacheflush.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/xtensa/in

[PATCH 23/29] arm: rename flush_cache_user_range to flush_icache_user_range

flush_icache_user_range will be the name for a generic primitive. Move the arm name so that arm already has an implementation. Signed-off-by: Christoph Hellwig --- arch/arm/include/asm/cacheflush.h | 4 ++-- arch/arm/kernel/traps.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(

[PATCH 25/29] exec: only build read_code when needed

Only build read_code when binary formats that use it are built into the kernel. Signed-off-by: Christoph Hellwig --- fs/exec.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/fs/exec.c b/fs/exec.c index 06b4c550af5d9..a4f766f296f8f 100644 --- a/fs/exec.c +++ b/fs/exec.c @@ -1027,6 +1027,8

[PATCH 24/29] m68k: implement flush_icache_user_range

Rename the current flush_icache_range to flush_icache_user_range as per commit ae92ef8a4424 ("PATCH] flush icache in correct context") there seems to be an assumption that it operates on user addresses. Add a flush_icache_range around it that for now is a no-op. Signed-off-by: Christoph Hellwig

[PATCH 26/29] exec: use flush_icache_user_range in read_code

read_code operates on user addresses. Signed-off-by: Christoph Hellwig --- fs/exec.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fs/exec.c b/fs/exec.c index a4f766f296f8f..c541867316a63 100644 --- a/fs/exec.c +++ b/fs/exec.c @@ -1033,7 +1033,7 @@ ssize_t read_code(struct

[PATCH 29/29] module: move the set_fs hack for flush_icache_range to m68k

flush_icache_range generally operates on kernel addresses, but for some reason m68k needed a set_fs override. Move that into the m68k code insted of keeping it in the module loader. Signed-off-by: Christoph Hellwig Reviewed-by: Geert Uytterhoeven Acked-by: Geert Uytterhoeven --- arch/m68k/mm/

[PATCH 28/29] nommu: use flush_icache_user_range in brk and mmap

These obviously operate on user addresses. Signed-off-by: Christoph Hellwig --- mm/nommu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/mm/nommu.c b/mm/nommu.c index 318df4e236c99..aed7acaed2383 100644 --- a/mm/nommu.c +++ b/mm/nommu.c @@ -443,7 +443,7 @@ SYSCALL_DEFIN

[PATCH 27/29] binfmt_flat: use flush_icache_user_range

load_flat_file works on user addresses. Signed-off-by: Christoph Hellwig Acked-by: Greg Ungerer --- fs/binfmt_flat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fs/binfmt_flat.c b/fs/binfmt_flat.c index 831a2b25ba79f..6f0aca5379da2 100644 --- a/fs/binfmt_flat.c +++ b/fs/

Re: [PATCH v4 03/14] arm64: add support for folded p4d page tables

On Tue, 14 Apr 2020 18:34:44 +0300 Mike Rapoport wrote: > Implement primitives necessary for the 4th level folding, add walks of p4d > level where appropriate, replace 5level-fixup.h with pgtable-nop4d.h and > remove __ARCH_USE_5LEVEL_HACK. This needed some rework due to arm changes in linux-nex

[PATCH v4 3/6] printk: Introduce kmsg_dump_reason_str()

The pstore subsystem already had a private version of this function. With the coming addition of the pstore/zone driver, this needs to be shared. As it really should live with printk, move it there instead. Link: https://lore.kernel.org/lkml/20200510202436.63222-8-keesc...@chromium.org/ Acked-by:

[PATCH v4 5/6] pstore/ram: Introduce max_reason and convert dump_oops

Now that pstore_register() can correctly pass max_reason to the kmesg dump facility, introduce a new "max_reason" module parameter and "max-reason" Device Tree field. The "dump_oops" module parameter and "dump-oops" Device Tree field are now considered deprecated, but are now automatically convert

[PATCH v4 4/6] pstore/platform: Pass max_reason to kmesg dump

From: Pavel Tatashin Add a new member to struct pstore_info for passing information about kmesg dump maximum reason. This allows a finer control of what kmesg dumps are sent to pstore storage backends. Those backends that do not explicitly set this field (keeping it equal to 0), get the default

[PATCH v4 1/6] printk: Collapse shutdown types into a single dump reason

To turn the KMSG_DUMP_* reasons into a more ordered list, collapse the redundant KMSG_DUMP_(RESTART|HALT|POWEROFF) reasons into KMSG_DUMP_SHUTDOWN. The current users already don't meaningfully distinguish between them, so there's no need to, as discussed here: https://lore.kernel.org/lkml/ca+ck2bap

[PATCH v4 2/6] printk: honor the max_reason field in kmsg_dumper

From: Pavel Tatashin kmsg_dump() allows to dump kmesg buffer for various system events: oops, panic, reboot, etc. It provides an interface to register a callback call for clients, and in that callback interface there is a field "max_reason" which gets ignored unless always_kmsg_dump is passed as

[PATCH v4 0/6] allow ramoops to collect all kmesg_dump events

Hello! I wanted to get the pstore tree nailed down, so here's the v4 of Pavel's series, tweaked for the feedback during v3 review. -Kees v4: - rebase on pstore tree - collapse shutdown types into a single dump reason https://lore.kernel.org/lkml/ca+ck2bapv5u1ih5y9t5funtyximtfctdyxjcpuyjoyhnok

[PATCH v4 6/6] ramoops: Add max_reason optional field to ramoops DT node

From: Pavel Tatashin Currently, it is possible to dump kmsges for panic, or oops. With max_reason it is possible to dump messages for other kmesg_dump events, for example reboot, halt, shutdown, kexec. Signed-off-by: Pavel Tatashin Link: https://lore.kernel.org/lkml/20200506211523.15077-6-keesc

Re: [PATCH v4 0/6] allow ramoops to collect all kmesg_dump events

On Fri, May 15, 2020 at 2:44 PM Kees Cook wrote: > > Hello! > > I wanted to get the pstore tree nailed down, so here's the v4 of > Pavel's series, tweaked for the feedback during v3 review. Hi Kees, Thank you, I was planning to send a new version of this series later today. Let me quickly review

Re: [PATCH v4 1/6] printk: Collapse shutdown types into a single dump reason

On Fri, May 15, 2020 at 2:44 PM Kees Cook wrote: > > To turn the KMSG_DUMP_* reasons into a more ordered list, collapse > the redundant KMSG_DUMP_(RESTART|HALT|POWEROFF) reasons into > KMSG_DUMP_SHUTDOWN. The current users already don't meaningfully > distinguish between them, so there's no need t

Re: [PATCH] tty: hvc: Fix data abort due to race in hvc_open

On 2020-05-15 00:30, Greg KH wrote: On Thu, May 14, 2020 at 04:22:10PM -0700, rana...@codeaurora.org wrote: On 2020-05-13 00:04, Greg KH wrote: > On Tue, May 12, 2020 at 02:39:50PM -0700, rana...@codeaurora.org wrote: > > On 2020-05-12 01:25, Greg KH wrote: > > > On Tue, May 12, 2020 at 09:22:15

Re: [PATCH v4 3/6] printk: Introduce kmsg_dump_reason_str()

On Fri, May 15, 2020 at 2:44 PM Kees Cook wrote: > > The pstore subsystem already had a private version of this function. > With the coming addition of the pstore/zone driver, this needs to be > shared. As it really should live with printk, move it there instead. > > Link: > https://lore.kernel.o

Re: [PATCH v4 5/6] pstore/ram: Introduce max_reason and convert dump_oops

> #define parse_u32(name, field, default_value) { > \ > ret = ramoops_parse_dt_u32(pdev, name, default_value, \ The series seems to be missing the patch where ramoops_parse_dt_size -> ramoops_parse_dt_u32 get renamed, and updated to handle default

Re: [PATCH v4 5/6] pstore/ram: Introduce max_reason and convert dump_oops

pdata.dump_oops = dump_oops; > + /* If "max_reason" is set, its value has priority over "dump_oops". */ > + if (ramoops_max_reason != -1) > + pdata.max_reason = ramoops_max_reason; (ramoops_max_reason >= 0) might make more sense here, we do not want negative max_reason

Re: [PATCH v4 5/6] pstore/ram: Introduce max_reason and convert dump_oops

On Fri, May 15, 2020 at 03:30:27PM -0400, Pavel Tatashin wrote: > > #define parse_u32(name, field, default_value) { > > \ > > ret = ramoops_parse_dt_u32(pdev, name, default_value, \ > > The series seems to be missing the patch where ramoops_parse_

Re: [PATCH v4 5/6] pstore/ram: Introduce max_reason and convert dump_oops

On Fri, May 15, 2020 at 03:40:14PM -0400, Pavel Tatashin wrote: > pdata.dump_oops = dump_oops; > > + /* If "max_reason" is set, its value has priority over "dump_oops". > > */ > > + if (ramoops_max_reason != -1) > > + pdata.max_reason = ramoops_max_reason; > > (ramoops

Re: [PATCH v2 00/12] mm: consolidate definitions of page table accessors

On Thu, 14 May 2020 20:03:15 +0300 Mike Rapoport wrote: > The low level page table accessors (pXY_index(), pXY_offset()) are > duplicated across all architectures and sometimes more than once. For > instance, we have 31 definition of pgd_offset() for 25 supported > architectures. > > Most of the

powerpc/pci: [PATCH 1/1 V2] PCIE PHB reset

From: Wen Xiong Several device drivers hit EEH(Extended Error handling) when triggering kdump on Pseries PowerVM. This patch implemented a reset of the PHBs in pci general code. PHB reset stop all PCI transactions from previous kernel. We have tested the patch in several enviroments: - direct slo

Re: powerpc/pci: [PATCH 1/1 V2] PCIE PHB reset

Hi Xiong, On 5/15/20 5:04 PM, wenxi...@linux.vnet.ibm.com wrote: From: Wen Xiong Several device drivers hit EEH(Extended Error handling) when triggering kdump on Pseries PowerVM. This patch implemented a reset of the PHBs in pci general code. PHB reset stop all PCI transactions from previous k

Re: [PATCH v4 2/2] powerpc/rtas: Implement reentrant rtas call

Hello Nick, On Fri, 2020-05-15 at 17:30 +1000, Nicholas Piggin wrote: > Excerpts from Leonardo Bras's message of May 15, 2020 9:51 am: > > Implement rtas_call_reentrant() for reentrant rtas-calls: > > "ibm,int-on", "ibm,int-off",ibm,get-xive" and "ibm,set-xive". > > > > On LoPAPR Version 1.1 (Ma

[PATCH v5 0/2] Implement reentrant rtas call

Patch 2 implement rtas_call_reentrant() for reentrant rtas-calls: "ibm,int-on", "ibm,int-off",ibm,get-xive" and "ibm,set-xive", according to LoPAPR Version 1.1 (March 24, 2016). For that, it's necessary that every call uses a different rtas buffer (rtas_args). Paul Mackerras suggested using the P

[PATCH v5 1/2] powerpc/rtas: Move type/struct definitions from rtas.h into rtas-types.h

In order to get any rtas* struct into other headers, including rtas.h may cause a lot of errors, regarding include dependency needed for inline functions. Create rtas-types.h and move there all type/struct definitions from rtas.h, then include rtas-types.h into rtas.h. Also, as suggested by check

[PATCH v5 2/2] powerpc/rtas: Implement reentrant rtas call

Implement rtas_call_reentrant() for reentrant rtas-calls: "ibm,int-on", "ibm,int-off",ibm,get-xive" and "ibm,set-xive". On LoPAPR Version 1.1 (March 24, 2016), from 7.3.10.1 to 7.3.10.4, items 2 and 3 say: 2 - For the PowerPC External Interrupt option: The * call must be reentrant to the number