tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
next-test
branch HEAD: 8b1bcbb263cc04d8bb9e57d64eda7cffc3dbc1aa MAINTAINERS: Remove self
from powerpc EEH
elapsed time: 1028m
configs tested: 98
configs skipped: 1
The following configs have been built
From: Peter Zijlstra
commit 0ed1325967ab5f7a4549a2641c6ebe115f76e228 upstream
Architectures for which we have hardware walkers of Linux page table
should flush TLB on mmu gather batch allocation failures and batch flush.
Some architectures like POWER supports multiple translation modes (hash
From: "Aneesh Kumar K.V"
commit 12e4d53f3f04e81f9e83d6fc10edc7314ab9f6b9 upstream
The TLB flush optimisation (a46cc7a90f: powerpc/mm/radix: Improve TLB/PWC
flushes) may result in random memory corruption.
On any SMP system, freeing page directories should observe the exact same
order as normal
On Tue, Jun 30, 2020 at 8:09 PM Aneesh Kumar K.V
wrote:
>
> On 7/1/20 1:15 AM, Dan Williams wrote:
> > On Tue, Jun 30, 2020 at 2:21 AM Aneesh Kumar K.V
> > wrote:
> > [..]
> The bio argument isn't for range based flushing, it is for flush
> operations that need to complete
On 7/1/20 1:15 AM, Dan Williams wrote:
On Tue, Jun 30, 2020 at 2:21 AM Aneesh Kumar K.V
wrote:
[..]
The bio argument isn't for range based flushing, it is for flush
operations that need to complete asynchronously.
How does the block layer determine that the pmem device needs
asynchronous
Hi again,
Thanks for your work so far!
On Tue, Jun 30, 2020 at 06:53:39PM +, Christophe Leroy wrote:
> On 06/30/2020 04:33 PM, Segher Boessenkool wrote:
> >>>+ make -s CC=powerpc64-linux-gnu-gcc -j 160
> >>>In file included from /linux/include/linux/uaccess.h:11:0,
> >>>
Use the general page fault accounting by passing regs into handle_mm_fault().
CC: Michael Ellerman
CC: Benjamin Herrenschmidt
CC: Paul Mackerras
CC: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Peter Xu
---
arch/powerpc/mm/fault.c | 11 +++
1 file changed, 3 insertions(+), 8
On Mon, Jun 15, 2020 at 09:32:17AM +0200, refactormys...@gmail.com wrote:
> Bolarinwa Olayemi Saheed (8):
> IB/hfi1: Convert PCIBIOS_* errors to generic -E* errors
> IB/hfi1: Convert PCIBIOS_* errors to generic -E* errors
Applied to rdma for-next thanks
Jason
On Tue, Jun 30, 2020 at 2:21 AM Aneesh Kumar K.V
wrote:
[..]
> >> The bio argument isn't for range based flushing, it is for flush
> >> operations that need to complete asynchronously.
> > How does the block layer determine that the pmem device needs
> > asynchronous fushing?
> >
>
>
On Tue, Jun 30, 2020 at 5:48 AM Aneesh Kumar K.V
wrote:
>
>
> Update patch.
>
> From 1e6aa6c4182e14ec5d6bf878ae44c3f69ebff745 Mon Sep 17 00:00:00 2001
> From: "Aneesh Kumar K.V"
> Date: Tue, 12 May 2020 20:58:33 +0530
> Subject: [PATCH] libnvdimm/nvdimm/flush: Allow architecture to override the
On 6/30/20 12:21 PM, Jens Axboe wrote:
> On 6/30/20 12:19 PM, Christoph Hellwig wrote:
>> On Tue, Jun 30, 2020 at 09:43:31AM -0600, Jens Axboe wrote:
>>> On 6/30/20 7:57 AM, Jens Axboe wrote:
On 6/29/20 1:39 PM, Christoph Hellwig wrote:
> Hi Jens,
>
> this series moves the
On 06/30/2020 04:33 PM, Segher Boessenkool wrote:
On Tue, Jun 30, 2020 at 04:55:05PM +0200, Christophe Leroy wrote:
Le 30/06/2020 à 03:19, Michael Ellerman a écrit :
Michael Ellerman writes:
Because it uses the "m<>" constraint which didn't work on GCC 4.6.
On Mon, Jun 29, 2020 at 10:58 PM Viresh Kumar wrote:
>
> Hi,
>
> I have picked Quentin's series over my patch, modified both and tested.
>
> V3->V4:
> - Do __module_get() for cpufreq_default_governor() case as well and get
> rid of an extra variable.
> - Use a single character array,
On 6/30/20 12:19 PM, Christoph Hellwig wrote:
> On Tue, Jun 30, 2020 at 09:43:31AM -0600, Jens Axboe wrote:
>> On 6/30/20 7:57 AM, Jens Axboe wrote:
>>> On 6/29/20 1:39 PM, Christoph Hellwig wrote:
Hi Jens,
this series moves the make_request_fn method into block_device_operations
On Tue, Jun 30, 2020 at 09:43:31AM -0600, Jens Axboe wrote:
> On 6/30/20 7:57 AM, Jens Axboe wrote:
> > On 6/29/20 1:39 PM, Christoph Hellwig wrote:
> >> Hi Jens,
> >>
> >> this series moves the make_request_fn method into block_device_operations
> >> with the much more descriptive ->submit_bio
https://bugzilla.kernel.org/show_bug.cgi?id=208181
--- Comment #9 from Erhard F. (erhar...@mailbox.org) ---
Ok, thanks for the clarification! So if KASAN works properly something else
must cause this hit. I will start a bisect the next few days and see how that
turns out...
--
You are receiving
As pointed out by Michael Ellerman, the ptrace ABI on powerpc does not
allow or require the return code to be set on syscall entry when
skipping the syscall. It will always return ENOSYS and the return code
must be set on syscall exit.
This code does that, behaving more similarly to strace. It
On Tue, Jun 30, 2020 at 04:55:05PM +0200, Christophe Leroy wrote:
> Le 30/06/2020 à 03:19, Michael Ellerman a écrit :
> >Michael Ellerman writes:
> >>Because it uses the "m<>" constraint which didn't work on GCC 4.6.
> >>
> >>https://github.com/linuxppc/issues/issues/297
> >>
> >>So we should be
On 6/30/20 7:57 AM, Jens Axboe wrote:
> On 6/29/20 1:39 PM, Christoph Hellwig wrote:
>> Hi Jens,
>>
>> this series moves the make_request_fn method into block_device_operations
>> with the much more descriptive ->submit_bio name. It then also gives
>> generic_make_request a more descriptive name,
Le 30/06/2020 à 03:19, Michael Ellerman a écrit :
Michael Ellerman writes:
Christophe Leroy writes:
Hi Michael,
I see this patch is marked as "defered" in patchwork, but I can't see
any related discussion. Is it normal ?
Because it uses the "m<>" constraint which didn't work on GCC
On Tue, Jun 30, 2020 at 11:07 AM Shengjiu Wang wrote:
>
> The ASRC not only supports ideal ratio mode, but also supports
> internal ratio mode.
>
> For internal rato mode, the rate of clock source should be divided
> with no remainder by sample rate, otherwise there is sound
> distortion.
>
> Add
The ASRC not only supports ideal ratio mode, but also supports
internal ratio mode.
For internal rato mode, the rate of clock source should be divided
with no remainder by sample rate, otherwise there is sound
distortion.
Add function fsl_asrc_select_clk() to find proper clock source for
A nice attempt was made to provide kerneldoc headers for
read_template_version() and read_afu_lpc_memory_info() however,
the provided formatting does not match what is expected by
kerneldoc.
Fixes the following W=1 warnings:
drivers/misc/ocxl/config.c:286: warning: Function parameter or member
On 6/29/20 1:39 PM, Christoph Hellwig wrote:
> Hi Jens,
>
> this series moves the make_request_fn method into block_device_operations
> with the much more descriptive ->submit_bio name. It then also gives
> generic_make_request a more descriptive name, and further optimize the
> path to issue to
Function headers will need a lot of work before they reach the
standards expected of kerneldoc. Demote them down to basic
comments/headers, for now at least.
Fixes the following W=1 kernel build warnings:
drivers/misc/cxl/hcalls.c:175: warning: Function parameter or member
'unit_address' not
The DRC index pointer us updated on an OPCODE_ADD, but never
actually read. Remove the used pointer and shift up OPCODE_ADD
to group with OPCODE_DELETE which also provides a noop.
Fixes the following W=1 kernel build warning:
drivers/misc/cxl/flash.c: In function ‘update_devicetree’:
On 6/29/20 1:39 PM, Christoph Hellwig wrote:
> All bios can get remapped if submitted to partitions. No need to
> comment on that.
I'm pretty sure that comment is from me, dating back to when the bio
code was introduced in 2001. The point wasn't the remapping, just
that from here on down the IO
On Tue, Jun 30, 2020 at 8:38 PM Fabio Estevam wrote:
>
> Hi Shengjiu,
>
> On Mon, Jun 29, 2020 at 11:10 AM Shengjiu Wang wrote:
>
> > +/**
>
> "/**" notation may confuse 'make htmldocs". Since this is a single
> line comment you could do:
>
> /* Select proper clock source for internal ratio mode
Update patch.
>From 1e6aa6c4182e14ec5d6bf878ae44c3f69ebff745 Mon Sep 17 00:00:00 2001
From: "Aneesh Kumar K.V"
Date: Tue, 12 May 2020 20:58:33 +0530
Subject: [PATCH] libnvdimm/nvdimm/flush: Allow architecture to override the
flush barrier
Architectures like ppc64 provide persistent memory
Hi Shengjiu,
On Mon, Jun 29, 2020 at 11:10 AM Shengjiu Wang wrote:
> +/**
"/**" notation may confuse 'make htmldocs". Since this is a single
line comment you could do:
/* Select proper clock source for internal ratio mode */
> + * Select proper clock source for internal ratio mode
> + */
>
https://bugzilla.kernel.org/show_bug.cgi?id=208181
--- Comment #8 from Christophe Leroy (christophe.le...@csgroup.eu) ---
block_address_translation contains funny sizes. But the adresses seems ok.
So it shows you have a 24 Mb text+rodata area. 8 BATs are used
(16+8+8+32+64+128+256+256)
By
On Thu, 25 Jun 2020 22:27:21 +0530, Harish wrote:
> We use OUTPUT directory as TMPOUT for checking no-pie option. When
> building powerpc/ from selftests directory, the OUTPUT directory
> eventually points to powerpc/pmu/ebb/ and gets removed when
> checking for -no-pie option in try-run routine,
On Sat, 27 Jun 2020 12:31:46 +0530, Aneesh Kumar K.V wrote:
> pkey_access_permitted() should not check for pkey is available in UAMOR or
> not.
> The kernel needs to do that check only while allocating keys. This also makes
> sure execute_only_key which is marked as non-manageable via UAMOR gives
"Aneesh Kumar K.V" writes:
> Rename is_pkey_enabled() to is_pkey_masked() to better indicates that
> this check is to make sure the key is available for userspace usage.
I don't think the new name makes that any clearer. Unless you know that
"masked" means not "available for userspace".
It's
Excerpts from Paul Mackerras's message of June 30, 2020 6:26 pm:
> On Tue, Jun 30, 2020 at 03:35:08PM +1000, Nicholas Piggin wrote:
>> Excerpts from Paul Mackerras's message of June 30, 2020 12:27 pm:
>> > On Sun, Jun 28, 2020 at 01:04:28AM +1000, Nicholas Piggin wrote:
>> >> KVM guests have
KVM guests have certain restrictions and performance quirks when using
doorbells. This patch moves the EPAPR KVM guest test so it can be shared
with PSERIES, and uses that in doorbell setup code to apply the KVM
guest quirks and improves IPI performance for two cases:
- PowerVM guests may now
KVM supports msgsndp in guests by trapping and emulating the
instruction, so it was decided to always use XIVE for IPIs if it is
available. However on PowerVM systems, msgsndp can be used and gives
better performance. On large systems, high XIVE interrupt rates can
have sub-linear scaling, and
These are only called in one place for a given platform, so inline them
for performance.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/dbell.h | 63 ++--
arch/powerpc/kernel/dbell.c | 55
2 files changed, 60
Since v1:
- Fixed SMP compile error.
- Fixed EPAPR / KVM_GUEST breakage.
- Expanded patch 3 changelog a bit.
Thanks,
Nick
Nicholas Piggin (3):
powerpc: inline doorbell sending functions
powerpc/pseries: Use doorbells even if XIVE is available
powerpc/pseries: Add KVM guest doorbell
On Thu, Jun 25, 2020 at 03:08:23PM +0200, Joerg Roedel wrote:
> Joerg Roedel (13):
> iommu/exynos: Use dev_iommu_priv_get/set()
> iommu/vt-d: Use dev_iommu_priv_get/set()
> iommu/msm: Use dev_iommu_priv_get/set()
> iommu/omap: Use dev_iommu_priv_get/set()
> iommu/rockchip: Use
On Tue, Jun 30, 2020 at 07:59:39AM +0200, Ahmed S. Darwish wrote:
> Peter Zijlstra wrote:
>
> ...
>
> > -#define lockdep_assert_irqs_disabled() do {\
> > - WARN_ONCE(debug_locks && !current->lockdep_recursion && \
> > -
On 6/30/20 2:24 PM, Michal Suchánek wrote:
On Mon, Jun 29, 2020 at 06:50:15PM -0700, Dan Williams wrote:
On Mon, Jun 29, 2020 at 1:41 PM Aneesh Kumar K.V
wrote:
Michal Suchánek writes:
Hello,
On Mon, Jun 29, 2020 at 07:27:20PM +0530, Aneesh Kumar K.V wrote:
nvdimm expect the flush
The ASRC not only supports ideal ratio mode, but also supports
internal ratio mode.
For internal rato mode, the rate of clock source should be divided
with no remainder by sample rate, otherwise there is sound
distortion.
Add function fsl_asrc_select_clk() to find proper clock source for
On Mon, Jun 29, 2020 at 06:50:15PM -0700, Dan Williams wrote:
> On Mon, Jun 29, 2020 at 1:41 PM Aneesh Kumar K.V
> wrote:
> >
> > Michal Suchánek writes:
> >
> > > Hello,
> > >
> > > On Mon, Jun 29, 2020 at 07:27:20PM +0530, Aneesh Kumar K.V wrote:
> > >> nvdimm expect the flush routines to just
On Fri, 26 Jun 2020 at 12:00, Herbert Xu wrote:
>
> On Tue, Jun 23, 2020 at 10:02:17AM -0700, Eric Biggers wrote:
> >
> > The source code for the two failing AF_ALG tests is here:
> >
> > https://github.com/linux-test-project/ltp/blob/master/testcases/kernel/crypto/af_alg02.c
> >
On Tue, Jun 30, 2020 at 03:35:08PM +1000, Nicholas Piggin wrote:
> Excerpts from Paul Mackerras's message of June 30, 2020 12:27 pm:
> > On Sun, Jun 28, 2020 at 01:04:28AM +1000, Nicholas Piggin wrote:
> >> KVM guests have certain restrictions and performance quirks when
> >> using doorbells. This
On 06/30/2020 02:10 PM, Hari Bathini wrote:
>
>
> On 30/06/20 9:00 am, piliu wrote:
>>
>>
>> On 06/29/2020 01:55 PM, Hari Bathini wrote:
>>>
>>>
>>> On 28/06/20 7:44 am, piliu wrote:
Hi Hari,
>>>
>>> Hi Pingfan,
>>>
After a quick through for this series, I have a few
On 6/30/20 12:52 PM, Aneesh Kumar K.V wrote:
On 6/30/20 12:36 PM, Dan Williams wrote:
On Mon, Jun 29, 2020 at 10:02 PM Aneesh Kumar K.V
wrote:
Dan Williams writes:
On Mon, Jun 29, 2020 at 1:29 PM Aneesh Kumar K.V
wrote:
Architectures like ppc64 provide persistent memory specific
On 6/30/20 12:36 PM, Dan Williams wrote:
On Mon, Jun 29, 2020 at 10:02 PM Aneesh Kumar K.V
wrote:
Dan Williams writes:
On Mon, Jun 29, 2020 at 1:29 PM Aneesh Kumar K.V
wrote:
Architectures like ppc64 provide persistent memory specific barriers
that will ensure that all stores for which
On Mon, Jun 29, 2020 at 10:05 PM Aneesh Kumar K.V
wrote:
>
> Dan Williams writes:
>
> > On Mon, Jun 29, 2020 at 6:58 AM Aneesh Kumar K.V
> > wrote:
> >>
> >> of_pmem on POWER10 can now use phwsync instead of hwsync to ensure
> >> all previous writes are architecturally visible for the platform
On Mon, Jun 29, 2020 at 10:02 PM Aneesh Kumar K.V
wrote:
>
> Dan Williams writes:
>
> > On Mon, Jun 29, 2020 at 1:29 PM Aneesh Kumar K.V
> > wrote:
> >>
> >> Architectures like ppc64 provide persistent memory specific barriers
> >> that will ensure that all stores for which the modifications
On 30/06/20 9:00 am, piliu wrote:
>
>
> On 06/29/2020 01:55 PM, Hari Bathini wrote:
>>
>>
>> On 28/06/20 7:44 am, piliu wrote:
>>> Hi Hari,
>>
>> Hi Pingfan,
>>
>>>
>>> After a quick through for this series, I have a few question/comment on
>>> this patch for the time being. Pls see comment
Peter Zijlstra wrote:
...
> -#define lockdep_assert_irqs_disabled() do {\
> - WARN_ONCE(debug_locks && !current->lockdep_recursion && \
> - current->hardirqs_enabled,\
> - "IRQs not disabled as
add testcases for vsx load/store vector paired instructions,
* Load VSX Vector Paired (lxvp)
* Load VSX Vector Paired Indexed (lxvpx)
* Prefixed Load VSX Vector Paired (plxvp)
* Store VSX Vector Paired (stxvp)
* Store VSX Vector Paired Indexed (stxvpx)
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