Re: [PATCH v2 1/3] powerpc/powernv/idle: Exclude mfspr on HID1, 4, 5 on P9 and above

Excerpts from Pratik Rajesh Sampat's message of July 10, 2020 3:22 pm: > POWER9 onwards the support for the registers HID1, HID4, HID5 has been > receded. > Although mfspr on the above registers worked in Power9, In Power10 > simulator is unrecognized. Moving their assignment under the > check for

Re: [PATCH v2 2/3] powerpc/powernv/idle: save-restore DAWR0, DAWRX0 for P10

Excerpts from Pratik Rajesh Sampat's message of July 10, 2020 3:22 pm: > Additional registers DAWR0, DAWRX0 may be lost on Power 10 for > stop levels < 4. > Therefore save the values of these SPRs before entering a "stop" > state and restore their values on wakeup. Hmm, where do you get this

[PATCH v6] powerpc/fadump: fix race between pstore write and fadump crash trigger

When we enter into fadump crash path via system reset we fail to update the pstore. On the system reset path we first update the pstore then we go for fadump crash. But the problem here is when all the CPUs try to get the pstore lock to initiate the pstore write, only one CPUs will acquire the

Re: [v3 1/5] KVM: PPC: Book3S HV: Disable page merging in H_SVM_INIT_START

On Sat, Jul 11, 2020 at 02:13:43AM -0700, Ram Pai wrote: > Merging of pages associated with each memslot of a SVM is > disabled the page is migrated in H_SVM_PAGE_IN handler. > > This operation should have been done much earlier; the moment the VM > is initiated for secure-transition. Delaying

Re: [PATCH v2 0/3] Power10 basic energy management

Excerpts from Pratik Rajesh Sampat's message of July 10, 2020 3:22 pm: > Changelog v1 --> v2: > 1. Save-restore DAWR and DAWRX unconditionally as they are lost in > shallow idle states too > 2. Rename pnv_first_spr_loss_level to pnv_first_fullstate_loss_level to > correct naming terminology > >

Re: [PATCH 4/5] dma-mapping: add a dma_ops_bypass flag to struct device

On 09/07/2020 01:24, Christoph Hellwig wrote: > Several IOMMU drivers have a bypass mode where they can use a direct > mapping if the devices DMA mask is large enough. Add generic support > to the core dma-mapping code to do that to switch those drivers to > a common solution. > >

Re: [RFC PATCH 7/7] lazy tlb: shoot lazies, a non-refcounting lazy tlb option

Excerpts from Peter Zijlstra's message of July 10, 2020 7:35 pm: > On Fri, Jul 10, 2020 at 11:56:46AM +1000, Nicholas Piggin wrote: >> On big systems, the mm refcount can become highly contented when doing >> a lot of context switching with threaded applications (particularly >> switching between

Re: [RFC PATCH 4/7] x86: use exit_lazy_tlb rather than membarrier_mm_sync_core_before_usermode

Excerpts from Andy Lutomirski's message of July 11, 2020 3:04 am: > On Thu, Jul 9, 2020 at 6:57 PM Nicholas Piggin wrote: >> >> And get rid of the generic sync_core_before_usermode facility. >> >> This helper is the wrong way around I think. The idea that membarrier >> state requires a core sync

[PATCH V5 4/4] Documentation/mm: Add descriptions for arch page table helpers

This adds a specific description file for all arch page table helpers which is in sync with the semantics being tested via CONFIG_DEBUG_VM_PGTABLE. All future changes either to these descriptions here or the debug test should always remain in sync. Cc: Jonathan Corbet Cc: Andrew Morton Cc:

[PATCH V5 3/4] mm/debug_vm_pgtable: Add debug prints for individual tests

This adds debug print information that enlists all tests getting executed on a given platform. With dynamic debug enabled, the following information will be splashed during boot. For compactness purpose, dropped both time stamp and prefix (i.e debug_vm_pgtable) from this sample output.

[PATCH V5 2/4] mm/debug_vm_pgtable: Add tests validating advanced arch page table helpers

This adds new tests validating for these following arch advanced page table helpers. These tests create and test specific mapping types at various page table levels. 1. pxxp_set_wrprotect() 2. pxxp_get_and_clear() 3. pxxp_set_access_flags() 4. pxxp_get_and_clear_full() 5.

[PATCH V5 1/4] mm/debug_vm_pgtable: Add tests validating arch helpers for core MM features

This adds new tests validating arch page table helpers for these following core memory features. These tests create and test specific mapping types at various page table levels. 1. SPECIAL mapping 2. PROTNONE mapping 3. DEVMAP mapping 4. SOFTDIRTY mapping 5. SWAP mapping 6. MIGRATION mapping 7.

[PATCH V5 0/4] mm/debug_vm_pgtable: Add some more tests

This series adds some more arch page table helper validation tests which are related to core and advanced memory functions. This also creates a documentation, enlisting expected semantics for all page table helpers as suggested by Mike Rapoport previously (https://lkml.org/lkml/2020/1/30/40).

Re: [PATCH v4 5/7] KVM: PPC: clean up redundant kvm_run parameters in assembly

On 2020/5/26 13:59, Paul Mackerras wrote: On Mon, Apr 27, 2020 at 12:35:12PM +0800, Tianjia Zhang wrote: In the current kvm version, 'kvm_run' has been included in the 'kvm_vcpu' structure. For historical reasons, many kvm-related function parameters retain the 'kvm_run' and 'kvm_vcpu'

Re: [PATCH v2 09/10] tools/perf: Add perf tools support for extended register capability in powerpc

> On 08-Jul-2020, at 5:34 PM, Michael Ellerman wrote: > > Athira Rajeev > writes: >> From: Anju T Sudhakar >> >> Add extended regs to sample_reg_mask in the tool side to use >> with `-I?` option. Perf tools side uses extended mask to display >> the

[PATCH] powerpc/book3s64/pkeys: Fix pkey_access_permitted w.r.t execute disable pkey

Even if the IAMR value deny the execute access, current kernel return true w.r.t pkey_access_permitted() for execute permission check if the AMR read pkey bit is cleared. This results in repeated page fault loop with a test like below. #define _GNU_SOURCE #include #include #include