On Fri, 6 Aug 2021, Stan Johnson wrote:
> $ egrep '(CONFIG_PPC_KUAP|CONFIG_VMAP_STACK)' .config
> CONFIG_PPC_KUAP=y
> CONFIG_PPC_KUAP_DEBUG=y
> CONFIG_VMAP_STACK=y
> $ strings vmlinux | fgrep "Linux version"
> Linux version 5.13.0-pmac-4-g63e3756d1bd ...
> $ cp vmlinux
On Fri, 6 Aug 2021, Christophe Leroy wrote:
>
> I have cooked a tentative fix for that KUAP stuff.
> Could you try the branch 'bugtest' at https://github.com/chleroy/linux.git
>
Thanks, Christophe.
Stan, please test the following build.
$ git remote add chleroy-linux
From: Xiongwei Song
Use _DEAR to get the offset of dear register in pr_regs for 64e cpus.
Signed-off-by: Xiongwei Song
---
arch/powerpc/kernel/asm-offsets.c| 13 +++--
arch/powerpc/kernel/exceptions-64e.S | 8
2 files changed, 7 insertions(+), 14 deletions(-)
diff --git
From: Xiongwei Song
Create an anonymous union for dar and dear regsiters, we can reference
dear to get the effective address when CONFIG_4xx=y or CONFIG_BOOKE=y.
Otherwise, reference dar. This makes code more clear.
Signed-off-by: Xiongwei Song
---
arch/powerpc/include/asm/ptrace.h | 5
From: Xiongwei Song
Use _ESR to get the offset of esr register in pr_regs for 64e cpus.
Signed-off-by: Xiongwei Song
---
arch/powerpc/kernel/asm-offsets.c| 2 +-
arch/powerpc/kernel/exceptions-64e.S | 10 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git
From: Xiongwei Song
Create an anonymous union for dsisr and esr regsiters, we can reference
esr to get the exception detail when CONFIG_4xx=y or CONFIG_BOOKE=y.
Otherwise, reference dsisr. This makes code more clear.
Signed-off-by: Xiongwei Song
---
arch/powerpc/include/asm/ptrace.h
From: Xiongwei Song
When CONFIG_4xx=y or CONFIG_BOOKE=y, currently in code we reference dsisr
to get interrupt reasons and reference dar to get excepiton address.
However, in reference manuals, esr is used for interrupt reasons and dear
is used for excepiton address, so the patchset changes
On Fri, Aug 06, 2021 at 08:46:23AM +0200, Uwe Kleine-König wrote:
> On Thu, Aug 05, 2021 at 06:42:34PM -0500, Bjorn Helgaas wrote:
> > I looked at all the bus_type.probe() methods, it looks like pci_dev is
> > not the only offender here. At least the following also have a driver
> > pointer in
> -Original Message-
> From: Maxim Kochetkov
> Sent: Tuesday, August 3, 2021 6:36 AM
> To: linuxppc-dev@lists.ozlabs.org
> Cc: Qiang Zhao ; Leo Li ;
> gre...@linuxfoundation.org; sarava...@google.com; linux-arm-
> ker...@lists.infradead.org; linux-ker...@vger.kernel.org; Maxim
On Sun, 01 Aug 2021 09:38:19 +0200, Emmanuel Gil Peyrot wrote:
> Both of these consoles use the exact same two registers, even at the
> same address, but the Wii U has eight banks of 128 bytes memory while
> the Wii only has one, hence the two compatible strings.
>
> Signed-off-by: Emmanuel Gil
Nicholas Piggin writes:
> This should be no functional difference but makes the caller easier
> to read.
>
> Signed-off-by: Nicholas Piggin
Reviewed-by: Fabiano Rosas
> ---
> arch/powerpc/kvm/book3s_hv.c | 65 +++-
> 1 file changed, 41 insertions(+), 24
Nicholas Piggin writes:
> This juggles SPR switching on the entry and exit sides to be more
> symmetric, which makes the next refactoring patch possible with no
> functional change.
>
> Signed-off-by: Nicholas Piggin
Reviewed-by: Fabiano Rosas
> ---
> arch/powerpc/kvm/book3s_hv.c | 8
Nicholas Piggin writes:
> Keep better track of the current SPR value in places where
> they are to be loaded with a new context, to reduce expensive
> mtSPR operations.
>
> -73 cycles (7354) POWER9 virt-mode NULL hcall
>
> Signed-off-by: Nicholas Piggin
Reviewed-by: Fabiano Rosas
> ---
>
On Fri, Aug 06, 2021 at 10:27:01AM -0700, Nick Desaulniers wrote:
> LLVM_IAS=1 controls enabling clang's integrated assembler via
> -integrated-as. This was an explicit opt in until we could enable
> assembler support in Clang for more architecures. Now we have support
> and CI coverage of
On 8/6/21 12:17 PM, David Gibson wrote:
On Tue, Jul 27, 2021 at 03:33:11PM +0530, Aneesh Kumar K.V wrote:
Currently, we duplicate parsing code for ibm,associativity and
ibm,associativity-lookup-arrays in the kernel. The associativity array provided
by these device tree properties are very
Alexey Kardashevskiy writes:
> The powernv_get_random_long() does not work in nested KVM (which is
> pseries) and produces a crash when accessing in_be64(rng->regs) in
> powernv_get_random_long().
>
> This replaces powernv_get_random_long with the ppc_md machine hook
> wrapper.
>
>
On Fri, Aug 6, 2021 at 5:01 AM Xianting Tian
wrote:
> @@ -163,6 +155,13 @@ static void hvc_console_print(struct console *co, const
> char *b,
> if (vtermnos[index] == -1)
> return;
>
> + list_for_each_entry(hp, _structs, next)
> + if (hp->vtermno ==
On Fri, Aug 06, 2021 at 04:53:14PM +1000, Michael Ellerman wrote:
> But I'm not sure about the use of anonymous unions in UAPI headers. Old
> compilers don't support them, so there's a risk of breakage.
More precisely, it exists only since C11, so even with all not-so-ancient
compilers it will
As one of the arguments of the H_ENTER_NESTED hypercall, the nested
hypervisor (L1) prepares a structure containing the values of various
hypervisor-privileged registers with which it wants the nested guest
(L2) to run. Since the nested HV runs in supervisor mode it needs the
host to write to
If the nested hypervisor has no access to a facility because it has
been disabled by the host, it should also not be able to see the
Hypervisor Facility Unavailable that arises from one of its guests
trying to access the facility.
This patch turns a HFU that happened in L2 into a Hypervisor
This series aims to stop contaminating the l2_hv structure with bits
that might have come from L1 state.
Patch 1 makes l2_hv read-only (mostly). It is now only changed when we
explicitly want to pass information to L1.
Patch 2 makes sure that L1 is not forwarded HFU interrupts when the
host has
Check if the event info is valid before printing the
event information. When a fwnmi enabled nested kvm guest
hits a machine check exception L0 and L2 would generate
machine check event info, But L1 would not generate any
machine check event info as it won't go through 0x200
vector and prints some
On Fri, Aug 6, 2021 at 3:32 PM Christophe Leroy
wrote:
>
>
>
> Le 06/08/2021 à 05:16, Xiongwei Song a écrit :
> > On Thu, Aug 5, 2021 at 6:06 PM Christophe Leroy
> > wrote:
> >>
> >>
> >>
> >> Le 26/07/2021 à 16:30, sxwj...@me.com a écrit :
> >>> From: Xiongwei Song
> >>>
> >>> Create an
On Fri, Aug 6, 2021 at 2:53 PM Michael Ellerman wrote:
>
> sxwj...@me.com writes:
> > From: Xiongwei Song
> >
> > Create an anonymous union for dsisr and esr regsiters, we can reference
> > esr to get the exception detail when CONFIG_4xx=y or CONFIG_BOOKE=y.
> > Otherwise, reference dsisr. This
On 6/29/21 3:15 PM, Cédric Le Goater wrote:
> On PowerVM, CPU-less nodes can be populated with hot-plugged CPUs at
> runtime. Today, the IPI is not created for such nodes, and hot-plugged
> CPUs use a bogus IPI, which leads to soft lockups.
>
> We could create the node IPI on demand but it is a
On Thu, Aug 05, 2021 at 05:52:43AM +0206, John Ogness wrote:
> On 2021-08-04, Daniel Thompson wrote:
> > On Wed, Aug 04, 2021 at 02:12:22PM +0200, Petr Mladek wrote:
> >> On Wed 2021-08-04 12:31:59, Daniel Thompson wrote:
> >> > On Tue, Aug 03, 2021 at 05:36:32PM +0206, John Ogness wrote:
> >> >
Excerpts from Athira Rajeev's message of August 6, 2021 7:28 pm:
>
>
>> On 26-Jul-2021, at 9:19 AM, Nicholas Piggin wrote:
>>
>> It can be useful in simulators (with very constrained environments)
>> to allow some PMCs to run from boot so they can be sampled directly
>> by a test harness,
Excerpts from Madhavan Srinivasan's message of August 6, 2021 5:33 pm:
>
> On 7/26/21 9:19 AM, Nicholas Piggin wrote:
>> It can be useful in simulators (with very constrained environments)
>> to allow some PMCs to run from boot so they can be sampled directly
>> by a test harness, rather than
Excerpts from Michael Ellerman's message of August 6, 2021 5:34 pm:
> Nicholas Piggin writes:
>> Revert the workaround added by commit 63279eeb7f93a ("KVM: PPC: Book3S
>> HV: Always save guest pmu for guest capable of nesting").
>>
>> Nested capable guests running with the earlier commit ("KVM:
Excerpts from Christophe Leroy's message of August 5, 2021 5:22 pm:
>
>
> Le 26/07/2021 à 05:49, Nicholas Piggin a écrit :
>> Rather than have KVM look up the host timer and fiddle with the
>> irq-work internal details, have the powerpc/time.c code provide a
>> function for KVM to re-arm the
Excerpts from Michael Ellerman's message of August 6, 2021 11:16 am:
> Nicholas Piggin writes:
>> The softpatch interrupt sets HSRR0 to the faulting instruction +4, so
>> it should subtract 4 for the faulting instruction address. Also have it
>> emulate and deliver HFAC interrupts correctly,
Excerpts from Fabiano Rosas's message of August 6, 2021 7:26 am:
> Both paths into __kvmhv_copy_tofrom_guest_radix ensure that we arrive
> with an effective address that is smaller than our total addressable
> space and addresses quadrant 0.
>
> - The H_COPY_TOFROM_GUEST hypercall path rejects
Excerpts from Fabiano Rosas's message of August 6, 2021 7:26 am:
> The __kvmhv_copy_tofrom_guest_radix function was introduced along with
> nested HV guest support. It uses the platform's Radix MMU quadrants to
> provide a nested hypervisor with fast access to its nested guests
> memory
Le 06/08/2021 à 11:43, Finn Thain a écrit :
On Fri, 6 Aug 2021, Christophe Leroy wrote:
Can you check if they DO NOT happen at preceding commit c16728835~
$ git checkout c16728835~
Previous HEAD position was c16728835eec powerpc/32: Manage KUAP in C
HEAD is now at 0b45359aa2df
On Fri, 6 Aug 2021, Christophe Leroy wrote:
> > > > >
> > > > > Can you check if they DO NOT happen at preceding commit c16728835~
> > > > >
> > >
> > > $ git checkout c16728835~
> > > Previous HEAD position was c16728835eec powerpc/32: Manage KUAP in C
> > > HEAD is now at 0b45359aa2df
> On 26-Jul-2021, at 9:19 AM, Nicholas Piggin wrote:
>
> It can be useful in simulators (with very constrained environments)
> to allow some PMCs to run from boot so they can be sampled directly
> by a test harness, rather than having to run perf.
>
> A previous change freezes counters at
On 2021/8/5 17:51, Christophe Leroy wrote:
Le 04/08/2021 à 16:37, Pu Lehui a écrit :
When using kprobe on powerpc booke series processor, Oops happens
as show bellow:
[ 35.861352] Oops: Exception in kernel mode, sig: 5 [#1]
[ 35.861676] BE PAGE_SIZE=4K SMP NR_CPUS=24 QEMU e500
[
On Thu, Aug 5, 2021 at 9:35 PM Maxim Kochetkov wrote:
>
> 03.08.2021 20:51, Saravana Kannan wrote:
> >> So lets convert this driver to simple platform_device with probe().
> >> Also use platform_get_ and devm_ family function to get/allocate
> >> resources and drop unused .compatible = "qeic".
>
03.08.2021 20:51, Saravana Kannan wrote:
So lets convert this driver to simple platform_device with probe().
Also use platform_get_ and devm_ family function to get/allocate
resources and drop unused .compatible = "qeic".
Yes, please!
Should I totally drop { .type = "qeic"}, or keep?
> With shared mapping, even though we are unmapping a large range, the
kernel
> will force a TLB flush with ptl lock held to avoid the race mentioned in
> commit 1cf35d47712d ("mm: split 'tlb_flush_mmu()' into tlb flushing and
memory freeing parts")
> This results in the kernel issuing a high
Hello Bjorn,
On Thu, Aug 05, 2021 at 06:42:34PM -0500, Bjorn Helgaas wrote:
> On Tue, Aug 03, 2021 at 12:01:44PM +0200, Uwe Kleine-König wrote:
> > Hello,
> >
> > changes since v1
> > (https://lore.kernel.org/linux-pci/20210729203740.1377045-1-u.kleine-koe...@pengutronix.de):
> >
> > - New
> With shared mapping, even though we are unmapping a large range, the
kernel
> will force a TLB flush with ptl lock held to avoid the race mentioned in
> commit 1cf35d47712d ("mm: split 'tlb_flush_mmu()' into tlb flushing and
memory freeing parts")
> This results in the kernel issuing a high
Nicholas Piggin writes:
> Revert the workaround added by commit 63279eeb7f93a ("KVM: PPC: Book3S
> HV: Always save guest pmu for guest capable of nesting").
>
> Nested capable guests running with the earlier commit ("KVM: PPC: Book3S
> HV Nested: Indicate guest PMU in-use in VPA") will now
On 7/26/21 9:19 AM, Nicholas Piggin wrote:
It can be useful in simulators (with very constrained environments)
to allow some PMCs to run from boot so they can be sampled directly
by a test harness, rather than having to run perf.
A previous change freezes counters at boot by default, so
Le 06/08/2021 à 05:16, Xiongwei Song a écrit :
On Thu, Aug 5, 2021 at 6:06 PM Christophe Leroy
wrote:
Le 26/07/2021 à 16:30, sxwj...@me.com a écrit :
From: Xiongwei Song
Create an anonymous union for dsisr and esr regsiters, we can reference
esr to get the exception detail when
sxwj...@me.com writes:
> From: Xiongwei Song
>
> Create an anonymous union for dsisr and esr regsiters, we can reference
> esr to get the exception detail when CONFIG_4xx=y or CONFIG_BOOKE=y.
> Otherwise, reference dsisr. This makes code more clear.
>
> Signed-off-by: Xiongwei Song
> ---
>
On Tue, Jul 27, 2021 at 03:33:08PM +0530, Aneesh Kumar K.V wrote:
> The associativity details of the newly added resourced are collected from
> the hypervisor via "ibm,configure-connector" rtas call. Update the numa
> distance details of the newly added numa node after the above call.
>
> Instead
On Tue, Jul 27, 2021 at 03:33:11PM +0530, Aneesh Kumar K.V wrote:
> Currently, we duplicate parsing code for ibm,associativity and
> ibm,associativity-lookup-arrays in the kernel. The associativity array
> provided
> by these device tree properties are very similar and hence can use
> a helper to
+nicholas piggin for the C interrupt stuff
Le 06/08/2021 à 03:06, Finn Thain a écrit :
(Christophe, you've seen some of this before, however there are new
results added at the end. I've Cc'd the mailing lists this time.)
On Wed, 4 Aug 2021, Stan Johnson wrote:
On 8/4/21 8:41 PM, Finn Thain
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