Le 06/06/2024 à 08:33, Namhyung Kim a écrit :
> Hello,
>
> On Sat, Jun 01, 2024 at 11:39:32AM +0530, Athira Rajeev wrote:
>> Currently, the perf tool infrastructure disasm_line__parse function to
>> parse disassembled line.
>>
>> Example snippet from objdump:
>> objdump --start-address=
> On 6 Jun 2024, at 12:03 PM, Namhyung Kim wrote:
>
> Hello,
>
> On Sat, Jun 01, 2024 at 11:39:32AM +0530, Athira Rajeev wrote:
>> Currently, the perf tool infrastructure disasm_line__parse function to
>> parse disassembled line.
>>
>> Example snippet from objdump:
>> objdump
> On 6 Jun 2024, at 12:22 PM, Namhyung Kim wrote:
>
> On Sat, Jun 01, 2024 at 11:39:33AM +0530, Athira Rajeev wrote:
>> Use the raw instruction code and macros to identify memory instructions,
>> extract register fields and also offset. The implementation addresses
>> the D-form, X-form,
> On 7 Jun 2024, at 10:53 PM, Ian Rogers wrote:
>
> On Thu, Jun 6, 2024 at 9:44 PM Athira Rajeev
> wrote:
>>
>> Perf bench futex fails as below when attempted to run on
>> on a powerpc system:
>>
>> ./perf bench futex all
>> Running futex/hash benchmark...
>> Run summary [PID 626307]: 80
> On 6 Jun 2024, at 12:23 PM, Namhyung Kim wrote:
>
> On Sat, Jun 01, 2024 at 11:39:37AM +0530, Athira Rajeev wrote:
>> Add instruction tracking function "update_insn_state_powerpc" for
>> powerpc. Example sequence in powerpc:
>>
>> ld r10,264(r3)
>> mr r31,r3
>> <
>> ld
> On 3 Jun 2024, at 10:00 PM, Ian Rogers wrote:
>
> On Fri, May 31, 2024 at 11:10 PM Athira Rajeev
> wrote:
>>
>> Now perf uses the capstone library to disassemble the instructions in
>> x86. capstone is used (if available) for perf annotate to speed up.
>> Currently it only supports x86
