RE: Serial RapidIO Maintaintance read causes lock up

2010-10-06 Thread Anderson, Trevor
I may have come across a similar problem, but I've never worked card-to-card without at least one switch in the way. The problems I have encountered have been hang-ups during memory-mapped maintenance reads to devices that the switch reports as up. A workaround for the hang-up is to use a DMA

RE: Questions on interrupt vector assignment on MPC8641D

2010-09-21 Thread Anderson, Trevor
IRQ assignments for MPC8641D are virtual, meaning made up and quite difficult to determine by looking through code. But I believe the plan goes something like this: IRQ - 0 No interrupt 1 - 15External interrupts (only 1..12 would be used) 16 - 127

RE: [PATCH v2 09/10] RapidIO: Add support for IDT CPS Gen2 switches

2010-09-15 Thread Anderson, Trevor
Keep it in please. We lurkers in the embedded community do use the per-port routing tables. One of the problems with SRIO switch tables is that access to routes is not atomic; we can use restricted access to per-port routing tables to reduce the risk of interference. And we still use the Global

RE: [PATCH v2 09/10] RapidIO: Add support for IDT CPS Gen2 switches

2010-09-15 Thread Anderson, Trevor
-Original Message- From: Bounine, Alexandre [mailto:alexandre.boun...@idt.com] Sent: Wednesday, September 15, 2010 11:53 AM To: Anderson, Trevor; Andrew Morton Cc: linux-ker...@vger.kernel.org; Thomas Moll; linuxppc-dev@lists.ozlabs.org Subject: RE: [PATCH v2 09/10] RapidIO: Add

RE: RapidIO - general questions

2009-05-20 Thread Anderson, Trevor
With regards to your Oops: we sometimes find that, although a switch may report a port being active, whenever we try to discover what lies behind it, transfer errors occur that are non-recoverable. As a solution, on Freescale MPC8641D, we use a DMA transfer to perform a simple MAINT read on a new