This will be used by the following patches
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/feature-fixups.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/include/asm/feature-fixups.h
b/arch/powerpc/include/asm/feature-fixups.h
index b0af97add751..122c22161268
from v2:
* Rebase to the latest kernel.
* Fixed a bug with disabling KUEP/KUAP on kernel command line
* Added a patch to make kup key dynamic.
Changes from V1:
* Rebased on latest kernel
Aneesh Kumar K.V (23):
powerpc: Add new macro to handle NESTED_IFCLR
KVM: PPC: BOOK3S: PR: Ignore UAMOR SPR
Sure. I am hoping kernel test robot will pick this up. I did an x86 and
about 19 different ppc config build with the series. The git tree above
was pushed with that. Considering you authored the change i am wondering
if you could help with checking other architecture (may be atleast arm
vari
On 8/21/20 1:31 PM, Anshuman Khandual wrote:
On 08/21/2020 12:23 PM, Aneesh Kumar K.V wrote:
On 8/21/20 9:03 AM, Anshuman Khandual wrote:
On 08/19/2020 07:15 PM, Aneesh Kumar K.V wrote:
"Aneesh Kumar K.V" writes:
This patch series includes fixes for debug_vm_pgtable test co
On 8/21/20 1:33 PM, Anshuman Khandual wrote:
On 08/19/2020 06:31 PM, Aneesh Kumar K.V wrote:
Make sure we call pte accessors with correct lock held.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 34 --
1 file changed, 20 insertions(+), 14
On 8/20/20 8:02 PM, Christophe Leroy wrote:
Le 19/08/2020 à 15:01, Aneesh Kumar K.V a écrit :
set_pte_at() should not be used to set a pte entry at locations that
already holds a valid pte entry. Architectures like ppc64 don't do TLB
invalidate in set_pte_at() and hence expect it to be
On 8/21/20 9:03 AM, Anshuman Khandual wrote:
On 08/19/2020 07:15 PM, Aneesh Kumar K.V wrote:
"Aneesh Kumar K.V" writes:
This patch series includes fixes for debug_vm_pgtable test code so that
they follow page table updates rules correctly. The first two patches introduce
cha
kernel test robot writes:
> Hi "Aneesh,
>
> I love your patch! Yet something to improve:
>
> [auto build test ERROR on hnaz-linux-mm/master]
> [also build test ERROR on powerpc/next linus/master v5.9-rc1 next-20200819]
> [cannot apply to mmotm/master]
> [If your patch is applied to the wrong git
"Aneesh Kumar K.V" writes:
> This patch series includes fixes for debug_vm_pgtable test code so that
> they follow page table updates rules correctly. The first two patches
> introduce
> changes w.r.t ppc64. The patches are included in this series for
> completeness
ppc64 supports huge vmap only with radix translation. Hence use arch helper
to determine the huge vmap support.
Signed-off-by: Aneesh Kumar K.V
---
include/linux/io.h| 12
mm/debug_vm_pgtable.c | 4 ++--
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/include
pte_clear_tests operate on an existing pte entry. Make sure that is not a none
pte entry.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 09ce9974c187
enable the test only
when CONFIG_NUMA_BALANCING is enabled and use protnone protflags.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index cf3c4792b4a2
This will help in adding proper locks in a later patch
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 52 ---
1 file changed, 29 insertions(+), 23 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 6dcac2b40fef
kernel expects entries to be marked huge before we use
set_pmd_at()/set_pud_at().
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index ffa10ede6842
set_pte_at() should not be used to set a pte entry at locations that
already holds a valid pte entry. Architectures like ppc64 don't do TLB
invalidate in set_pte_at() and hence expect it to be used to set locations
that are not a valid PTE.
Signed-off-by: Aneesh Kumar K.V
--
ppc64.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 63576fe767a2..09ce9974c187 100644
--- a/mm/debug_vm_pgtable.c
+++ b/mm/debug_vm_pgtable.c
@@ -798,6 +798,7
pmd_clear() should not be used to clear pmd level pte entries.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 8f7a8ccb5a54..63576fe767a2 100644
--- a/mm
ppc64 use bit 62 to indicate a pte entry (_PAGE_PTE). Avoid setting that bit in
random value.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 086309fb9b6f
Make sure we call pte accessors with correct lock held.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 34 --
1 file changed, 20 insertions(+), 14 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 69fe3cd8126c
() without setting
_PAGE_PTE bit. We will remove that after a few releases.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 15 +--
arch/powerpc/include/asm/nohash/pgtable.h| 5 -
arch/powerpc/mm/book3s64/pgtable.c | 2 +-
arch
Architectures like ppc64 use deposited page table while updating the huge pte
entries.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 9c7e2c9cfc76
disabled on ppc64 because that needs larger change to satisfy
page table update rules.
Changes from V1:
* Address review feedback
* drop test specific pfn_pte and pfn_pmd.
* Update ppc64 page table helper to add _PAGE_PTE
Aneesh Kumar K.V (13):
powerpc/mm: Add DEBUG_VM WARN for pmd_clear
powerpc
With the hash page table, the kernel should not use pmd_clear for clearing
huge pte entries. Add a DEBUG_VM WARN to catch the wrong usage.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch
Anshuman Khandual writes:
> On 08/12/2020 07:22 PM, Aneesh Kumar K.V wrote:
>> On 8/12/20 7:04 PM, Anshuman Khandual wrote:
>>>
>>>
>>> On 08/12/2020 06:46 PM, Aneesh Kumar K.V wrote:
>>>> On 8/12/20 6:33 PM, Anshuman Khandual wrote:
>>&g
Srikar Dronamraju writes:
> * Aneesh Kumar K.V [2020-08-17 17:04:24]:
>
>> On 8/17/20 4:29 PM, Srikar Dronamraju wrote:
>> > * Aneesh Kumar K.V [2020-08-17 16:02:36]:
>> >
>> > > We use ibm,associativity and ibm,associativity-lookup-arrays to derive
On 8/17/20 9:13 PM, Hari Bathini wrote:
On 13/08/20 9:50 pm, Aneesh Kumar K.V wrote:
If the hypervisor doesn't support hugepages, the kernel ends up
allocating a large
number of page table pages. The early page table allocation was wrongly
setting the max memblock limit to ppc64_rma
On 8/17/20 9:00 PM, Hari Bathini wrote:
On 06/08/20 9:53 pm, Aneesh Kumar K.V wrote:
dt_root_addr_cells and dt_root_size_cells are __initdata variables.
So make a copy of the same which can be used post init.
This avoids doing the same thing at multiple places.
So, thanks for the patch
On 8/17/20 4:29 PM, Srikar Dronamraju wrote:
* Aneesh Kumar K.V [2020-08-17 16:02:36]:
We use ibm,associativity and ibm,associativity-lookup-arrays to derive the numa
node numbers. These device tree properties are firmware indicated grouping of
resources based on their hierarchy in the
/hash_utils.c:1119:21: error: ‘default_uamor’
undeclared (first use in this function)
1119 | mtspr(SPRN_UAMOR, default_uamor);
| ^
Fixes: 6553fb799f60 ("powerpc/pkeys: Fix boot failures with Nemo board (A-EON
AmigaOne X1000)")
Signed-off-by: Aneesh
Even though the comment says POWER4 usage, I guess it applies to all
platforms since there is no PVR check there. This patch moves the check
to the helper.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/numa.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a
pping between firmware group id and
Linux node id.
Reviewed-by: Gautham R. Shenoy
Signed-off-by: Aneesh Kumar K.V
---
drivers/cpufreq/powernv-cpufreq.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/cpufreq/powernv-cpufreq.c
b/drivers/cpufreq/powernv-cpuf
53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71
node 0 size: 50912 MB
node 0 free: 49724 MB
node distances:
node 0
0: 10
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/topology.h | 5 ++
arch/powerpc/mm/numa.c | 74 -
2 files
ly_init_devtree() if the kernel is going
to use radix translation. This forces some of the memblock allocations we do
before
mmu_early_init_devtree() to be within the RMA limit.
Fixes: 2bfd65e45e87 ("powerpc/mm/radix: Add radix callbacks for early init
routines")
Reported-by: Shirisha
rmance
statistics.
Fixes: 2d02bf835e573 ('powerpc/papr_scm: Fetch nvdimm performance stats from
PHYP')
Reported-by: Aneesh Kumar K.V
Signed-off-by: Vaibhav Jain
---
arch/powerpc/platforms/pseries/papr_scm.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/platforms
On 8/13/20 10:57 AM, Anshuman Khandual wrote:
On 08/12/2020 12:03 PM, Aneesh Kumar K.V wrote:
pmd_clear() should not be used to clear pmd level pte entries.
Could you please elaborate on this. The proposed change set does
not match the description here.
pmd_clear is implemented such that
On 8/13/20 10:55 AM, Anshuman Khandual wrote:
On 08/12/2020 12:03 PM, Aneesh Kumar K.V wrote:
Architectures like ppc64 use deposited page table while updating the huge pte
entries.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 8 ++--
1 file changed, 6 insertions(+), 2
On 8/13/20 11:00 AM, Anshuman Khandual wrote:
On 08/12/2020 12:03 PM, Aneesh Kumar K.V wrote:
The tests do expect _PAGE_PTE bit set by different page table accessors.
This is not true for the kernel. Within the kernel, _PAGE_PTE bits are
usually set by set_pte_at(). To make the below tests
On 8/12/20 7:04 PM, Anshuman Khandual wrote:
On 08/12/2020 06:46 PM, Aneesh Kumar K.V wrote:
On 8/12/20 6:33 PM, Anshuman Khandual wrote:
On 08/12/2020 12:03 PM, Aneesh Kumar K.V wrote:
The seems to be missing quite a lot of details w.r.t allocating
the correct pgtable_t page
On 8/12/20 6:33 PM, Anshuman Khandual wrote:
On 08/12/2020 12:03 PM, Aneesh Kumar K.V wrote:
The seems to be missing quite a lot of details w.r.t allocating
the correct pgtable_t page (huge_pte_alloc()), holding the right
lock (huge_pte_lock()) etc. The vma used is also not a hugetlb VMA
On 8/12/20 2:42 PM, Anshuman Khandual wrote:
On 08/12/2020 12:03 PM, Aneesh Kumar K.V wrote:
set_pte_at() should not be used to set a pte entry at locations that
already holds a valid pte entry. Architectures like ppc64 don't do TLB
invalidate in set_pte_at() and hence expect it to be us
On 8/12/20 1:16 PM, Anshuman Khandual wrote:
On 08/12/2020 12:03 PM, Aneesh Kumar K.V wrote:
With the hash page table, the kernel should not use pmd_clear for clearing
huge pte entries. Add a DEBUG_VM WARN to catch the wrong usage.
Signed-off-by: Aneesh Kumar K.V
This particular change is
On 8/12/20 1:42 PM, Anshuman Khandual wrote:
On 08/12/2020 12:03 PM, Aneesh Kumar K.V wrote:
ppc64 use bit 62 to indicate a pte entry (_PAGE_PTE). Avoid setting that bit in
random value.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 5 -
1 file changed, 4 insertions
On 8/12/20 12:10 PM, Christophe Leroy wrote:
Le 12/08/2020 à 08:33, Aneesh Kumar K.V a écrit :
ppc64 use bit 62 to indicate a pte entry (_PAGE_PTE). Avoid setting
that bit in
random value.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 5 -
1 file changed, 4 insertions
, prot);
WARN_ON(!pte_devmap(pte_mkdevmap(pte)));
WARN_ON(!pte_savedwrite(pte_mk_savedwrite(pte_clear_savedwrite(pte;
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 65 +++
1 file changed, 41 insertions(+), 24 deletions(-)
diff --git a/mm
.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 3e112d0ba1b2..eea62d5e503b 100644
--- a/mm/debug_vm_pgtable.c
+++ b/mm/debug_vm_pgtable.c
@@ -1006,8 +1006,8 @@ static
ppc64.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 529892b9be2f..3e112d0ba1b2 100644
--- a/mm/debug_vm_pgtable.c
+++ b/mm/debug_vm_pgtable.c
@@ -800,6 +800,7
pmd_clear() should not be used to clear pmd level pte entries.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 061c19bba7f0..529892b9be2f 100644
--- a/mm
Make sure we call pte accessors with correct lock held.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 34 --
1 file changed, 20 insertions(+), 14 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 90e9c2d3a092
This will help in adding proper locks in a later patch
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 53 +++
1 file changed, 29 insertions(+), 24 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 48475d288df1
Architectures like ppc64 use deposited page table while updating the huge pte
entries.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 644d28861ce9
set_pud_at() should not be used to set a pte entry at locations that
already holds a valid pte entry. Architectures like ppc64 don't do TLB
invalidate in set_pud_at() and hence expect it to be used to set locations
that are not a valid PTE.
Signed-off-by: Aneesh Kumar K.V
--
set_pmd_at() should not be used to set a pte entry at locations that
already holds a valid pte entry. Architectures like ppc64 don't do TLB
invalidate in set_pmd_at() and hence expect it to be used to set locations
that are not a valid PTE.
Signed-off-by: Aneesh Kumar K.V
--
kernel expect entries to be marked huge before we use set_pud_at().
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index b6aca2526e01..cd609a212dd4 100644
kernel expect entries to be marked huge before we use set_pmd_at().
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index de8a62d0a931..b6aca2526e01 100644
--- a
enable the test only
when CONFIG_NUMA_BALANCING is enabled.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 679bb3d289a3..de8a62d0a931 100644
--- a/mm/debug_vm_pgtable.c
+++ b
ppc64 supports huge vmap only with radix translation. Hence use arch helper
to determine the huge vmap support.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index
set_pte_at() should not be used to set a pte entry at locations that
already holds a valid pte entry. Architectures like ppc64 don't do TLB
invalidate in set_pte_at() and hence expect it to be used to set locations
that are not a valid PTE.
Signed-off-by: Aneesh Kumar K.V
--
ppc64 use bit 62 to indicate a pte entry (_PAGE_PTE). Avoid setting that bit in
random value.
Signed-off-by: Aneesh Kumar K.V
---
mm/debug_vm_pgtable.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index 086309fb9b6f
With the hash page table, the kernel should not use pmd_clear for clearing
huge pte entries. Add a DEBUG_VM WARN to catch the wrong usage.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch
On p6 and before we should avoid updating UAMOR SPRN. This resulted
in boot failure on Nemo board.
Fixes: 269e829f48a0 ("powerpc/book3s64/pkey: Disable pkey on POWER6 and before")
Reported-by: Christian Zigotzky
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/book3s64/hash_ut
On 8/10/20 2:15 PM, Christian Zigotzky wrote:
Hello Aneesh,
I tested the new kernel today and unfortunately it doesn't run very well.
I have only one core (1 physical processor; 1 core; 2 threads) instead
of two cores (1 physical processor; 2 cores; 2 threads) so the system is
slower.
Boot
"Aneesh Kumar K.V" writes:
> On 8/8/20 2:15 AM, Nathan Lynch wrote:
>> "Aneesh Kumar K.V" writes:
>>> On 8/7/20 9:54 AM, Nathan Lynch wrote:
>>>> "Aneesh Kumar K.V" writes:
>>>>> diff --git a/arch/powerpc/mm/nu
On 8/9/20 8:04 PM, Aneesh Kumar K.V wrote:
On 8/9/20 7:42 PM, Christian Zigotzky wrote:
Hello,
The Nemo board (A-EON AmigaOne X1000) [1] doesn't start with the
latest Git kernel anymore after the commit "powerpc/book3s64/pkeys:
Simplify pkey disable branch" [2].
I bi
On 8/9/20 7:42 PM, Christian Zigotzky wrote:
Hello,
The Nemo board (A-EON AmigaOne X1000) [1] doesn't start with the latest
Git kernel anymore after the commit "powerpc/book3s64/pkeys: Simplify
pkey disable branch" [2].
I bisected today [3].
Result: powerpc/book3s64/pkeys: Simplify pkey dis
On 8/8/20 2:15 AM, Nathan Lynch wrote:
"Aneesh Kumar K.V" writes:
On 8/7/20 9:54 AM, Nathan Lynch wrote:
"Aneesh Kumar K.V" writes:
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index e437a9ac4956..6c659aada55b 100644
--- a/arch/powerpc/mm/numa.c
+++ b/ar
On 8/8/20 12:44 AM, Al Viro wrote:
On Fri, Aug 07, 2020 at 10:46:13AM -0700, Linus Torvalds wrote:
On Fri, Aug 7, 2020 at 6:14 AM Michael Ellerman wrote:
Just one minor conflict, in a comment in drivers/misc/ocxl/config.c.
Well, this morning I merged the ptrace ->regset_get() updates from A
On 8/7/20 9:54 AM, Nathan Lynch wrote:
"Aneesh Kumar K.V" writes:
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index e437a9ac4956..6c659aada55b 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -221,25 +221,51 @@ static void initialize_distance_lo
Similar to commit 89c140bbaeee ("pseries: Fix 64 bit logical memory block
panic")
make sure different variables tracking lmb_size are updated to be 64 bit.
Fixes: af9d00e93a4f ("powerpc/mm/radix: Create separate mappings for
hot-plugged memory")
Signed-off-by: Aneesh
Similar to commit 89c140bbaeee ("pseries: Fix 64 bit logical memory block
panic")
make sure different variables tracking lmb_size are updated to be 64 bit.
This was found by code audit.
Cc: sta...@vger.kernel.org
Signed-off-by: Aneesh Kumar K.V
---
.../platforms/pseries/hotplu
dt_root_addr_cells and dt_root_size_cells are __initdata variables.
So make a copy of the same which can be used post init.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/drmem.h | 2 ++
arch/powerpc/kernel/prom.c | 7 +++
arch/powerpc/mm/numa.c | 1 +
3 files
Similar to commit 89c140bbaeee ("pseries: Fix 64 bit logical memory block
panic")
make sure different variables tracking lmb_size are updated to be 64 bit.
This was found by code audit.
Cc: sta...@vger.kernel.org
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/drmem.h |
use mem_addr_cells/mem_size_cells instead of fetching the values
again from device tree.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/drmem.c | 24 ++--
1 file changed, 6 insertions(+), 18 deletions(-)
diff --git a/arch/powerpc/mm/drmem.c b/arch/powerpc/mm/drmem.c
Michael Ellerman writes:
> "Aneesh Kumar K.V" writes:
>> Similar to commit: 89c140bbaeee ("pseries: Fix 64 bit logical memory block
>> panic")
>> make sure we update different variables tracking lmb_size are updated
>> to be 64 bit.
>
> Tha
Make it consistent with other usages.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/book3s64/radix_pgtable.c| 7 ---
arch/powerpc/platforms/pseries/hotplug-memory.c | 10 ++
2 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/mm/book3s64
use mem_addr_cells/mem_size_cells instead of fetching the values
again from device tree.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/numa.c | 36 ++--
1 file changed, 10 insertions(+), 26 deletions(-)
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm
dt_root_addr_cells and dt_root_size_cells are __initdata variables.
So make a copy of the same which can be used post init.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/drmem.h | 2 ++
arch/powerpc/kernel/prom.c | 7 +++
arch/powerpc/mm/numa.c | 1 +
3 files
Srikar Dronamraju writes:
> * Aneesh Kumar K.V [2020-08-02 19:51:41]:
>> Srikar Dronamraju writes:
>> > * Aneesh Kumar K.V [2020-07-31 16:49:14]:
>> >
>> >
>> > If its just to eliminate node 0, then we have 2 other probably better
>> >
Similar to commit: 89c140bbaeee ("pseries: Fix 64 bit logical memory block
panic")
make sure we update different variables tracking lmb_size are updated
to be 64 bit.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/mmu.h | 2 +-
arch/powerpc/include/a
Srikar Dronamraju writes:
> * Aneesh Kumar K.V [2020-07-31 16:49:14]:
>
>> We use ibm,associativity and ibm,associativity-lookup-arrays to derive the
>> numa
>> node numbers. These device tree properties are firmware indicated grouping of
>> resources based on t
Now that we are handling vmemmap list allocation failure correctly, don't
WARN in section deactivate when we don't find a mapping vmemmap list entry.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/init_64.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/ar
If we fail to allocate vmemmap list, we don't keep track of allocated
vmemmap block buf. Hence on section deactivate we skip vmemmap block
buf free. This results in memory leak.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/init_64.c | 35 ---
1
pping between firmware group id and
Linux node id.
Signed-off-by: Aneesh Kumar K.V
---
drivers/cpufreq/powernv-cpufreq.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/cpufreq/powernv-cpufreq.c
b/drivers/cpufreq/powernv-cpufreq.c
index 8646eb197cd9..ca82b6a
53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71
node 0 size: 50912 MB
node 0 free: 49724 MB
node distances:
node 0
0: 10
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/topology.h | 1 +
arch/powerpc/mm/numa.c | 49 ++---
2 files
t buffer
> large enough to hold the performance stat and passes it to
> drc_pmem_query_stats() that issues the HCALL to PHYP. The return value
> of the stat is then populated in the 'struct
> nd_papr_pdsm_health.dimm_fuel_gauge' field with extension flag
> 'PDSM_DIMM_HEALTH
Vaibhav Jain writes:
> Update papr_scm.c to query dimm performance statistics from PHYP via
> H_SCM_PERFORMANCE_STATS hcall and export them to user-space as PAPR
> specific NVDIMM attribute 'perf_stats' in sysfs. The patch also
> provide a sysfs ABI documentation for the stats being reported and
on
a hypervisor that doesn't force the guest to hash translation even
though it can't handle the radix GTSE=0 request via CAS. With
radix_hcall_invalidate=on if the hypervisor doesn't support hcall_rpt_invalidate
hcall it should force the LPAR to hash translation.
Signed-off-
pkey support via ibm,processor-storage-keys.
Hence check for P7 CPU_FTR bit to decide on pkey support.
Fixes: a24204c30796 ("powerpc/book3s64/pkeys: kill cpu feature key
CPU_FTR_PKEY")
Reported-by: Michael Ellerman
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/book3s64/pkeys.c | 6
pkey support via ibm,processor-storage-keys.
Hence check for P7 CPU_FTR bit to decide on pkey support.
Fixes: a24204c30796 ("powerpc/book3s64/pkeys: kill cpu feature key
CPU_FTR_PKEY")
Reported-by: Michael Ellerman
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/book3s64/pkeys.c
on
a hypervisor that doesn't force the guest to hash translation even
though it can't handle the radix GTSE=0 request via CAS. With radix_gtse=off
if the hypervisor doesn't support hcall_rpt_invalidate hcall it should
force the LPAR to hash translation.
Signed-off-by: Aneesh Kumar K.V
---
On 7/21/20 7:15 AM, Michael Ellerman wrote:
Nathan Lynch writes:
"Aneesh Kumar K.V" writes:
This is the next version of the fixes for memory unplug on radix.
The issues and the fix are described in the actual patches.
I guess this isn't actually causing problems at runtime r
On 7/20/20 11:35 AM, Michael Ellerman wrote:
"Aneesh Kumar K.V" writes:
Move them to hash specific file and add BUG() for radix path.
---
.../powerpc/include/asm/book3s/64/hash-pkey.h | 32
arch/powerpc/include/asm/book3s/64/pkeys.h| 25 +
ar
kernel test robot writes:
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
> next-test
> head: 5fed3b3e21db21f9a7002426f456fd3a8a8c0772
> commit: 21407f39b9d547da527ad5224c4323e1f62bb514 [103/106] powerpc/mm/radix:
> Create separate mappings for hot-plugged memory
>
On 7/17/20 7:29 AM, kernel test robot wrote:
tree: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
next-test
head: 0fbd1eb4df96e1cbd039e0b95fdf62cf65a7faf9
commit: ed411c66eea2ccf93a634ae661a1f79c2bc63d88 [125/127]
powerpc/book3s64/pkeys: Remove is_pkey_enabled()
config: p
On 7/16/20 7:00 AM, Paul Mackerras wrote:
On Wed, Jul 15, 2020 at 06:12:25PM +0530, Aneesh Kumar K.V wrote:
Anton Blanchard writes:
Booting with a 4GB LMB size causes us to panic:
qemu-system-ppc64: OS terminated: OS panic:
Memory block size not suitable: 0x0
Fix
Anton Blanchard writes:
> Booting with a 4GB LMB size causes us to panic:
>
> qemu-system-ppc64: OS terminated: OS panic:
> Memory block size not suitable: 0x0
>
> Fix pseries_memory_block_size() to handle 64 bit LMBs.
>
> Cc: sta...@vger.kernel.org
> Signed-off-by: Anton Blanchard
> ---
area
[0.00] cma: Reserved 26224 MiB at 0x00795900
[0.00] hugetlb_cma: reserve 65536 MiB, up to 16384 MiB per node
[0.00] cma: Reserved 16384 MiB at 0x0018
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/kvm/book3s_hv_builtin.c | 2 +-
1 file changed, 1
commit: cf11e85fc08c ("mm: hugetlb: optionally allocate gigantic hugepages
using cma")
added support for allocating gigantic hugepages using CMA. This patch
enables the same for powerpc
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/hugetlb.h | 7 +++
arch/powe
P;
region[i] = PPC_INST_BLR;
do_protect(region);
return EXIT_SUCCESS;
}
Fixes: f2407ef3ba22 ("powerpc: helper to validate key-access permissions of a
pte")
Reported-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/book3s64/pkeys.c | 12 +
ff-by: Bharata B Rao
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/mmu.h | 5 ++
arch/powerpc/mm/book3s64/radix_pgtable.c | 81
arch/powerpc/platforms/powernv/setup.c | 10 ++-
3 files changed, 84 insertions(+), 12 deletions(-)
diff --git a/arch
ao
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/book3s64/radix_pgtable.c | 95 +---
1 file changed, 19 insertions(+), 76 deletions(-)
diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c
b/arch/powerpc/mm/book3s64/radix_pgtable.c
index 46ad2da3087a..d5a01b9aadc9 10
701 - 800 of 4547 matches
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