Re: [PATCH V2 07/13] powerpc/vas: Take reference to PID and mm for user space windows

On Thu, 2019-12-12 at 05:02 -0800, Christoph Hellwig wrote: > > + if (txwin->user_win) { > > + /* > > +* Window opened by child thread may not be closed when > > +* it exits. So take reference to its pid and release it > > +* when the window is free

[PATCH 10/10] Documentation/powerpc: VAS API

-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- Documentation/powerpc/index.rst | 1 + Documentation/powerpc/vas-api.rst | 246 ++ 2 files changed, 247 insertions(+) create mode 100644 Documentation/powerpc/vas-api.rst diff --git

[PATCH 09/10] powerpc/vas: Remove 'pid' in vas_tx_win_attr struct

When window is opened, pid reference is taken for user space windows. Not needed for kernel windows. So remove 'pid' in vas_tx_win_attr struct. Signed-off-by: Haren Myneni --- arch/powerpc/include/asm/vas.h| 1 - drivers/crypto/nx/nx-commom-powernv.c | 1 - 2 files changed, 2

[PATCH 08/10] crypto/NX: Add NX GZIP user space API

/paste instructions and pasting the CRBs to the virtual address (aka paste_address) returned by mmap(). Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- drivers/crypto/nx/Makefile| 2 +- drivers/crypto/nx/nx-842-powernv.h| 2 + drivers/crypto/nx/nx-commom

[PATCH 07/10] crypto/nx: Enable and setup GZIP compresstion type

Changes to probe GZIP device-tree nodes, open RX windows and setup GZIP compression type. No plans to provide GZIP usage in kernel right now, but this patch enables GZIP for user space usage. Signed-off-by: Haren Myneni --- drivers/crypto/nx/nx-commom-powernv.c | 20 +++- 1

[PATCH 06/10] crypto/NX: Make code generic to add new GZIP compression

Make code generic so that extend it to support new GZIP compression type. Changed nx842 reference to nx and moved some code to new functions. The actual functionality is not changed. Signed-off-by: Haren Myneni --- drivers/crypto/nx/nx-commom-powernv.c | 160

[PATCH 05/10] crypto/nx: Organize powernv 842 code to add new GZIP compression type

Move common code for 842 and GZIP such as initializtion, read device tree entries and allocation of receive and send (kernel usage) windows to nx-common-powernv.c and keep 842 specific code in nx-842-powernv.c Signed-off-by: Haren Myneni --- drivers/crypto/nx/Makefile| 2

[PATCH 04/10] crypto/nx: Initialize coproc entry with kzalloc

obe() Signed-off-by: Haren Myneni --- drivers/crypto/nx/nx-842-powernv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/nx/nx-842-powernv.c b/drivers/crypto/nx/nx-842-powernv.c index c037a24..8e63326 100644 --- a/drivers/crypto/nx/nx-842-powernv.c +++ b/driv

[PATCH 03/10] powerpc/vas: Define VAS_TX_WIN_OPEN ioctl API

Define the VAS_TX_WIN_OPEN ioctl interface for NX GZIP access from user space. This interface is used to open GZIP send window and mmap region which can be used by userspace to send requests to NX directly with copy/paste instructions. Signed-off-by: Haren Myneni --- Documentation/ioctl/ioctl

[PATCH 02/10] powerpc/vas: Initialize window attributes for GZIP compression

Initialize send and receive window attributes for GZIP high and normal priority types. Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-window.c | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/platforms/powernv/vas-window.c

[PATCH 01/10] powerpc/vas: Define vas_win_paste_addr()

into their address space and then use copy and paste instructions to submit the CRBs to the NX engine. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/include/asm/vas.h | 5 + arch/powerpc/platforms/powernv/vas-window.c | 10 ++ 2 files

[PATCH 00/10] crypto/nx: Enable GZIP engine and provide userpace API

system to make sure no regression and tested GZIP compression on power9 with tests available in the above link. Thanks to Bulent Abali for nxz library and tests development. Haren Myneni (10): powerpc/vas: Define vas_win_paste_addr() powerpc/vas: Initialize window attributes for GZIP

[PATCH V2 00/13] powerpc/vas: Page fault handling for user space NX requests

space requests. No page faults on kernel request buffer. Changelog: V2: - Use threaded IRQ instead of own kernel thread handler - Use pswid insted of user space CSB address to find valid CRB - Removed unused macros and other changes as suggested by Christoph Hellwig Haren Myneni (

Re: [PATCH V2 00/13] powerpc/vas: Page fault handling for user space NX requests

On Mon, 2019-12-09 at 02:38 -0600, Segher Boessenkool wrote: > Hi! > > On Mon, Dec 09, 2019 at 06:37:09AM +0100, Christophe Leroy wrote: > > What do you mean by NX ? > > It is the Power9 "Nest Accelerator". The patch series should ideally > mention that right at the start, yeah. Thanks, NX

[PATCH V2 13/13] powerpc/vas: Free send window in VAS instance after credits returned

NX may be processing requests while trying to close window. Wait until all credits are returned and then free send window from VAS instance. Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-window.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch

[PATCH V2 12/13] powerpc/vas: Display process stuck message

Process can not close send window until all requests are processed. Means wait until window state is not busy and send credits are returned. Display debug message in case taking longer to close the window. Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-window.c | 26

[PATCH V2 11/13] powerpc/vas: Return credits after handling fault

NX expects OS to return credit for send window after processing each fault. Also credit has to be returned even for fault window. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 10 ++ arch/powerpc/platforms/powernv/vas

[PATCH V2 10/13] powerpc/vas: Do not use default credits for receive window

System checkstops if RxFIFO overruns with more requests than the maximum possible number of CRBs allowed in FIFO at any time. So max credits value (rxattr.wcreds_max) is set and is passed to vas_rx_win_open() by the the driver. Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv

[PATCH V2 09/13] powerpc/vas: Print CRB and FIFO values

Dump FIFO entry values if could not find send window and print CRB for debugging. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 41 ++ 1 file changed, 41 insertions(+) diff --git a/arch/powerpc

[PATCH V2 08/13] powerpc/vas: Update CSB and notify process for fault CRBs

Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 130 + 1 file changed, 130 insertions(+) diff --git a/arch/powerpc/platforms/powernv/vas-fault.c b/arch/powerpc/platforms/powernv/vas-fault.c index e1e34c6..88a211b 100644 --- a/arch/powerpc

[PATCH V2 07/13] powerpc/vas: Take reference to PID and mm for user space windows

to its parent. To prevent reusing the pid until the window closed, take reference to pid and task mm. Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-debug.c | 2 +- arch/powerpc/platforms/powernv/vas-window.c | 44 ++--- arch/powerpc/platforms/powernv

[PATCH V2 06/13] powerpc/vas: Register NX with fault window ID and IRQ port value

For each user space send window, register NX with fault window ID and port value so that NX paste CRBs in this fault FIFO when it sees fault on the request buffer. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-window.c | 15

[PATCH V2 05/13] powerpc/vas: Setup thread IRQ handler per VAS instance

-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 83 + arch/powerpc/platforms/powernv/vas-window.c | 60 + arch/powerpc/platforms/powernv/vas.c| 15 +- arch/powerpc/platforms/powernv/vas.h

[PATCH V2 04/13] powerpc/vas: Setup fault window per VAS instance

Setup fault window for each VAS instance. When NX gets fault on request buffer, write fault CRBs in the corresponding fault FIFO and then sends an interrupt to the OS. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/Makefile | 2 +- arch

[PATCH V2 03/13] powerpc/vas: Read interrupts and vas-port device tree properties

Read interrupts and vas-port device tree properties per each VAS instance. NX generates an interrupt when it sees page fault on the request buffer. Interrupts property is used to setup IRQ for handing the fault and set port value for each user space send window. Signed-off-by: Haren Myneni

[PATCH V2 02/13] powerpc/vas: Define nx_fault_stamp in coprocessor_request_block

-by: Haren Myneni --- arch/powerpc/include/asm/icswx.h | 18 +- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/icswx.h b/arch/powerpc/include/asm/icswx.h index 9872f85..b233d1e 100644 --- a/arch/powerpc/include/asm/icswx.h +++ b/arch/powerpc/include

[PATCH V2 01/13] powerpc/vas: Describe vas-port and interrupts properties

Signed-off-by: Haren Myneni --- Documentation/devicetree/bindings/powerpc/ibm,vas.txt | 5 + 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/powerpc/ibm,vas.txt b/Documentation/devicetree/bindings/powerpc/ibm,vas.txt index bf11d2f..12de08b 100644

[PATCH V2 00/13] powerpc/vas: Page fault handling for user space NX requests

s as suggested by Christoph Hellwig Haren Myneni (13): powerpc/vas: Describe vas-port and interrupts properties powerpc/vas: Define nx_fault_stamp in coprocessor_request_block powerpc/vas: Read interrupts and vas-port device tree properties powerpc/vas: Setup fault window per VAS instance

RE: [PATCH 09/14] powerpc/vas: Update CSB and notify process for fault CRBs

>  > +static void notify_process(pid_t pid, u64 fault_addr)> +{> + int rc;> + struct kernel_siginfo info;> +> + memset(, 0, sizeof(info));> +> + info.si_signo = SIGSEGV;> + info.si_errno = EFAULT;> + info.si_code = SEGV_MAPERR;> +> + info.si_addr = (void *)fault_addr;> + rcu_read_lock();> + rc =

RE: [PATCH 09/14] powerpc/vas: Update CSB and notify process for fault CRBs

"Linuxppc-dev" wrote on 11/27/2019 12:46:09 AM: > > > > +static void notify_process(pid_t pid, u64 fault_addr) > > +{ > > + int rc; > > + struct kernel_siginfo info; > > + > > + memset(, 0, sizeof(info)); > > + > > + info.si_signo = SIGSEGV; > > + info.si_errno = EFAULT; > > +

RE: [PATCH 03/14] powerpc/vas: Define nx_fault_stamp in coprocessor_request_block

"Linuxppc-dev" wrote on 11/27/2019 12:30:55 AM: > > > +#define crb_csb_addr(c) __be64_to_cpu(c->csb_addr) > > +#define crb_nx_fault_addr(c) __be64_to_cpu > (c->stamp.nx.fault_storage_addr) > > +#define crb_nx_flags(c) c->stamp.nx.flags > > +#define crb_nx_fault_status(c)

RE: [PATCH 02/14] Revert "powerpc/powernv: remove the unused vas_win_paste_addr and vas_win_id functions"

"Linuxppc-dev" wrote on 11/27/2019 12:28:10 AM: > > On Tue, Nov 26, 2019 at 05:03:27PM -0800, Haren Myneni wrote: > > > > This reverts commit 452d23c0f6bd97f2fd8a9691fee79b76040a0feb. > > > > User space send windows (NX GZIP compression) need vas_w

[PATCH 14/14] powerpc/vas: Free send window in VAS instance after credits returned

NX may be processing requests while trying to close window. Wait until all credits are returned and then free send window from VAS instance. Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-window.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch

[PATCH 13/14] powerpc/vas: Display process stuck message

Process can not close send window until all requests are processed. Means wait until window state is not busy and send credits are returned. Display debug message in case taking longer to close the window. Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-window.c | 26

[PATCH 12/14] powerpc/VAS: Return credits after handling fault

NX expects OS to return credit for send window after processing each fault. Also credit has to be returned even for fault window. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 9 + arch/powerpc/platforms/powernv/vas

[PATCH 11/14] powerpc/vas: Do not use default credits for receive window

System checkstops if RxFIFO overruns with more requests than the maximum possible number of CRBs allowed in FIFO at any time. So max credits value (rxattr.wcreds_max) is set and is passed to vas_rx_win_open() by the the driver. Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv

[PATCH 10/14] powerpc/vas: Print CRB and FIFO values

Dump FIFO values if could not find send window and print CRB for debugging. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 40 ++ 1 file changed, 40 insertions(+) diff --git a/arch/powerpc/platforms

[PATCH 09/14] powerpc/vas: Update CSB and notify process for fault CRBs

Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 121 - 1 file changed, 120 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/platforms/powernv/vas-fault.c b/arch/powerpc/platforms/powernv/vas-fault.c index 7a8b2b5..dd27649 100644

[PATCH 08/14] powerpc/vas: Take reference to PID and mm for user space windows

to its parent. To prevent reusing the pid until the window closed, take reference to pid and task mm. Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-debug.c | 2 +- arch/powerpc/platforms/powernv/vas-window.c | 44 ++--- arch/powerpc/platforms/powernv

[PATCH 07/14] powerpc/vas: Read and process fault CRBs

-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 81 + arch/powerpc/platforms/powernv/vas-window.c | 51 ++ arch/powerpc/platforms/powernv/vas.h| 3 ++ 3 files changed, 135 insertions(+) diff

[PATCH 06/14] powerpc/vas: Setup fault handler per VAS instance

Fault handler is created as kernel thread for each VAS instance and invoked whenever NX generates page fault. This thread reads CRBs from fault FIFO and process them. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 54

[PATCH 05/14] powerpc/vas: Setup fault window per VAS instance

Setup fault window for each VAS instance. When NX gets fault on request buffer, write fault CRBs in the corresponding fault FIFO and then sends an interrupt to the OS. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/Makefile | 2

[PATCH 04/14] powerpc/vas: Setup IRQ mapping and register port for each window

. So for kernel requests, ignore if interrupts property is not available. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-window.c | 14 ++ arch/powerpc/platforms/powernv/vas.c| 68 ++--- arch/powerpc

[PATCH 03/14] powerpc/vas: Define nx_fault_stamp in coprocessor_request_block

-by: Haren Myneni --- arch/powerpc/include/asm/icswx.h | 32 +++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/icswx.h b/arch/powerpc/include/asm/icswx.h index 9872f85..c071471 100644 --- a/arch/powerpc/include/asm/icswx.h +++ b/arch

[PATCH 02/14] Revert "powerpc/powernv: remove the unused vas_win_paste_addr and vas_win_id functions"

This reverts commit 452d23c0f6bd97f2fd8a9691fee79b76040a0feb. User space send windows (NX GZIP compression) need vas_win_paste_addr() to mmap window paste address and vas_win_id() to get window ID when window address is given. Added vas_win_id() and vas_win_paste_addr() with: commit

[PATCH 01/14] powerpc/vas: Describe vas-port and interrupts properties

[PATCH 01/14] powerpc/vas: Describe vas-port and interrupts properties Signed-off-by: Haren Myneni --- Documentation/devicetree/bindings/powerpc/ibm,vas.txt | 5 + 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/powerpc/ibm,vas.txt b/Documentation/devicetree

[PATCH 00/14] powerpc/vas: Page fault handling for user space NX requests

happens only for user space requests. No page faults on kernel request buffer. Haren Myneni (14): powerpc/vas: Describe vas-port and interrupts properties Revert "powerpc/powernv: remove the unused vas_win_paste_addr and vas_win_id functions" powerpc/vas: D

[RFC PATCH 13/13] powerpc/vas: Free send window after credits returned

NX may be processing requests while trying to close window. Wait until all credits are returned and then free send window from VAS instance. Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-window.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch

[RFC PATCH 12/13] powerpc/vas: Display process stuck message

Process can not close send window until all requests are processed. Means wait until window state is not busy and send credits are returned. Display debug message in case taking longer to close the window. Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-window.c | 26

[RFC PATCH 11/13] powerpc/vas: Return credits after handling fault

NX expects OS to return credit for send window after processing each fault. Also credit has to be returned even for fault window. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 10 ++ arch/powerpc/platforms/powernv/vas

[RFC PATCH 10/13] powerpc/vas: Do not use default credits for receive window

System checkstops if RxFIFO overruns with more requests than the maximum possible number of CRBs allowed in FIFO at any time. So max credits value (rxattr.wcreds_max) is set and is passed to vas_rx_win_open() by the the driver. Signed-off-by:Haren Myneni ---

[RFC PATCH 09/13] powerpc/vas: Add and use tgid in vas_window to close window

to the parent. Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 14 -- arch/powerpc/platforms/powernv/vas-window.c | 6 +- arch/powerpc/platforms/powernv/vas.h| 6 ++ 3 files changed, 23 insertions(+), 3 deletions(-) diff --git a/arch

[RFC PATCH 08/13] powerpc/vas: Print CRB and FIFO values

Dump FIFO values if could not find send window and print CRB for debugging. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 40 ++ 1 file changed, 40 insertions(+) diff --git a/arch/powerpc/platforms

[RFC PATCH 07/13] powerpc/vas: Update CSB and notify process for fault CRBs

For each fault CRB, update fault address in CRB (fault_storage_addr) and translation error status in CSB. If the actual fault is in CSB, send signal to process with SIGSEGV. Process can send new request by touching the fault address. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren

[RFC PATCH 06/13] powerpc/vas: Read and process fault CRBs

-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 84 + arch/powerpc/platforms/powernv/vas-window.c | 51 ++ arch/powerpc/platforms/powernv/vas.h| 3 ++ 3 files changed, 138 insertions(+) diff

[RFC PATCH 05/13] powerpc/vas: Setup fault handler per VAS instance

Fault handler is created as kernel thread for each VAS instance and invoked whenever NX generates page fault. This thread reads CRBs from fault FIFO and process them. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 53

[RFC PATCH 04/13] powerpc/vas: Setup fault window per VAS instance

Setup fault window for each VAS instance. When NX gets fault on request buffer, write fault CRBs in the corresponding fault FIFO and then sends an interrupt to the OS. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/Makefile | 2

[RFC PATCH 03/13] powerpc/vas: Setup IRQ mapping and register port for each window

. So for kernel requests, ignore if interrupts property is not available. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- .../devicetree/bindings/powerpc/ibm,vas.txt| 5 ++ arch/powerpc/platforms/powernv/vas-window.c| 12 arch/powerpc/platforms/powernv

[RFC PATCH 02/13] powerpc/vas: Define nx_fault_stamp in coprocessor_request_block

-by: Haren Myneni --- arch/powerpc/include/asm/icswx.h | 32 +++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/icswx.h b/arch/powerpc/include/asm/icswx.h index 9872f85..4015ed4 100644 --- a/arch/powerpc/include/asm/icswx.h +++ b/arch

[RFC PATCH 01/13] Revert "powerpc/powernv: remove the unused vas_win_paste_addr and vas_win_id functions"

This reverts commit 452d23c0f6bd97f2fd8a9691fee79b76040a0feb. User space send windows (NX GZIP compression) need vas_win_paste_addr() to mmap window paste address and vas_win_id() to get window ID when window address is given. vas_win_id() is introduced in original commit 61f3cca8cda97

[RFC PATCH 00/13] powerpc/vas: Page fault handling for user space NX requests

rn credits for send and fault windows after handling faults. Patch13: Fix closing send window after all credits are returned. This issue happens only for user space requests. No page faults on kernel request buffer. Haren Myneni (13): Revert "powerpc/powernv: re

[PATCH V2] crypto/NX: Set receive window credits to max number of CRBs in RxFIFO

System gets checkstop if RxFIFO overruns with more requests than the maximum possible number of CRBs in FIFO at the same time. The max number of requests per window is controlled by window credits. So find max CRBs from FIFO size and set it to receive window credits. Fixes: b0d6c9bab5e4

Re: [EXTERNAL] Re: crypto/NX: Set receive window credits to max number of CRBs in RxFIFO

On 06/18/2019 05:35 AM, Michael Ellerman wrote: > Haren Myneni writes: >> >> System gets checkstop if RxFIFO overruns with more requests than the >> maximum possible number of CRBs in FIFO at the same time. So find max >> CRBs from FIFO size and set it to receive w

crypto/NX: Set receive window credits to max number of CRBs in RxFIFO

System gets checkstop if RxFIFO overruns with more requests than the maximum possible number of CRBs in FIFO at the same time. So find max CRBs from FIFO size and set it to receive window credits. CC: sta...@vger.kernel.org # v4.14+ Signed-off-by:Haren Myneni diff --git

Re: crash after NX error

>> [c01c9d98be30] c000b584 ppc_clone+0x8/0xc >> --- Exception: c00 (System Call) at 7afe9daf87f4 >> SP (7fffca606880) is in userspace >> >> So, it looks like there could be a problem in the error path, plausibly >> fixed by this patch: >> >>

Re: crash after NX error

; > So, it looks like there could be a problem in the error path, plausibly > fixed by this patch: > > commit 656ecc16e8fc2ab44b3d70e3fcc197a7020d0ca5 > Author: Haren Myneni > Date: Wed Jun 13 00:32:40 2018 -0700 > > crypto/nx: Initialize 842 high and nor

[PATCH V3 2/2] crypto/nx: Initialize 842 high and normal RxFIFO control registers

. Signed-off-by: Haren Myneni --- Changlog: V2: Execute nx_coproc_init OPAL call per NX without depending on FIFO priority [Stewart Smith] V3: Verify OPAL call availability before using NX coproc init [Michael Ellerman] diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include

[PATCH V3 1/2] powerpc/powernv: Export opal_check_token symbol

Export opal_check_token symbol for modules to check the availability of OPAL calls before using them. Signed-off-by: Haren Myneni diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c index 48fbb41..838b79b 100644 --- a/arch/powerpc/platforms/powernv

[PATCH V2] crypto/nx: Initialize 842 high and normal RxFIFO control registers

. Signed-off-by: Haren Myneni --- Changlog: V2: Execute nx_coproc_init OPAL call per NX without depending on FIFO priority [Stewart Smith] diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h index d886a5b..ff61e4b 100644 --- a/arch/powerpc/include/asm/opal-api.h

Re: [PATCH] crypto/nx: Initialize 842 high and normal RxFIFO control registers

On 06/03/2018 09:08 PM, Stewart Smith wrote: > Haren Myneni writes: >> On 06/03/2018 05:41 PM, Stewart Smith wrote: >>> Haren Myneni writes: >>>> On 06/01/2018 12:41 AM, Stewart Smith wrote: >>>>> Haren Myneni writes: >>>>>> NX incr

Re: [PATCH] crypto/nx: Initialize 842 high and normal RxFIFO control registers

On 06/03/2018 05:41 PM, Stewart Smith wrote: > Haren Myneni writes: >> On 06/01/2018 12:41 AM, Stewart Smith wrote: >>> Haren Myneni writes: >>>> NX increments readOffset by FIFO size in receive FIFO control register >>>> when CRB is

Re: powerpc/powernv: copy/paste - Mask XERS0 bit in CR

On 06/03/2018 03:48 AM, Michael Ellerman wrote: > Hi Haren, > > Haren Myneni writes: >> >> NX can set 3rd bit in CR register for XER[SO] (Summation overflow) >> which is not related to paste request. The current paste function >> returns failure for the

Re: [PATCH] crypto/nx: Initialize 842 high and normal RxFIFO control registers

On 06/01/2018 12:41 AM, Stewart Smith wrote: > Haren Myneni writes: >> NX increments readOffset by FIFO size in receive FIFO control register >> when CRB is read. But the index in RxFIFO has to match with the >> corresponding entry in FIFO maintained by VAS in kernel

Re: [PATCH] crypto/nx: Initialize 842 high and normal RxFIFO control registers

On 05/31/2018 08:52 PM, Stewart Smith wrote: > Haren Myneni writes: >> NX increments readOffset by FIFO size in receive FIFO control register >> when CRB is read. But the index in RxFIFO has to match with the >> corresponding entry in FIFO maintained by VAS in kernel

[PATCH] crypto/nx: Initialize 842 high and normal RxFIFO control registers

. Signed-off-by: Haren Myneni diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h index d886a5b..ff61e4b 100644 --- a/arch/powerpc/include/asm/opal-api.h +++ b/arch/powerpc/include/asm/opal-api.h @@ -206,7 +206,8 @@ #define OPAL_NPU_TL_SET

powerpc/powernv: copy/paste - Mask XERS0 bit in CR

v/vas: Define copy/paste interfaces") Cc: sta...@vger.kernel.org # v4.14+ Signed-off-by: Haren Myneni diff --git a/arch/powerpc/platforms/powernv/copy-paste.h b/arch/powerpc/platforms/powernv/copy-paste.h index c9a5036..82392e3 100644 --- a/arch/powerpc/platforms/powernv/copy-paste.h

Re: [PATCH] powerpc: paste - Mask XERSO bit in CR

On 04/26/2018 11:27 PM, Michael Ellerman wrote: > Haren Myneni <ha...@linux.vnet.ibm.com> writes: >> >> NX can set 3rd bit in CR register for XER[SO] (Summation overflow) >> which is not used for paste return value. So. mask this bit to get >> proper return st

[PATCH] powerpc: paste - Mask XERSO bit in CR

NX can set 3rd bit in CR register for XER[SO] (Summation overflow) which is not used for paste return value. So. mask this bit to get proper return status. Signed-off-by: Haren Myneni <ha...@us.ibm.com> diff --git a/arch/powerpc/platforms/powernv/copy-paste.h b/arch/powerpc/pla

[PATCH] crypto/nx: Initialize 842 high and normal RxFIFO control registers

and normal FIFOs. Signed-off-by: Haren Myneni <ha...@us.ibm.com> diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h index d886a5b..ff61e4b 100644 --- a/arch/powerpc/include/asm/opal-api.h +++ b/arch/powerpc/include/asm/opal-api.h @@ -206,7 +206,8 @@ #

Re: [rfc] powernv/kdump: Fix cases where the kdump kernel can get HMI's

On 12/05/2017 08:29 PM, Balbir Singh wrote: > On Mon, Dec 4, 2017 at 2:10 PM, Nicholas Piggin wrote: >> On Mon, 4 Dec 2017 11:37:01 +1100 >> Balbir Singh wrote: >> >>> On Sun, Dec 3, 2017 at 1:36 PM, Nicholas Piggin wrote: Seems

Re: [PATCH][V2] crypto/nx: fix spelling mistake: "availavle" -> "available"

Sorry for my mistake. Thanks. Acked-by: Haren Myneni <ha...@us.ibm.com> On 11/14/2017 06:32 AM, Colin King wrote: > From: Colin Ian King <colin.k...@canonical.com> > > Trivial fix to spelling mistake in pr_err error message text. Also > fix spelling mistake in proceed

[PATCH 2/2] crypto/nx: Do not initialize workmem allocation

[PATCH 2/2] crypto/nx: Do not initialize workmem allocation We are using percpu send window on P9 NX (powerNV) instead of opening / closing per each crypto session. Means txwin is removed from workmem. So we do not need to initialize workmem for each request. Signed-off-by: Haren Myneni <

[PATCH 1/2] crypto/nx: Use percpu send window for NX requests

is executing. Signed-off-by: Haren Myneni <ha...@us.ibm.com> --- drivers/crypto/nx/nx-842-powernv.c | 149 + 1 file changed, 68 insertions(+), 81 deletions(-) diff --git a/drivers/crypto/nx/nx-842-powernv.c b/drivers/crypto/nx/nx-842-powernv.c index e

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

On 09/02/2017 09:17 AM, Dan Streetman wrote: > On Sat, Sep 2, 2017 at 4:40 AM, Haren Myneni <ha...@linux.vnet.ibm.com> wrote: >> On 08/29/2017 06:58 AM, Dan Streetman wrote: >>> On Sat, Jul 22, 2017 at 1:01 AM, Haren Myneni <ha...@linux.vnet.ibm.com> >>>

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

On 08/29/2017 06:58 AM, Dan Streetman wrote: > On Sat, Jul 22, 2017 at 1:01 AM, Haren Myneni <ha...@linux.vnet.ibm.com> > wrote: >> >> This patch adds P9 NX support for 842 compression engine. Virtual >> Accelerator Switchboard (VAS) is used to access 842 engine o

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

On 09/01/2017 04:34 AM, Michael Ellerman wrote: > Haren Myneni <ha...@linux.vnet.ibm.com> writes: >>> On Mon, Aug 28, 2017 at 7:25 PM, Michael Ellerman <m...@ellerman.id.au> >>> wrote: >>>> Hi Haren, >>>> >>>> Some comment

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

On 09/01/2017 04:29 AM, Michael Ellerman wrote: > Hi Dan, > > Thanks for reviewing this series. > > Dan Streetman <ddstr...@ieee.org> writes: >> On Tue, Aug 29, 2017 at 5:54 PM, Haren Myneni <ha...@linux.vnet.ibm.com> >> wrote: >>> On 0

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

On 08/31/2017 06:31 AM, Dan Streetman wrote: > On Tue, Aug 29, 2017 at 5:54 PM, Haren Myneni <ha...@linux.vnet.ibm.com> > wrote: >> On 08/29/2017 02:23 PM, Benjamin Herrenschmidt wrote: >>> On Tue, 2017-08-29 at 09:58 -0400, Dan Streetman wrote: >>

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

On 08/31/2017 06:40 AM, Dan Streetman wrote: > On Thu, Aug 31, 2017 at 3:44 AM, Haren Myneni <ha...@linux.vnet.ibm.com> > wrote: >> Thanks MIchael and Dan for your review comments. >> >> >> On 08/29/2017 06:32 AM, Dan Streetman wrote: >>> On Mon,

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

Thanks MIchael and Dan for your review comments. On 08/29/2017 06:32 AM, Dan Streetman wrote: > On Mon, Aug 28, 2017 at 7:25 PM, Michael Ellerman <m...@ellerman.id.au> wrote: >> Hi Haren, >> >> Some comments inline ... >> >> Haren Myneni <ha...@lin

[PATCH V4 7/7] crypto/nx: Add P9 NX support for 842 compression engine

. For compression / decompression requests, we use only hight priority FIFOs in kernel. Each NX request will be communicated to VAS using copy/paste instructions with vas_copy_crb() / vas_paste_crb() functions. Signed-off-by: Haren Myneni <ha...@us.ibm.com> Reviewed-by: Ram Pai <linux...@u

[PATCH V4 6/7] crypto/nx: Add P9 NX specific error codes for 842 engine

This patch adds changes for checking P9 specific 842 engine error codes. These errros are reported in coprocessor status block (CSB) for failures. Signed-off-by: Haren Myneni <ha...@us.ibm.com> --- arch/powerpc/include/asm/icswx.h | 3 +++ drivers/crypto/nx/nx-842-powernv.

[PATCH V4 5/7] crypto/nx: Use kzalloc for workmem allocation

Send window is opened / closed for each crypto session. So initializes txwin in workmem. Signed-off-by: Haren Myneni <ha...@us.ibm.com> --- drivers/crypto/nx/nx-842.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/nx/nx-842.c b/drivers/crypto/nx/nx

[PATCH V4 4/7] crypto/nx: Add nx842_add_coprocs_list function

Updating coprocessor list is moved to nx842_add_coprocs_list(). This function will be used for both icswx and VAS functions. Signed-off-by: Haren Myneni <ha...@us.ibm.com> --- drivers/crypto/nx/nx-842-powernv.c | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) diff

[PATCH V4 3/7] crypto/nx: Create nx842_delete_coprocs function

Move deleting coprocessors info upon exit or failure to nx842_delete_coprocs(). Signed-off-by: Haren Myneni <ha...@us.ibm.com> --- drivers/crypto/nx/nx-842-powernv.c | 25 - 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/drivers/crypto/nx/

[PATCH V4 2/7] crypto/nx: Create nx842_configure_crb function

Configure CRB is moved to nx842_configure_crb() so that it can be used for icswx and VAS exec functions. VAS function will be added later with P9 support. Signed-off-by: Haren Myneni <ha...@us.ibm.com> --- drivers/crypto/nx/nx-842-powernv.c | 57 +-

[PATCH V4 1/7] crypto/nx: Rename nx842_powernv_function as icswx function

Rename nx842_powernv_function to nx842_powernv_exec. nx842_powernv_exec points to nx842_exec_icswx and will be point to VAS exec function which will be added later for P9 NX support. Signed-off-by: Haren Myneni <ha...@us.ibm.com> --- drivers/crypto/nx/nx-842-powernv.

[PATCH V4 0/7] Enable NX 842 compression engine on Power9

and compatible properties. - Incorporated review comments from Michael Ellerman. - Other minor issues found during HW testing. Haren Myneni (7): crypto/nx: Rename nx842_powernv_function as icswx function crypto/nx: Create nx842_configure_crb function crypto/nx: Create nx842_delete_coprocs

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

On 08/29/2017 02:57 PM, Benjamin Herrenschmidt wrote: > On Tue, 2017-08-29 at 14:54 -0700, Haren Myneni wrote: >> Opening send window for each crypto transform (crypto_alloc, >> compression/decompression, ..., crypto_free) so that does not have to >> wait for the previous cop

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

On 08/29/2017 02:23 PM, Benjamin Herrenschmidt wrote: > On Tue, 2017-08-29 at 09:58 -0400, Dan Streetman wrote: >>> + >>> + ret = -EINVAL; >>> + if (coproc && coproc->vas.rxwin) { >>> + wmem->txwin = nx842_alloc_txwin(coproc); >> >> this is wrong. the workmem is scratch

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