Re: [PATCH v6 0/4] PCI: layerscape: Add suspend/resume support for ls1043 and ls1021

On Mon, 04 Dec 2023 11:08:25 -0500, Frank Li wrote: > Add suspend/resume support for ls1043 and ls1021. > > Change log see each patch > > Frank Li (4): > PCI: layerscape: Add function pointer for exit_from_l2() > PCI: layerscape: Add suspend/resume for ls1021a > PCI: layerscape(ep): Rename

Re: [PATCH 2/3] PCI: layerscape: add suspend/resume for ls1021a

On Mon, Oct 16, 2023 at 12:11:04PM -0400, Frank Li wrote: > On Mon, Oct 16, 2023 at 10:22:11AM -0500, Bjorn Helgaas wrote: > > On Mon, Oct 16, 2023 at 10:45:25AM -0400, Frank Li wrote: > > > On Tue, Oct 10, 2023 at 06:02:36PM +0200, Lorenzo Pieralisi wrote: > > > >

Re: [PATCH 2/3] PCI: layerscape: add suspend/resume for ls1021a

On Mon, Oct 16, 2023 at 10:22:11AM -0500, Bjorn Helgaas wrote: > On Mon, Oct 16, 2023 at 10:45:25AM -0400, Frank Li wrote: > > On Tue, Oct 10, 2023 at 06:02:36PM +0200, Lorenzo Pieralisi wrote: > > > On Tue, Oct 10, 2023 at 10:20:12AM -0400, Frank Li wrote: > > >

Re: [PATCH 2/3] PCI: layerscape: add suspend/resume for ls1021a

On Tue, Oct 10, 2023 at 10:20:12AM -0400, Frank Li wrote: > On Wed, Oct 04, 2023 at 10:23:51AM -0400, Frank Li wrote: > > On Fri, Sep 15, 2023 at 02:43:05PM -0400, Frank Li wrote: > > > ls1021a add suspend/resume support. > > > > > > Signed-off-by: Frank Li > > > --- > > > > ping > > > > Frank

Re: [PATCH v3 1/1] PCI: layerscape-ep: set 64-bit DMA mask

On Tue, 26 Sep 2023 10:04:45 -0400, Frank Li wrote: > Set DMA mask and coherent DMA mask to enable 64-bit addressing. > > Read this: https://lore.kernel.org/linux-pci/20171026223701.ga25...@bhelgaas-glaptop.roam.corp.google.com Find the issue with the commit log (that I fixed). This does not

Re: [PATCH v4 1/2] PCI: layerscape: Add support for Link down notification

On Thu, 20 Jul 2023 09:58:33 -0400, Frank Li wrote: > Add support to pass Link down notification to Endpoint function driver > so that the LINK_DOWN event can be processed by the function. > > Applied to controller/layerscape, thanks! [1/2] PCI: layerscape: Add support for Link down

Re: [PATCH v4 1/2] PCI: layerscape: Add support for Link down notification

On Wed, Aug 16, 2023 at 11:53:16AM -0400, Frank Li wrote: > On Mon, Jul 31, 2023 at 11:06:31AM -0400, Frank Li wrote: > > On Thu, Jul 20, 2023 at 09:58:33AM -0400, Frank Li wrote: > > > Add support to pass Link down notification to Endpoint function driver > > > so that the LINK_DOWN event can be

Re: [PATCH v4 1/1] PCI: layerscape: Add the endpoint linkup notifier support

On Mon, 15 May 2023 11:10:49 -0400, Frank Li wrote: > Layerscape has PME interrupt, which can be used as linkup notifier. > Set CFG_READY bit of PEX_PF0_CONFIG to enable accesses from root complex > when linkup detected. > > Applied to controller/endpoint, thanks! [1/1] PCI: layerscape: Add

Re: [PATCH v4 1/1] PCI: layerscape: Add the endpoint linkup notifier support

On Mon, May 15, 2023 at 11:10:49AM -0400, Frank Li wrote: > Layerscape has PME interrupt, which can be used as linkup notifier. > Set CFG_READY bit of PEX_PF0_CONFIG to enable accesses from root complex > when linkup detected. > > Acked-by: Manivannan Sadhasivam > Signed-off-by: Xiaowei Bao >

Re: [PATCH v3 1/1] PCI: layerscape: Add EP mode support for ls1028a

On Thu, 09 Feb 2023 10:10:50 -0500, Frank Li wrote: > Add PCIe EP mode support for ls1028a. > > Applied to controller/layerscape, thanks! [1/1] PCI: layerscape: Add EP mode support for ls1028a https://git.kernel.org/pci/pci/c/be567c6cbc08 Thanks, Lorenzo

Re: [PATCH 1/1] PCI: layerscape: Add EP mode support for ls1028a

On Mon, Jan 09, 2023 at 03:41:31PM +, Frank Li wrote: > > > > From: Xiaowei Bao > > > > Add PCIe EP mode support for ls1028a. > > > > Signed-off-by: Xiaowei Bao > > Signed-off-by: Hou Zhiqiang > > --- > > > > All other patches were already accepte by maintainer in > >

Re: [PATCH v7 05/14] sizes.h: Add SZ_1T macro

On Fri, 21 Jan 2022 08:42:21 +, Christophe Leroy wrote: > Today drivers/pci/controller/pci-xgene.c defines SZ_1T > > Move it into linux/sizes.h so that it can be re-used elsewhere. > > Applied to pci/misc, thanks! [05/14] sizes.h: Add SZ_1T macro

Re: [PATCH] PCI: layerscape: Correct syntax by changing comma to semicolon

On Thu, 11 Mar 2021 03:37:45 +, Krzysztof Wilczyński wrote: > Replace command with a semicolon to correct syntax and to prevent > potential unspecified behaviour and/or unintended side effects. > > Related: > >

Re: [PATCH -next] pci/controller/dwc: convert comma to semicolon

/patch/20210311033745.1547044-1...@linux.com For the future email exchanges: don't top-post please. Thanks, Lorenzo > Thanks. > Roy > > -Original Message----- > From: Lorenzo Pieralisi > > On Sun, Mar 07, 2021 at 07:36:57PM +0100, Krzysztof Wilczyński wrote: > > Hi, > &g

Re: [PATCH -next] pci/controller/dwc: convert comma to semicolon

On Sun, Mar 07, 2021 at 07:36:57PM +0100, Krzysztof Wilczyński wrote: > Hi, > > [...] > > I would request NXP maintainers to take this patch, rewrite it as > > Bjorn requested and resend it as fast as possible, this is a very > > relevant fix. > [...] > > Looking at the state of the

Re: [PATCH] PCI: dwc: layerscape: convert to builtin_platform_driver()

On Wed, 20 Jan 2021 11:52:46 +0100, Michael Walle wrote: > fw_devlink will defer the probe until all suppliers are ready. We can't > use builtin_platform_driver_probe() because it doesn't retry after probe > deferral. Convert it to builtin_platform_driver(). Applied to pci/dwc, thanks! [1/1]

Re: [PATCH] PCI: dwc: layerscape: convert to builtin_platform_driver()

On Wed, Jan 20, 2021 at 11:52:46AM +0100, Michael Walle wrote: > fw_devlink will defer the probe until all suppliers are ready. We can't > use builtin_platform_driver_probe() because it doesn't retry after probe > deferral. Convert it to builtin_platform_driver(). > > Fixes: e590474768f1 ("driver

Re: [PATCH] PCI: dwc: layerscape: convert to builtin_platform_driver()

On Wed, Jan 20, 2021 at 08:28:36PM +0100, Michael Walle wrote: > [RESEND, fat-fingered the buttons of my mail client and converted > all CCs to BCCs :(] > > Am 2021-01-20 20:02, schrieb Saravana Kannan: > > On Wed, Jan 20, 2021 at 6:24 AM Rob Herring wrote: > > > > > > On Wed, Jan 20, 2021 at

Re: [PATCH -next] pci/controller/dwc: convert comma to semicolon

On Wed, Jan 06, 2021 at 01:07:22PM -0600, Bjorn Helgaas wrote: > On Wed, Dec 16, 2020 at 09:19:44PM +0800, Zheng Yongjun wrote: > > Replace a comma between expression statements by a semicolon. > > Looks like a good fix, but read this about the changelog title: > >

Re: [PATCH v6 0/5] PCI: Unify ECAM constants in native PCI Express drivers

On Sun, 29 Nov 2020 23:07:38 +, Krzysztof Wilczyński wrote: > Unify ECAM-related constants into a single set of standard constants > defining memory address shift values for the byte-level address that can > be used when accessing the PCI Express Configuration Space, and then > move native PCI

Re: [PATCH v6 1/5] PCI: Unify ECAM constants in native PCI Express drivers

On Sun, Nov 29, 2020 at 11:07:39PM +, Krzysztof Wilczyński wrote: > Add ECAM-related constants to provide a set of standard constants > defining memory address shift values to the byte-level address that can > be used to access the PCI Express Configuration Space, and then move > native PCI

Re: [PATCH v2 00/16] PCI: dwc: Another round of clean-ups

On Thu, 5 Nov 2020 15:11:43 -0600, Rob Herring wrote: > Here's another batch of DWC PCI host refactoring. This series primarily > moves more of the MSI, link up, and resource handling to the core > code. Beyond a couple of minor fixes, new in this version is runtime > detection of iATU regions

Re: [PATCHv7 00/12]PCI: dwc: Add the multiple PF support for DWC and Layerscape

On Tue, Aug 11, 2020 at 05:54:29PM +0800, Zhiqiang Hou wrote: > From: Hou Zhiqiang > > Add the PCIe EP multiple PF support for DWC and Layerscape, and use > a list to manage the PFs of each PCIe controller; add the doorbell > MSIX function for DWC; and refactor the Layerscape EP driver due to >

Re: [PATCH v6 00/11] Add the multiple PF support for DWC and Layerscape

On Sat, Mar 14, 2020 at 11:30:27AM +0800, Xiaowei Bao wrote: > Add the PCIe EP multiple PF support for DWC and Layerscape, add > the doorbell MSIX function for DWC, use list to manage the PF of > one PCIe controller, and refactor the Layerscape EP driver due to > some platforms difference. > >

Re: [PATCH v4 00/11] Add the multiple PF support for DWC and Layerscape

On Tue, Sep 24, 2019 at 10:18:38AM +0800, Xiaowei Bao wrote: > Add the PCIe EP multiple PF support for DWC and Layerscape, add > the doorbell MSIX function for DWC, use list to manage the PF of > one PCIe controller, and refactor the Layerscape EP driver due to > some platforms difference. > >

Re: [PATCH v6 1/3] dt-bindings: pci: layerscape-pci: add compatible strings "fsl,ls1028a-pcie"

On Mon, Sep 02, 2019 at 11:43:17AM +0800, Xiaowei Bao wrote: > Add the PCIe compatible string for LS1028A Sentences must be terminated with a period. > Signed-off-by: Xiaowei Bao > Signed-off-by: Hou Zhiqiang > Reviewed-by: Rob Herring > --- > v2: > - No change. > v3: > - No change. > v4: >

Re: [PATCH v6 3/3] PCI: layerscape: Add LS1028a support

> > > -Original Message- > > From: Xiaowei Bao > > Sent: Wednesday, November 6, 2019 11:36 AM > > To: Lorenzo Pieralisi > > Cc: robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; > > Leo Li ; M.h. Lian ; Mingkai > > Hu ; Roy Zang ;

Re: [PATCH v2 07/10] PCI: layerscape: Modify the MSIX to the doorbell way

On Thu, Aug 29, 2019 at 10:43:18AM +0530, Kishon Vijay Abraham I wrote: > Gustavo, > > On 27/08/19 6:55 PM, Andrew Murray wrote: > > On Sat, Aug 24, 2019 at 12:08:40AM +, Xiaowei Bao wrote: > >> > >> > >>> -Original Message- > >>> From: Andrew Murray > >>> Sent: 2019年8月23日 21:58 >

Re: [PATCH v6 3/3] PCI: layerscape: Add LS1028a support

On Mon, Sep 02, 2019 at 11:43:19AM +0800, Xiaowei Bao wrote: > Add support for the LS1028a PCIe controller. > > Signed-off-by: Xiaowei Bao > Signed-off-by: Hou Zhiqiang > --- > v2: > - No change. > v3: > - Reuse the ls2088 driver data structurt. > v4: > - No change. > v5: > - No change. >

Re: [PATCH v4 1/3] dt-bindings: pci: layerscape-pci: add compatible strings "fsl,ls1028a-pcie"

On Fri, Aug 23, 2019 at 04:26:41PM +0800, Xiaowei Bao wrote: > Add the PCIe compatible string for LS1028A > > Signed-off-by: Xiaowei Bao > Signed-off-by: Hou Zhiqiang > Reviewed-by: Rob Herring > --- > v2: > - No change. > v3: > - No change. > v4: > - No change. > >

Re: [PATCHv6 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.

On Wed, Aug 14, 2019 at 09:48:00AM +, Xiaowei Bao wrote: > > > > -Original Message- > > From: Lorenzo Pieralisi > > Sent: 2019年8月14日 17:30 > > To: Xiaowei Bao > > Cc: M.h. Lian ; Mingkai Hu > > ; Roy Zang ; > > bhelg...@goog

Re: [PATCHv6 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.

I asked you to remove the period at the end of the patch $SUBJECT and you did not, either you do not read what I write or explain me what's going on. On Wed, Aug 14, 2019 at 10:03:29AM +0800, Xiaowei Bao wrote: > The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1 > is 32bit, BAR2

Re: [PATCHv5 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.

git log --oneline --follow drivers/pci/controller/dwc/pci-layerscape.c Do you see any commit with a $SUBJECT ending with a period ? There is not. So remove it from yours too. On Tue, Aug 13, 2019 at 02:28:39PM +0800, Xiaowei Bao wrote: > The PCIe controller of layerscape just have 4 BARs, BAR0

Re: [EXT] Re: [PATCHv5 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.

You should fix your email client set-up to avoid sticking an [EXT] tag to your emails $SUBJECT. On Tue, Aug 13, 2019 at 07:39:48AM +, Xiaowei Bao wrote: > > > > -Original Message- > > From: Kishon Vijay Abraham I > > Sent: 2019年8月13日 15:30 > > To: Xiaowei Bao ;

Re: [EXT] Re: [PATCHv3 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.

On Mon, Aug 12, 2019 at 10:39:00AM +, Xiaowei Bao wrote: > > > > -Original Message- > > From: Lorenzo Pieralisi > > Sent: 2019年8月12日 18:12 > > To: Xiaowei Bao ; kis...@ti.com > > Cc: bhelg...@google.com; robh...@kernel.org; mark.rutl...@arm.

Re: [PATCHv3 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.

First off: Trim the CC list, you CC'ed maintainers (and mailing lists) for no reasons whatsover. Then, read this: https://lore.kernel.org/linux-pci/20171026223701.ga25...@bhelgaas-glaptop.roam.corp.google.com/ and make your patches compliant please. On Fri, Jun 28, 2019 at 09:38:25AM +0800,

Re: [PATCHv3 2/2] PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC separately

On Fri, Jun 28, 2019 at 09:38:26AM +0800, Xiaowei Bao wrote: > Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC separately. > > Signed-off-by: Xiaowei Bao > --- > v2: > - No change. > v3: > - modify the commit message. > > drivers/pci/controller/dwc/Kconfig | 20 ++-- >

Re: [PATCH 1/8] PCI: dwc: pci-dra7xx: fix a leaked reference by adding missing of_node_put

sponding object release within this function. > ./drivers/pci/controller/dwc/pci-dra7xx.c:255:1-7: ERROR: missing > of_node_put; acquired a node pointer with refcount incremented on line 241, > but without a corresponding object release within this function. > > Signed-off-by: Wen Yang

Re: [PATCHv6 3/4] pci: layerscape: Add the EP mode support.

On Wed, Feb 20, 2019 at 03:09:01AM +, Xiaowei Bao wrote: > > > -Original Message- > From: Lorenzo Pieralisi > Sent: 2019年2月19日 19:27 > To: Xiaowei Bao > Cc: bhelg...@google.com; robh...@kernel.org; mark.rutl...@arm.com; > shawn...@kernel.org

Re: [PATCHv6 3/4] pci: layerscape: Add the EP mode support.

On Tue, Jan 22, 2019 at 02:33:27PM +0800, Xiaowei Bao wrote: > Add the PCIe EP mode support for layerscape platform. > > Signed-off-by: Xiaowei Bao > Reviewed-by: Minghuan Lian > Reviewed-by: Zhiqiang Hou > Reviewed-by: Kishon Vijay Abraham I > --- > depends on:

Re: [PATCHv6 1/4] dt-bindings: add DT binding for the layerscape PCIe controller with EP mode

On Tue, Jan 22, 2019 at 02:33:25PM +0800, Xiaowei Bao wrote: > Add the documentation for the Device Tree binding for the layerscape PCIe > controller with EP mode. > > Signed-off-by: Xiaowei Bao > Reviewed-by: Minghuan Lian > Reviewed-by: Zhiqiang Hou > Reviewed-by: Rob Herring > --- > v2: >

Re: [PATCHv5 1/4] dt-bindings: add DT binding for the layerscape PCIe controller with EP mode

Rob, Is it OK for you if I pull this series into the pci tree ? Please let me know, thanks. Lorenzo On Mon, Jan 21, 2019 at 05:44:57PM +0800, Xiaowei Bao wrote: > Add the documentation for the Device Tree binding for the layerscape PCIe > controller with EP mode. > > Signed-off-by: Xiaowei

Re: [PATCHv2 5/6] pci: layerscape: Add the EP mode support.

On Mon, Nov 05, 2018 at 04:46:52PM +0800, Xiaowei Bao wrote: > Add the PCIe EP mode support for layerscape platform. > > Signed-off-by: Xiaowei Bao > --- > v2: > - remove the EP mode check function. > > drivers/pci/controller/dwc/Makefile|2 +- >

Re: [PATCHv2 3/6] PCI: layerscape: Add the EP mode support

On Mon, Nov 05, 2018 at 04:46:50PM +0800, Xiaowei Bao wrote: > Add the EP mode support. > > Signed-off-by: Xiaowei Bao > --- > v2: > - Add the SoC specific compatibles. > > .../devicetree/bindings/pci/layerscape-pci.txt |3 +++ > 1 files changed, 3 insertions(+), 0 deletions(-) Wrong

Re: [PATCHv4 0/3] dts: Add the property of IB and OB

On Fri, Nov 10, 2017 at 11:48:44AM +0800, Bao Xiaowei wrote: > Depend on http://patchwork.ozlabs.org/patch/815382/ > > Bao Xiaowei (3): > ARMv8: dts: ls1046a: add the property of IB and OB > ARMv8: layerscape: add the pcie ep function support > ARMv8: pcie: make the DWC EP driver support

Re: [PATCHv4 1/3] ARMv8: dts: ls1046a: add the property of IB and OB

On Mon, Nov 13, 2017 at 02:35:48AM +, M.h. Lian wrote: [...] > > > On Friday 10 November 2017 09:18 AM, Bao Xiaowei wrote: > > > > Add the property of inbound and outbound windows number for ep driver. > > > > > > > > Signed-off-by: Bao Xiaowei > > > > Acked-by:

Re: [PATCH v2 1/1] Split VGA default device handler out of VGA arbiter

On Thu, Aug 17, 2017 at 09:30:28PM +1000, Daniel Axtens wrote: > A system without PCI legacy resources (e.g. ARM64) may find that no > default/boot VGA device has been marked, because the VGA arbiter > checks for legacy resource decoding before marking a card as default. I do not understand this

Re: [RFC PATCH] Increase in idle power with schedutil

On Sun, May 22, 2016 at 01:42:52PM -0700, Steve Muckle wrote: > On Sun, May 22, 2016 at 12:39:12PM +0200, Peter Zijlstra wrote: > > On Fri, May 20, 2016 at 05:53:41PM +0530, Shilpasri G Bhat wrote: > > > > > > Below are the comparisons by disabling watchdog. > > > Both schedutil and ondemand have

Re: [PATCH v9 5/6] PCI: generic: Make pci-host-generic driver numa aware

On Tue, Jan 19, 2016 at 11:28:56AM +0530, Ganapatrao Kulkarni wrote: > On Mon, Jan 18, 2016 at 11:11 PM, David Daney wrote: > > On 01/18/2016 08:36 AM, Ganapatrao Kulkarni wrote: > >> > >> update numa_node of device associated with pci bus. > >> moved down devm_kzalloc to

Re: [RFC PATCH 00/16] Refine PCI host bridge scan interfaces

On Tue, Nov 18, 2014 at 11:30:11AM +, Arnd Bergmann wrote: On Tuesday 18 November 2014 19:17:32 Yijing Wang wrote: On 2014/11/17 22:13, Arnd Bergmann wrote: On Monday 17 November 2014 18:21:34 Yijing Wang wrote: This series is based Linux 3.18-rc1 and Lorenzo Pieralisi's arm PCI

Re: [RFC PATCH 14/16] arm/PCI: Introduce pci_get_domain_nr()

On Mon, Nov 17, 2014 at 10:21:48AM +, Yijing Wang wrote: Signed-off-by: Yijing Wang wangyij...@huawei.com --- arch/arm/include/asm/mach/pci.h |9 + arch/arm/kernel/bios32.c|8 ++-- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git

Re: [RFC PATCH 09/16] PCI: Associate .get_msi_ctrl() with pci_host_bridge

On Mon, Nov 17, 2014 at 10:21:43AM +, Yijing Wang wrote: From: Yijing Wang wangyijing0...@gmail.com Signed-off-by: Yijing Wang wangyij...@huawei.com --- drivers/pci/host-bridge.c |1 + include/linux/pci.h |2 ++ 2 files changed, 3 insertions(+), 0 deletions(-) diff

Re: [PATCH] cpuidle/powernv: Populate cpuidle state details by querying the device-tree

On Tue, Oct 14, 2014 at 08:53:00AM +0100, Preeti U Murthy wrote: We hard code the metrics relevant for cpuidle states in the kernel today. Instead pick them up from the device tree so that they remain relevant and updated for the system that the kernel is running on. Cc:

Re: [PATCH v3 04/27] arm/MSI: Save MSI chip in pci_sys_data

On Wed, Oct 15, 2014 at 04:06:52AM +0100, Yijing Wang wrote: Saving msi chip in pci_sys_data can make pci bus and devices don't need to know msi chip detail, it also make pci enumeration code be decoupled from msi chip. In fact, all pci devices under the same pci hostbridge share same msi

Re: [RFC PATCH v2 3/4] powerpc: refactor of_get_cpu_node to support other architectures

On Wed, Aug 28, 2013 at 08:46:38PM +0100, Grant Likely wrote: On Thu, 22 Aug 2013 14:59:30 +0100, Mark Rutland mark.rutl...@arm.com wrote: On Mon, Aug 19, 2013 at 02:56:10PM +0100, Sudeep KarkadaNagesha wrote: On 19/08/13 14:02, Rob Herring wrote: On 08/19/2013 05:19 AM, Mark Rutland