Hello Tejun,
On Sunday, 09.January.2011 23:48:20 Tejun Heo wrote:
> Fix it.
I can confirm that, it's fixed.
Thank's a lot. Should have looked into it, that was really a simple
fix.
Roman
--
Roman Fietze Telemotive AG Buero Muehlhause
to use ata_bmdma_qc_issue() ...
I'm sorry, but if I would know about the details, and would know more
about ATA I would have tried to patch pata_mpc52xx.c by myself.
> Even better, just send the driver upstream.
It has been there for a long while. You even patched it last summer.
Roman
--
bother you with test results instead of
patches.
Roman
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Roman Fietze Telemotive AG Buero Muehlhausen
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Tel.: +49(0)7335/18493-45http://www.telemotive.de
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}
ata1.00: configured for MWDMA2
...
... and so on
Any ideas? Same behavious on some of your boxes? Too bad my current
know how when it comes to ATA is not too much above zero.
Roman
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Roman Fietze Telemotive AG Buero Muehlhausen
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of the driver pata_mpc52xx down in Kconfig to
the section "PATA SFF controllers with BMDMA".
Signed-off-by: Roman Fietze
---
drivers/ata/Kconfig | 20 ++--
1 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
ind
>From 749b58686384275d253eeca8f3f0bd7a12daebe2 Mon Sep 17 00:00:00 2001
From: Roman Fietze
Date: Wed, 7 Jul 2010 13:21:12 +0200
Subject: [PATCH] mpc52xx_gpio: support MPC52xx simple interrupt GPIO
Add two OF GPIO chips when probing fsl,mpc5200-gpio, one for the 32
simple GPIO pins and one for the 8 simple interr
e kernel, which we already
use for Atom based x86 development on the MEN boards.
Thanks once more
Roman
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ENX repos).
Q1:
And which one is "good" or "better" for CAN+MPC52xx if that's
different?
Thanks for any enlightenment
Roman
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Roman FietzeTelemotive AG Büro Mühlhausen
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nd out what bits
cause what, e.g. start writing 0x03 and shift that pattern left every
16 scanlines.
In what mode is your X server running? 16/24/32 bit? DirectColor, etc?
Roman
--
Roman FietzeTelemotive AG Büro Mühlhausen
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SHADOW_WINDOW_WRITE,
&winSize,
pBuf->closure);
if(!winBase)
return;
scrBase = scr;
winSize /= sizeof
acked, then
I'll find it in quite some other locations.
Roman
--
Roman FietzeTelemotive AG Büro Mühlhausen
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Tel.: +49(0)7335/18493-45http://www.telemotive.de
Amtsgericht UlmHRB
e.
If you want I can post (in the ML) or mail you the files that I
changed. A diff probably won't help a lot, because I think we changed
more than that, and we are using a pretty old XFree version.
Roman
--
Roman FietzeTelemotive AG Büro Mühlhausen
Breitwiesen
e it's an endianess problem, on our boards we had to modify
the X11 driver. What I did was swapping bytes when updating the device
from the shadowfb inside programs/Xserver/miext/shadow/shpacked.c
Roman
--
Roman FietzeTelemotive AG Büro Mühlhausen
Breitwiesen
with mixed RX and TX, different
and varying data rates, etc.
> FYI, I will be out of office next week.
Lucky Guy
Roman
--
Roman FietzeTelemotive AG Büro Mühlhausen
Breitwiesen 73347 Mühlhausen
Tel.: +49(
oming patch to
address this problem once more, and if it's just by recovering e.g.
within mpc52xx_fec_mdio_transfer's timeout using some other dirty
workaround?
Roman
--
Roman FietzeTelemotive AG Büro Mühlhausen
Breitwiesen 73347 Mühlhaus
o handle it in this second interrupt.
Roman
--
Roman FietzeTelemotive AG Büro Mühlhausen
Breitwiesen 73347 Mühlhausen
Tel.: +49(0)7335/18493-45http://www.telemotive.de
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Hello,
This patch avoids unbalanced enable/disable messages for the DMA
interrupts when running the 5200 platform SCLPC/BestComm driver in DMA
mode.
Signed-off-by: Roman Fietze
---
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff
different boards we (the SW guys) no longer can
assume self made HW problems (HW guys), esp. when reading Freescale's
advice with the XLB config.
It might happen that we switch to 2.6 on our older products, hoping
that at least the LPC/IDE problem disappears by using MWDMA2 instead
of UDMA2.
er the (1< Why is the list head being removed?
Not used at all, except in initialization?
Of course a seperate patch would have been needed.
Roman
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original design,
and only take some extra effort when the transfer directions changes.
Roman
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Roman FietzeTelemotive AG Büro Mühlhausen
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Tel.: +49(0)7335/18493-45http://www.telemotive.de
Amtsger
driver using clear and separate, well
bescribed patches, of course taking care of your and other people
comments.
Again, thanks
Roman
--
Roman FietzeTelemotive AG Büro Mühlhausen
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Tel.: +49(0)7335/18493-45http:
oad) I will come back with the results or probably
further patches.
One of them might be increasing the number of BDs again, because the
BestComm seems to take some time until it gives them back to the
world, and then sometimes in batches. I had a similar problem on a
high speed SPI link using the Bes
Signed-off-by: Roman Fietze
---
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | 14 --
1 files changed, 0 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
index b2c92f5..a89072a 100644
--- a
The original version was done by Grant Likely. This is a modified
version using the platform LocalPlus driver.
Signed-off-by: Roman Fietze
---
drivers/misc/mpc5200-localplus-test.c | 879 +
1 files changed, 879 insertions(+), 0 deletions(-)
create mode 100644
Signed-off-by: Roman Fietze
---
arch/powerpc/include/asm/mpc52xx.h|1 -
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | 13 +++--
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/include/asm/mpc52xx.h
b/arch/powerpc/include/asm/mpc52xx.h
The order of the raised interrupts of SCLPC and BCOM cannot be
predicted, because it depends on the individual BCOM and CPU loads. So
in DMA mode we just wait for both until we finish the transaction.
Signed-off-by: Roman Fietze
---
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | 94
Signed-off-by: Roman Fietze
---
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | 33 +++--
1 files changed, 20 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
index 48f2b4f..21b2a40
Signed-off-by: Roman Fietze
---
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | 40 -
1 files changed, 26 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
index a7cd585..48f2b4f
Signed-off-by: Roman Fietze
---
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
index 8d8a63a..a7cd585 100644
--- a/arch
Signed-off-by: Roman Fietze
---
arch/powerpc/include/asm/mpc52xx.h|2 +-
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | 26 +++-
2 files changed, 21 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/include/asm/mpc52xx.h
b/arch/powerpc/include/asm
Signed-off-by: Roman Fietze
---
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
index 2fd1f3f..1e4f725 100644
--- a/arch
Use SCLPC bit definitions from mpc52xx.h for better readability.
Rewrite IRQ handlers, make them work for DMA.
Fix module unload error.
Signed-off-by: Roman Fietze
---
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | 306 -
1 files changed, 149 insertions(+), 157
Signed-off-by: Roman Fietze
---
arch/powerpc/include/asm/mpc52xx.h | 40 +++
1 files changed, 31 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/mpc52xx.h
b/arch/powerpc/include/asm/mpc52xx.h
index 57f8335..c659d1d 100644
--- a/arch
Signed-off-by: Roman Fietze
---
arch/powerpc/include/asm/mpc52xx.h| 24
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | 79 +++--
2 files changed, 59 insertions(+), 44 deletions(-)
diff --git a/arch/powerpc/include/asm/mpc52xx.h
b/arch/powerpc
Signed-off-by: Roman Fietze
---
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
index 929d017..4c84aa5 100644
form LocalPlus driver for the MPC5200B. This includes
formatting changes in the first step, switching to a structure
describing the SCLPC registers, making DMA work, making unloading the
module work and so on.
Roman
--
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00B with
concurrent traffic to or from the LPC (chips selects of peripherals
while a DMA transfer is active).
The same disks work without problems using UDMA2 on the old 2.4.25 on
exctly the same HW. Why? I don't know yet.
Roman
--
Roman FietzeTelemotive AG Büro Mühlhausen
Bre
ystem generating them. In the case of the BestComm a parallel load on
e.g. FEC or ATA can delay the bcom gen bd interrupt until it's task
gets scheduled again, which can take "some time" due its low BestComm
prio of 2. The second problem was, that the original driver
lts inside mpc52xx_ata_apply_timings() and they
match.
BTW: Should I break lines at col 72 or 80?
From: Roman Fietze
Date: Wed, 16 Dec 2009 13:10:31 +0100
Subject: [PATCH] pata_mpc52xx: reduce code size by simple change of constant
data types
Signed-off-by: Roman Fietze
---
drivers/ata/pata_mpc52x
t wrong data reading from FLASH or the FPGA
using SCLPC+DMA in the first few bytes with the fast settings, when I
did not manually flush or invalidate the cache prior to the DMA
submission as dma_map_single would do it in non cache coherent setups.
Roman
--
Roman FietzeTelemotive
or future request queueing, and so on.
If you or Ben are interested in my work I can post the patches
here. Of course just to get some comments, because the driver can't be
ready in the state it is. The commits would go on top of Ben's next
branch.
Roman
--
Roman Fiet
use only component that do not conflict. The
only thing left is the the cache coherency switch in the kernel
config.
Roman
--
Roman FietzeTelemotive AG Büro Mühlhausen
Breitwiesen 73347 Mühlhausen
Tel.: +49(0)7335/18493-45
/o problems, too.
I would be interested in your opinion, maybe Wolfgang could make some
comments, because he is involved in the U-Boot a lot as well.
Here is the original text from the Freescale support person:
-- snippety snip --
Dear Roman Fietze,
In reply to your message regarding Service
compile that patch on different platforms and got no
compiler errors, so I'd like to ask you to review that patch, and
check if it's worth using it.
Signed-off-by: Roman Fietze
---
arch/powerpc/include/asm/irq.h |4 ++--
arch/powerpc/kernel/irq.c
ot to set that bit? Is it true, as I believe it,
that the "polairity" of this bit is documented the wrong way e.g. in
Freescale's AN3045?
Roman
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n to all who answered.
Roman
--
Roman FietzeTelemotive AG Büro Mühlhausen
Breitwiesen 73347 Mühlhausen
Tel.: +49(0)7335/18493-45http://www.telemotive.de
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s?
Roman
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Roman FietzeTelemotive AG Büro Mühlhausen
Breitwiesen 73347 Mühlhausen
Tel.: +49(0)7335/18493-45http://www.telemotive.de
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, but could
not find that file, neither in the current master, nor in older tags
somewhat related to "2.6.30", nor in any local clone in any version of
the 2.6 since "He" created the repos.
> If you are using older kernel you may want to copy it.
2.6.30 and 2.6.31 from DENX
driver in the drivers/net/phy/ directory?
Modify the DTS? If yes, how? A link to some documentation that's not
already in the kernel sources would already help.
Is it correct, when looking at the sources, that the MPC's FEC driver
switched to the generic PHY driver interface?
Roman
ing I could do to help
you to get this problem fixed?
Roman
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Roman Fietze Telemotive AG Büro Mühlhausen
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defined somewhere below my build
directory.
If I change the above define to
#if defined(CONFIG_MTD_OF_PARTS) || defined(CONFIG_MTD_OF_PARTS_MODULE)
everything is fine and MTD partition work as expected.
My fault? Other solution?
If not, I can submit that tiny patch.
Thanks
Roman
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Roman
it(void)
if (of_register_platform_driver(&mpc52xx_simple_gpiochip_driver))
printk(KERN_ERR "Unable to register simple GPIO driver\n");
+ if
(of_register_platform_driver(&mpc52xx_simple_interrupt_gpiochip_
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